ionic: implement support for rx sgl
Even out Rx performance across MTU sizes by changing from full skb allocations to page-based frag allocations. The device supports a form of scatter-gather in the Rx path, so we can set up a number of pages for each descriptor, all of which are easier to alloc and pass around than the standard kzalloc'd buffer. An skb is wrapped around the pages while processing the received packets, and pages are recycled as needed, or left alone if they weren't used in the Rx. Signed-off-by: Shannon Nelson <snelson@pensando.io> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Shannon Nelson
David S. Miller
parent
089406bc5a
commit
08f2e4b2b2
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@ -155,12 +155,19 @@ typedef void (*ionic_desc_cb)(struct ionic_queue *q,
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struct ionic_desc_info *desc_info,
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struct ionic_cq_info *cq_info, void *cb_arg);
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struct ionic_page_info {
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struct page *page;
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dma_addr_t dma_addr;
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};
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struct ionic_desc_info {
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void *desc;
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void *sg_desc;
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struct ionic_desc_info *next;
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unsigned int index;
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unsigned int left;
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unsigned int npages;
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struct ionic_page_info pages[IONIC_RX_MAX_SG_ELEMS + 1];
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ionic_desc_cb cb;
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void *cb_arg;
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};
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@ -622,12 +622,14 @@ static int ionic_lif_rxq_init(struct ionic_lif *lif, struct ionic_qcq *qcq)
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.lif_index = cpu_to_le16(lif->index),
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.type = q->type,
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.index = cpu_to_le32(q->index),
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.flags = cpu_to_le16(IONIC_QINIT_F_IRQ),
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.flags = cpu_to_le16(IONIC_QINIT_F_IRQ |
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IONIC_QINIT_F_SG),
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.intr_index = cpu_to_le16(cq->bound_intr->index),
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.pid = cpu_to_le16(q->pid),
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.ring_size = ilog2(q->num_descs),
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.ring_base = cpu_to_le64(q->base_pa),
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.cq_ring_base = cpu_to_le64(cq->base_pa),
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.sg_ring_base = cpu_to_le64(q->sg_base_pa),
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},
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};
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int err;
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@ -1460,13 +1462,14 @@ static int ionic_txrx_alloc(struct ionic_lif *lif)
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lif->txqcqs[i].qcq->stats = lif->txqcqs[i].stats;
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}
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flags = IONIC_QCQ_F_RX_STATS | IONIC_QCQ_F_INTR;
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flags = IONIC_QCQ_F_RX_STATS | IONIC_QCQ_F_SG | IONIC_QCQ_F_INTR;
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for (i = 0; i < lif->nxqs; i++) {
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err = ionic_qcq_alloc(lif, IONIC_QTYPE_RXQ, i, "rx", flags,
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lif->nrxq_descs,
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sizeof(struct ionic_rxq_desc),
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sizeof(struct ionic_rxq_comp),
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0, lif->kern_pid, &lif->rxqcqs[i].qcq);
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sizeof(struct ionic_rxq_sg_desc),
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lif->kern_pid, &lif->rxqcqs[i].qcq);
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if (err)
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goto err_out;
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@ -34,52 +34,110 @@ static inline struct netdev_queue *q_to_ndq(struct ionic_queue *q)
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return netdev_get_tx_queue(q->lif->netdev, q->index);
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}
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static void ionic_rx_recycle(struct ionic_queue *q, struct ionic_desc_info *desc_info,
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struct sk_buff *skb)
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static struct sk_buff *ionic_rx_skb_alloc(struct ionic_queue *q,
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unsigned int len, bool frags)
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{
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struct ionic_rxq_desc *old = desc_info->desc;
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struct ionic_rxq_desc *new = q->head->desc;
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struct ionic_lif *lif = q->lif;
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struct ionic_rx_stats *stats;
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struct net_device *netdev;
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struct sk_buff *skb;
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new->addr = old->addr;
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new->len = old->len;
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netdev = lif->netdev;
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stats = q_to_rx_stats(q);
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ionic_rxq_post(q, true, ionic_rx_clean, skb);
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if (frags)
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skb = napi_get_frags(&q_to_qcq(q)->napi);
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else
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skb = netdev_alloc_skb_ip_align(netdev, len);
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if (unlikely(!skb)) {
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net_warn_ratelimited("%s: SKB alloc failed on %s!\n",
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netdev->name, q->name);
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stats->alloc_err++;
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return NULL;
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}
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return skb;
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}
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static bool ionic_rx_copybreak(struct ionic_queue *q, struct ionic_desc_info *desc_info,
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struct ionic_cq_info *cq_info, struct sk_buff **skb)
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static struct sk_buff *ionic_rx_frags(struct ionic_queue *q,
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struct ionic_desc_info *desc_info,
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struct ionic_cq_info *cq_info)
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{
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struct ionic_rxq_comp *comp = cq_info->cq_desc;
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struct ionic_rxq_desc *desc = desc_info->desc;
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struct net_device *netdev = q->lif->netdev;
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struct device *dev = q->lif->ionic->dev;
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struct sk_buff *new_skb;
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u16 clen, dlen;
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struct ionic_page_info *page_info;
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struct sk_buff *skb;
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unsigned int i;
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u16 frag_len;
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u16 len;
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clen = le16_to_cpu(comp->len);
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dlen = le16_to_cpu(desc->len);
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if (clen > q->lif->rx_copybreak) {
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dma_unmap_single(dev, (dma_addr_t)le64_to_cpu(desc->addr),
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dlen, DMA_FROM_DEVICE);
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return false;
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page_info = &desc_info->pages[0];
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len = le16_to_cpu(comp->len);
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prefetch(page_address(page_info->page) + NET_IP_ALIGN);
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skb = ionic_rx_skb_alloc(q, len, true);
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if (unlikely(!skb))
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return NULL;
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i = comp->num_sg_elems + 1;
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do {
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if (unlikely(!page_info->page)) {
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struct napi_struct *napi = &q_to_qcq(q)->napi;
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napi->skb = NULL;
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dev_kfree_skb(skb);
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return NULL;
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}
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frag_len = min(len, (u16)PAGE_SIZE);
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len -= frag_len;
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dma_unmap_page(dev, dma_unmap_addr(page_info, dma_addr),
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PAGE_SIZE, DMA_FROM_DEVICE);
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skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags,
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page_info->page, 0, frag_len, PAGE_SIZE);
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page_info->page = NULL;
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page_info++;
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i--;
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} while (i > 0);
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return skb;
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}
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static struct sk_buff *ionic_rx_copybreak(struct ionic_queue *q,
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struct ionic_desc_info *desc_info,
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struct ionic_cq_info *cq_info)
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{
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struct ionic_rxq_comp *comp = cq_info->cq_desc;
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struct device *dev = q->lif->ionic->dev;
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struct ionic_page_info *page_info;
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struct sk_buff *skb;
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u16 len;
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page_info = &desc_info->pages[0];
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len = le16_to_cpu(comp->len);
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skb = ionic_rx_skb_alloc(q, len, false);
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if (unlikely(!skb))
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return NULL;
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if (unlikely(!page_info->page)) {
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dev_kfree_skb(skb);
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return NULL;
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}
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new_skb = netdev_alloc_skb_ip_align(netdev, clen);
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if (!new_skb) {
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dma_unmap_single(dev, (dma_addr_t)le64_to_cpu(desc->addr),
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dlen, DMA_FROM_DEVICE);
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return false;
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}
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dma_sync_single_for_cpu(dev, dma_unmap_addr(page_info, dma_addr),
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len, DMA_FROM_DEVICE);
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skb_copy_to_linear_data(skb, page_address(page_info->page), len);
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dma_sync_single_for_device(dev, dma_unmap_addr(page_info, dma_addr),
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len, DMA_FROM_DEVICE);
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dma_sync_single_for_cpu(dev, (dma_addr_t)le64_to_cpu(desc->addr),
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clen, DMA_FROM_DEVICE);
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skb_put(skb, len);
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skb->protocol = eth_type_trans(skb, q->lif->netdev);
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memcpy(new_skb->data, (*skb)->data, clen);
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ionic_rx_recycle(q, desc_info, *skb);
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*skb = new_skb;
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return true;
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return skb;
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}
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static void ionic_rx_clean(struct ionic_queue *q, struct ionic_desc_info *desc_info,
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@ -87,35 +145,34 @@ static void ionic_rx_clean(struct ionic_queue *q, struct ionic_desc_info *desc_i
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{
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struct ionic_rxq_comp *comp = cq_info->cq_desc;
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struct ionic_qcq *qcq = q_to_qcq(q);
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struct sk_buff *skb = cb_arg;
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struct ionic_rx_stats *stats;
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struct net_device *netdev;
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struct sk_buff *skb;
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stats = q_to_rx_stats(q);
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netdev = q->lif->netdev;
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if (comp->status) {
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ionic_rx_recycle(q, desc_info, skb);
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if (comp->status)
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return;
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}
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if (unlikely(test_bit(IONIC_LIF_QUEUE_RESET, q->lif->state))) {
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/* no packet processing while resetting */
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ionic_rx_recycle(q, desc_info, skb);
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/* no packet processing while resetting */
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if (unlikely(test_bit(IONIC_LIF_QUEUE_RESET, q->lif->state)))
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return;
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}
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stats->pkts++;
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stats->bytes += le16_to_cpu(comp->len);
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ionic_rx_copybreak(q, desc_info, cq_info, &skb);
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if (le16_to_cpu(comp->len) <= q->lif->rx_copybreak)
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skb = ionic_rx_copybreak(q, desc_info, cq_info);
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else
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skb = ionic_rx_frags(q, desc_info, cq_info);
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skb_put(skb, le16_to_cpu(comp->len));
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skb->protocol = eth_type_trans(skb, netdev);
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if (unlikely(!skb))
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return;
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skb_record_rx_queue(skb, q->index);
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if (netdev->features & NETIF_F_RXHASH) {
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if (likely(netdev->features & NETIF_F_RXHASH)) {
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switch (comp->pkt_type_color & IONIC_RXQ_COMP_PKT_TYPE_MASK) {
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case IONIC_PKT_TYPE_IPV4:
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case IONIC_PKT_TYPE_IPV6:
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@ -132,7 +189,7 @@ static void ionic_rx_clean(struct ionic_queue *q, struct ionic_desc_info *desc_i
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}
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}
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if (netdev->features & NETIF_F_RXCSUM) {
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if (likely(netdev->features & NETIF_F_RXCSUM)) {
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if (comp->csum_flags & IONIC_RXQ_COMP_CSUM_F_CALC) {
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skb->ip_summed = CHECKSUM_COMPLETE;
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skb->csum = (__wsum)le16_to_cpu(comp->csum);
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@ -142,18 +199,21 @@ static void ionic_rx_clean(struct ionic_queue *q, struct ionic_desc_info *desc_i
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stats->csum_none++;
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}
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if ((comp->csum_flags & IONIC_RXQ_COMP_CSUM_F_TCP_BAD) ||
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(comp->csum_flags & IONIC_RXQ_COMP_CSUM_F_UDP_BAD) ||
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(comp->csum_flags & IONIC_RXQ_COMP_CSUM_F_IP_BAD))
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if (unlikely((comp->csum_flags & IONIC_RXQ_COMP_CSUM_F_TCP_BAD) ||
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(comp->csum_flags & IONIC_RXQ_COMP_CSUM_F_UDP_BAD) ||
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(comp->csum_flags & IONIC_RXQ_COMP_CSUM_F_IP_BAD)))
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stats->csum_error++;
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if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX) {
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if (likely(netdev->features & NETIF_F_HW_VLAN_CTAG_RX)) {
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if (comp->csum_flags & IONIC_RXQ_COMP_CSUM_F_VLAN)
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__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
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le16_to_cpu(comp->vlan_tci));
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}
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napi_gro_receive(&qcq->napi, skb);
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if (le16_to_cpu(comp->len) <= q->lif->rx_copybreak)
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napi_gro_receive(&qcq->napi, skb);
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else
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napi_gro_frags(&qcq->napi);
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}
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static bool ionic_rx_service(struct ionic_cq *cq, struct ionic_cq_info *cq_info)
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@ -213,66 +273,125 @@ void ionic_rx_flush(struct ionic_cq *cq)
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work_done, IONIC_INTR_CRED_RESET_COALESCE);
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}
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static struct sk_buff *ionic_rx_skb_alloc(struct ionic_queue *q, unsigned int len,
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dma_addr_t *dma_addr)
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static struct page *ionic_rx_page_alloc(struct ionic_queue *q,
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dma_addr_t *dma_addr)
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{
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struct ionic_lif *lif = q->lif;
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struct ionic_rx_stats *stats;
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struct net_device *netdev;
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struct sk_buff *skb;
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struct device *dev;
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struct page *page;
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netdev = lif->netdev;
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dev = lif->ionic->dev;
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stats = q_to_rx_stats(q);
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skb = netdev_alloc_skb_ip_align(netdev, len);
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if (!skb) {
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net_warn_ratelimited("%s: SKB alloc failed on %s!\n",
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netdev->name, q->name);
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page = alloc_page(GFP_ATOMIC);
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if (unlikely(!page)) {
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net_err_ratelimited("%s: Page alloc failed on %s!\n",
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netdev->name, q->name);
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stats->alloc_err++;
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return NULL;
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}
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*dma_addr = dma_map_single(dev, skb->data, len, DMA_FROM_DEVICE);
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if (dma_mapping_error(dev, *dma_addr)) {
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dev_kfree_skb(skb);
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net_warn_ratelimited("%s: DMA single map failed on %s!\n",
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netdev->name, q->name);
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*dma_addr = dma_map_page(dev, page, 0, PAGE_SIZE, DMA_FROM_DEVICE);
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if (unlikely(dma_mapping_error(dev, *dma_addr))) {
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__free_page(page);
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net_err_ratelimited("%s: DMA single map failed on %s!\n",
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netdev->name, q->name);
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stats->dma_map_err++;
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return NULL;
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}
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return skb;
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return page;
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}
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#define IONIC_RX_RING_DOORBELL_STRIDE ((1 << 2) - 1)
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static void ionic_rx_page_free(struct ionic_queue *q, struct page *page,
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dma_addr_t dma_addr)
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{
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struct ionic_lif *lif = q->lif;
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struct net_device *netdev;
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struct device *dev;
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netdev = lif->netdev;
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dev = lif->ionic->dev;
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if (unlikely(!page)) {
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net_err_ratelimited("%s: Trying to free unallocated buffer on %s!\n",
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netdev->name, q->name);
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return;
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}
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dma_unmap_page(dev, dma_addr, PAGE_SIZE, DMA_FROM_DEVICE);
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__free_page(page);
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}
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#define IONIC_RX_RING_DOORBELL_STRIDE ((1 << 5) - 1)
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#define IONIC_RX_RING_HEAD_BUF_SZ 2048
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void ionic_rx_fill(struct ionic_queue *q)
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{
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struct net_device *netdev = q->lif->netdev;
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struct ionic_desc_info *desc_info;
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struct ionic_page_info *page_info;
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struct ionic_rxq_sg_desc *sg_desc;
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struct ionic_rxq_sg_elem *sg_elem;
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struct ionic_rxq_desc *desc;
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struct sk_buff *skb;
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dma_addr_t dma_addr;
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unsigned int nfrags;
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bool ring_doorbell;
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unsigned int i, j;
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unsigned int len;
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unsigned int i;
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len = netdev->mtu + ETH_HLEN;
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nfrags = round_up(len, PAGE_SIZE) / PAGE_SIZE;
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for (i = ionic_q_space_avail(q); i; i--) {
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skb = ionic_rx_skb_alloc(q, len, &dma_addr);
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if (!skb)
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return;
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desc_info = q->head;
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desc = desc_info->desc;
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sg_desc = desc_info->sg_desc;
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page_info = &desc_info->pages[0];
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desc = q->head->desc;
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desc->addr = cpu_to_le64(dma_addr);
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desc->len = cpu_to_le16(len);
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desc->opcode = IONIC_RXQ_DESC_OPCODE_SIMPLE;
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if (page_info->page) { /* recycle the buffer */
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ring_doorbell = ((q->head->index + 1) &
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IONIC_RX_RING_DOORBELL_STRIDE) == 0;
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ionic_rxq_post(q, ring_doorbell, ionic_rx_clean, NULL);
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continue;
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}
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/* fill main descriptor - pages[0] */
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desc->opcode = (nfrags > 1) ? IONIC_RXQ_DESC_OPCODE_SG :
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IONIC_RXQ_DESC_OPCODE_SIMPLE;
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desc_info->npages = nfrags;
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page_info->page = ionic_rx_page_alloc(q, &page_info->dma_addr);
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if (unlikely(!page_info->page)) {
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desc->addr = 0;
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desc->len = 0;
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return;
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}
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desc->addr = cpu_to_le64(page_info->dma_addr);
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desc->len = cpu_to_le16(PAGE_SIZE);
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page_info++;
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/* fill sg descriptors - pages[1..n] */
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||||
for (j = 0; j < nfrags - 1; j++) {
|
||||
if (page_info->page) /* recycle the sg buffer */
|
||||
continue;
|
||||
|
||||
sg_elem = &sg_desc->elems[j];
|
||||
page_info->page = ionic_rx_page_alloc(q, &page_info->dma_addr);
|
||||
if (unlikely(!page_info->page)) {
|
||||
sg_elem->addr = 0;
|
||||
sg_elem->len = 0;
|
||||
return;
|
||||
}
|
||||
sg_elem->addr = cpu_to_le64(page_info->dma_addr);
|
||||
sg_elem->len = cpu_to_le16(PAGE_SIZE);
|
||||
page_info++;
|
||||
}
|
||||
|
||||
ring_doorbell = ((q->head->index + 1) &
|
||||
IONIC_RX_RING_DOORBELL_STRIDE) == 0;
|
||||
|
||||
ionic_rxq_post(q, ring_doorbell, ionic_rx_clean, skb);
|
||||
ionic_rxq_post(q, ring_doorbell, ionic_rx_clean, NULL);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -283,15 +402,26 @@ static void ionic_rx_fill_cb(void *arg)
|
|||
|
||||
void ionic_rx_empty(struct ionic_queue *q)
|
||||
{
|
||||
struct device *dev = q->lif->ionic->dev;
|
||||
struct ionic_rxq_sg_desc *sg_desc;
|
||||
struct ionic_desc_info *cur;
|
||||
struct ionic_rxq_desc *desc;
|
||||
unsigned int i;
|
||||
|
||||
for (cur = q->tail; cur != q->head; cur = cur->next) {
|
||||
desc = cur->desc;
|
||||
dma_unmap_single(dev, le64_to_cpu(desc->addr),
|
||||
le16_to_cpu(desc->len), DMA_FROM_DEVICE);
|
||||
dev_kfree_skb(cur->cb_arg);
|
||||
desc->addr = 0;
|
||||
desc->len = 0;
|
||||
|
||||
sg_desc = cur->sg_desc;
|
||||
for (i = 0; i < cur->npages; i++) {
|
||||
if (likely(cur->pages[i].page)) {
|
||||
ionic_rx_page_free(q, cur->pages[i].page,
|
||||
cur->pages[i].dma_addr);
|
||||
cur->pages[i].page = NULL;
|
||||
cur->pages[i].dma_addr = 0;
|
||||
}
|
||||
}
|
||||
|
||||
cur->cb_arg = NULL;
|
||||
}
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue