[IA64] enable trap code on slot 1
Because slot 1 of one instr bundle crosses border of two consecutive 8-bytes, kprobe on slot 1 is disabled. This patch enables kprobe on slot1, it only replaces higher 8-bytes of the instruction bundle and changes the exception code to ignore the low 12 bits of the break number (which is across the border in the lower 8-bytes of the bundle). For those instructions which must execute regardless qp bits, kprobe on slot 1 is still disabled. Signed-off-by: bibo,mao <bibo.mao@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
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@ -45,13 +45,14 @@
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* to the correct location.
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*/
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#include <asm/asmmacro.h>
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#include <asm-ia64/break.h>
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/*
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* void jprobe_break(void)
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*/
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.section .kprobes.text, "ax"
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ENTRY(jprobe_break)
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break.m 0x80300
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break.m __IA64_BREAK_JPROBE
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END(jprobe_break)
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/*
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@ -88,6 +88,7 @@ static void __kprobes update_kprobe_inst_flag(uint template, uint slot,
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{
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p->ainsn.inst_flag = 0;
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p->ainsn.target_br_reg = 0;
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p->ainsn.slot = slot;
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/* Check for Break instruction
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* Bits 37:40 Major opcode to be zero
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@ -296,12 +297,6 @@ static int __kprobes valid_kprobe_addr(int template, int slot,
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return -EINVAL;
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}
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if (slot == 1 && bundle_encoding[template][1] != L) {
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printk(KERN_WARNING "Inserting kprobes on slot #1 "
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"is not supported\n");
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return -EINVAL;
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}
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return 0;
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}
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@ -458,23 +453,49 @@ int __kprobes arch_prepare_kprobe(struct kprobe *p)
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void __kprobes arch_arm_kprobe(struct kprobe *p)
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{
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unsigned long addr = (unsigned long)p->addr;
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unsigned long arm_addr = addr & ~0xFULL;
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unsigned long arm_addr;
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bundle_t *src, *dest;
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arm_addr = ((unsigned long)p->addr) & ~0xFUL;
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dest = &((kprobe_opcode_t *)arm_addr)->bundle;
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src = &p->opcode.bundle;
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flush_icache_range((unsigned long)p->ainsn.insn,
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(unsigned long)p->ainsn.insn + sizeof(kprobe_opcode_t));
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memcpy((char *)arm_addr, &p->opcode, sizeof(kprobe_opcode_t));
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switch (p->ainsn.slot) {
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case 0:
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dest->quad0.slot0 = src->quad0.slot0;
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break;
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case 1:
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dest->quad1.slot1_p1 = src->quad1.slot1_p1;
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break;
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case 2:
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dest->quad1.slot2 = src->quad1.slot2;
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break;
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}
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flush_icache_range(arm_addr, arm_addr + sizeof(kprobe_opcode_t));
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}
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void __kprobes arch_disarm_kprobe(struct kprobe *p)
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{
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unsigned long addr = (unsigned long)p->addr;
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unsigned long arm_addr = addr & ~0xFULL;
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unsigned long arm_addr;
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bundle_t *src, *dest;
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arm_addr = ((unsigned long)p->addr) & ~0xFUL;
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dest = &((kprobe_opcode_t *)arm_addr)->bundle;
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/* p->ainsn.insn contains the original unaltered kprobe_opcode_t */
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memcpy((char *) arm_addr, (char *) p->ainsn.insn,
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sizeof(kprobe_opcode_t));
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src = &p->ainsn.insn->bundle;
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switch (p->ainsn.slot) {
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case 0:
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dest->quad0.slot0 = src->quad0.slot0;
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break;
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case 1:
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dest->quad1.slot1_p1 = src->quad1.slot1_p1;
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break;
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case 2:
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dest->quad1.slot2 = src->quad1.slot2;
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break;
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}
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flush_icache_range(arm_addr, arm_addr + sizeof(kprobe_opcode_t));
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}
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@ -807,7 +828,9 @@ int __kprobes kprobe_exceptions_notify(struct notifier_block *self,
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switch(val) {
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case DIE_BREAK:
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/* err is break number from ia64_bad_break() */
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if (args->err == 0x80200 || args->err == 0x80300 || args->err == 0)
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if ((args->err >> 12) == (__IA64_BREAK_KPROBE >> 12)
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|| args->err == __IA64_BREAK_JPROBE
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|| args->err == 0)
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if (pre_kprobes_handler(args))
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ret = NOTIFY_STOP;
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break;
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@ -12,8 +12,8 @@
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* OS-specific debug break numbers:
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*/
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#define __IA64_BREAK_KDB 0x80100
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#define __IA64_BREAK_KPROBE 0x80200
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#define __IA64_BREAK_JPROBE 0x80300
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#define __IA64_BREAK_KPROBE 0x81000 /* .. 0x81fff */
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#define __IA64_BREAK_JPROBE 0x82000
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/*
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* OS-specific break numbers:
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@ -115,6 +115,7 @@ struct arch_specific_insn {
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#define INST_FLAG_BREAK_INST 4
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unsigned long inst_flag;
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unsigned short target_br_reg;
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unsigned short slot;
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};
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extern int kprobe_exceptions_notify(struct notifier_block *self,
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