x86/mce: Replace hard coded hex constants with symbolic defines
Magic constants like 0x0134 in code just invite questions on where they come from, what they mean, can they be changed. Provide #defines for the architecturally defined MCACOD values with a reference to the Intel Software Developers manual which describes them. Signed-off-by: Tony Luck <tony.luck@intel.com>
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@ -56,6 +56,12 @@ static struct severity {
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#define MCI_UC_SAR (MCI_STATUS_UC|MCI_STATUS_S|MCI_STATUS_AR)
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#define MCI_ADDR (MCI_STATUS_ADDRV|MCI_STATUS_MISCV)
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#define MCACOD 0xffff
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/* Architecturally defined codes from SDM Vol. 3B Chapter 15 */
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#define MCACOD_SCRUB 0x00C0 /* 0xC0-0xCF Memory Scrubbing */
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#define MCACOD_SCRUBMSK 0xfff0
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#define MCACOD_L3WB 0x017A /* L3 Explicit Writeback */
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#define MCACOD_DATA 0x0134 /* Data Load */
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#define MCACOD_INSTR 0x0150 /* Instruction Fetch */
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MCESEV(
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NO, "Invalid",
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@ -112,12 +118,12 @@ static struct severity {
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#ifdef CONFIG_MEMORY_FAILURE
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MCESEV(
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KEEP, "HT thread notices Action required: data load error",
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SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR|0x0134),
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SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR|MCACOD_DATA),
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MCGMASK(MCG_STATUS_EIPV, 0)
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),
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MCESEV(
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AR, "Action required: data load error",
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SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR|0x0134),
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SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR|MCACOD_DATA),
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USER
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),
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#endif
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@ -129,11 +135,11 @@ static struct severity {
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/* known AO MCACODs: */
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MCESEV(
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AO, "Action optional: memory scrubbing error",
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SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|0xfff0, MCI_UC_S|0x00c0)
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SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCACOD_SCRUBMSK, MCI_UC_S|MCACOD_SCRUB)
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),
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MCESEV(
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AO, "Action optional: last level cache writeback error",
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SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCACOD, MCI_UC_S|0x017a)
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SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCACOD, MCI_UC_S|MCACOD_L3WB)
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),
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MCESEV(
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SOME, "Action optional: unknown MCACOD",
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