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x86/apic: Cleanup destination mode 

commit 8c44963b60 upstream.

apic::irq_dest_mode is actually a boolean, but defined as u32 and named in
a way which does not explain what it means.

Make it a boolean and rename it to 'dest_mode_logical'

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/r/20201024213535.443185-9-dwmw2@infradead.org
Signed-off-by: Chen Zhuo <sagazchen@tencent.com>
Signed-off-by: Xinghui Li <korantli@tencent.com>
This commit is contained in:
Thomas Gleixner 2020-10-24 22:35:08 +01:00 committed by Jianping Liu
parent 444fd8010d
commit 087c745a1b
16 changed files with 24 additions and 32 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/x86/include/asm/apic.h
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@ -299,7 +299,7 @@ struct apic {
u32 disable_esr;
enum apic_delivery_modes delivery_mode;
u32 irq_dest_mode;
bool dest_mode_logical;
u32 (*calc_dest_apicid)(unsigned int cpu);

2
arch/x86/kernel/apic/apic.c
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@ -1641,7 +1641,7 @@ static void setup_local_APIC(void)
apic->init_apic_ldr();
#ifdef CONFIG_X86_32
if (apic->irq_dest_mode == 1) {
if (apic->dest_mode_logical) {
int logical_apicid, ldr_apicid;
/*

4
arch/x86/kernel/apic/apic_flat_64.c
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@ -114,7 +114,7 @@ static struct apic apic_flat __ro_after_init = {
.apic_id_registered = flat_apic_id_registered,
.delivery_mode = APIC_DELIVERY_MODE_FIXED,
.irq_dest_mode = 1, /* logical */
.dest_mode_logical = true,
.disable_esr = 0,
@ -205,7 +205,7 @@ static struct apic apic_physflat __ro_after_init = {
.apic_id_registered = flat_apic_id_registered,
.delivery_mode = APIC_DELIVERY_MODE_FIXED,
.irq_dest_mode = 0, /* physical */
.dest_mode_logical = false,
.disable_esr = 0,

4
arch/x86/kernel/apic/apic_noop.c
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@ -95,8 +95,7 @@ struct apic apic_noop __ro_after_init = {
.apic_id_registered = noop_apic_id_registered,
.delivery_mode = APIC_DELIVERY_MODE_FIXED,
/* logical delivery broadcast to all CPUs: */
.irq_dest_mode = 1,
.dest_mode_logical = true,
.disable_esr = 0,
@ -104,7 +103,6 @@ struct apic apic_noop __ro_after_init = {
.init_apic_ldr = noop_init_apic_ldr,
.ioapic_phys_id_map = default_ioapic_phys_id_map,
.setup_apic_routing = NULL,
.cpu_present_to_apicid = default_cpu_present_to_apicid,
.apicid_to_cpu_present = physid_set_mask_of_physid,

4
arch/x86/kernel/apic/apic_numachip.c
View File

@ -247,7 +247,7 @@ static const struct apic apic_numachip1 __refconst = {
.apic_id_registered = numachip_apic_id_registered,
.delivery_mode = APIC_DELIVERY_MODE_FIXED,
.irq_dest_mode = 0, /* physical */
.dest_mode_logical = false,
.disable_esr = 0,
@ -294,7 +294,7 @@ static const struct apic apic_numachip2 __refconst = {
.apic_id_registered = numachip_apic_id_registered,
.delivery_mode = APIC_DELIVERY_MODE_FIXED,
.irq_dest_mode = 0, /* physical */
.dest_mode_logical = false,
.disable_esr = 0,

3
arch/x86/kernel/apic/bigsmp_32.c
View File

@ -128,8 +128,7 @@ static struct apic apic_bigsmp __ro_after_init = {
.apic_id_registered = bigsmp_apic_id_registered,
.delivery_mode = APIC_DELIVERY_MODE_FIXED,
/* phys delivery to target CPU: */
.irq_dest_mode = 0,
.dest_mode_logical = false,
.disable_esr = 1,

2
arch/x86/kernel/apic/io_apic.c
View File

@ -2973,7 +2973,7 @@ static void mp_setup_entry(struct irq_cfg *cfg, struct mp_chip_data *data,
{
memset(entry, 0, sizeof(*entry));
entry->delivery_mode = apic->delivery_mode;
entry->dest_mode = apic->irq_dest_mode;
entry->dest_mode = apic->dest_mode_logical;
entry->dest = cfg->dest_apicid;
entry->vector = cfg->vector;
entry->trigger = data->trigger;

6
arch/x86/kernel/apic/msi.c
View File

@ -30,9 +30,9 @@ static void __irq_msi_compose_msg(struct irq_cfg *cfg, struct msi_msg *msg,
msg->address_lo =
MSI_ADDR_BASE_LO |
((apic->irq_dest_mode == 0) ?
MSI_ADDR_DEST_MODE_PHYSICAL :
MSI_ADDR_DEST_MODE_LOGICAL) |
(apic->dest_mode_logical ?
MSI_ADDR_DEST_MODE_LOGICAL :
MSI_ADDR_DEST_MODE_PHYSICAL) |
MSI_ADDR_REDIRECTION_CPU |
MSI_ADDR_DEST_ID(cfg->dest_apicid);

3
arch/x86/kernel/apic/probe_32.c
View File

@ -70,8 +70,7 @@ static struct apic apic_default __ro_after_init = {
.apic_id_registered = default_apic_id_registered,
.delivery_mode = APIC_DELIVERY_MODE_FIXED,
/* logical delivery broadcast to all CPUs: */
.irq_dest_mode = 1,
.dest_mode_logical = true,
.disable_esr = 0,

2
arch/x86/kernel/apic/x2apic_cluster.c
View File

@ -187,7 +187,7 @@ static struct apic apic_x2apic_cluster __ro_after_init = {
.apic_id_registered = x2apic_apic_id_registered,
.delivery_mode = APIC_DELIVERY_MODE_FIXED,
.irq_dest_mode = 1, /* logical */
.dest_mode_logical = true,
.disable_esr = 0,

2
arch/x86/kernel/apic/x2apic_phys.c
View File

@ -161,7 +161,7 @@ static struct apic apic_x2apic_phys __ro_after_init = {
.apic_id_registered = x2apic_apic_id_registered,
.delivery_mode = APIC_DELIVERY_MODE_FIXED,
.irq_dest_mode = 0, /* physical */
.dest_mode_logical = false,
.disable_esr = 0,

7
arch/x86/kernel/smpboot.c
View File

@ -753,7 +753,7 @@ static void __init smp_quirk_init_udelay(void)
int
wakeup_secondary_cpu_via_nmi(int apicid, unsigned long start_eip)
{
u32 dm = apic->irq_dest_mode ? APIC_DEST_LOGICAL : APIC_DEST_PHYSICAL;
u32 dm = apic->dest_mode_logical ? APIC_DEST_LOGICAL : APIC_DEST_PHYSICAL;
unsigned long send_status, accept_status = 0;
int maxlvt;
@ -987,10 +987,7 @@ wakeup_cpu_via_init_nmi(int cpu, unsigned long start_ip, int apicid,
if (!boot_error) {
enable_start_cpu0 = 1;
*cpu0_nmi_registered = 1;
if (apic->irq_dest_mode)
id = cpu0_logical_apicid;
else
id = apicid;
id = apic->dest_mode_logical ? cpu0_logical_apicid : apicid;
boot_error = wakeup_secondary_cpu_via_nmi(id, start_ip);
}

3
arch/x86/xen/apic.c
View File

@ -159,8 +159,7 @@ static struct apic xen_pv_apic = {
.apic_id_valid = xen_id_always_valid,
.apic_id_registered = xen_id_always_registered,
/* .irq_delivery_mode - used in native_compose_msi_msg only */
/* .irq_dest_mode - used in native_compose_msi_msg only */
/* .delivery_mode and .dest_mode_logical not used by XENPV */
.disable_esr = 0,

8
drivers/iommu/amd_iommu.c
View File

@ -3409,7 +3409,7 @@ static void free_irte(u16 devid, int index)
}
static void irte_prepare(void *entry,
u32 delivery_mode, u32 dest_mode,
u32 delivery_mode, bool dest_mode,
u8 vector, u32 dest_apicid, int devid)
{
union irte *irte = (union irte *) entry;
@ -3423,7 +3423,7 @@ static void irte_prepare(void *entry,
}
static void irte_ga_prepare(void *entry,
u32 delivery_mode, u32 dest_mode,
u32 delivery_mode, bool dest_mode,
u8 vector, u32 dest_apicid, int devid)
{
struct irte_ga *irte = (struct irte_ga *) entry;
@ -3615,7 +3615,7 @@ static void irq_remapping_prepare_irte(struct amd_ir_data *data,
data->irq_2_irte.devid = devid;
data->irq_2_irte.index = index + sub_handle;
iommu->irte_ops->prepare(data->entry, apic->delivery_mode,
apic->irq_dest_mode, irq_cfg->vector,
apic->dest_mode_logical, irq_cfg->vector,
irq_cfg->dest_apicid, devid);
switch (info->type) {
@ -3882,7 +3882,7 @@ int amd_iommu_deactivate_guest_mode(void *data)
entry->hi.val = 0;
entry->lo.fields_remap.valid = valid;
entry->lo.fields_remap.dm = apic->irq_dest_mode;
entry->lo.fields_remap.dm = apic->dest_mode_logical;
entry->lo.fields_remap.int_type = apic->delivery_mode;
entry->hi.fields.vector = cfg->vector;
entry->lo.fields_remap.destination =

2
drivers/iommu/amd_iommu_types.h
View File

@ -890,7 +890,7 @@ struct amd_ir_data {
};
struct amd_irte_ops {
void (*prepare)(void *, u32, u32, u8, u32, int);
void (*prepare)(void *, u32, bool, u8, u32, int);
void (*activate)(void *, u16, u16);
void (*deactivate)(void *, u16, u16);
void (*set_affinity)(void *, u16, u16, u8, u32);

2
drivers/iommu/intel/irq_remapping.c
View File

@ -1113,7 +1113,7 @@ static void prepare_irte(struct irte *irte, int vector, unsigned int dest)
memset(irte, 0, sizeof(*irte));
irte->present = 1;
irte->dst_mode = apic->irq_dest_mode;
irte->dst_mode = apic->dest_mode_logical;
/*
* Trigger mode in the IRTE will always be edge, and for IO-APIC, the
* actual level or edge trigger will be setup in the IO-APIC