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phy: qcom-qmp-ufs: consolidate lane config 

For legacy reasons, there are two configuration parameters that describe
the number of lanes a PHY has.

Replace them both with a new field simply named "lanes".

Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20220920073826.20811-16-johan+linaro@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
Johan Hovold 2022-09-20 09:38:24 +02:00 committed by Vinod Koul
parent 099155615a
commit 07d386bf6d
1 changed files with 10 additions and 21 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

31
drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
View File

@ -533,8 +533,7 @@ static const struct qmp_phy_init_tbl sm8350_ufsphy_pcs_tbl[] = {
/* struct qmp_phy_cfg - per-PHY initialization config */
struct qmp_phy_cfg {
/* number of lanes provided by phy */
int nlanes;
int lanes;
/* Init sequence for PHY blocks - serdes, tx, rx, pcs */
const struct qmp_phy_init_tbl *serdes_tbl;
@ -561,9 +560,6 @@ struct qmp_phy_cfg {
/* bit offset of PHYSTATUS in QPHY_PCS_STATUS register */
unsigned int phy_status;
/* true, if PHY has secondary tx/rx lanes to be configured */
bool is_dual_lane_phy;
/* true, if PCS block has no separate SW_RESET register */
bool no_pcs_sw_reset;
};
@ -662,7 +658,7 @@ static const char * const qmp_phy_vreg_l[] = {
};
static const struct qmp_phy_cfg msm8996_ufs_cfg = {
.nlanes = 1,
.lanes = 1,
.serdes_tbl = msm8996_ufs_serdes_tbl,
.serdes_tbl_num = ARRAY_SIZE(msm8996_ufs_serdes_tbl),
@ -687,7 +683,7 @@ static const struct qmp_phy_cfg msm8996_ufs_cfg = {
};
static const struct qmp_phy_cfg sdm845_ufsphy_cfg = {
.nlanes = 2,
.lanes = 2,
.serdes_tbl = sdm845_ufsphy_serdes_tbl,
.serdes_tbl_num = ARRAY_SIZE(sdm845_ufsphy_serdes_tbl),
@ -707,12 +703,11 @@ static const struct qmp_phy_cfg sdm845_ufsphy_cfg = {
.pwrdn_ctrl = SW_PWRDN,
.phy_status = PHYSTATUS,
.is_dual_lane_phy = true,
.no_pcs_sw_reset = true,
};
static const struct qmp_phy_cfg sm6115_ufsphy_cfg = {
.nlanes = 1,
.lanes = 1,
.serdes_tbl = sm6115_ufsphy_serdes_tbl,
.serdes_tbl_num = ARRAY_SIZE(sm6115_ufsphy_serdes_tbl),
@ -735,7 +730,7 @@ static const struct qmp_phy_cfg sm6115_ufsphy_cfg = {
};
static const struct qmp_phy_cfg sm8150_ufsphy_cfg = {
.nlanes = 2,
.lanes = 2,
.serdes_tbl = sm8150_ufsphy_serdes_tbl,
.serdes_tbl_num = ARRAY_SIZE(sm8150_ufsphy_serdes_tbl),
@ -754,12 +749,10 @@ static const struct qmp_phy_cfg sm8150_ufsphy_cfg = {
.start_ctrl = SERDES_START,
.pwrdn_ctrl = SW_PWRDN,
.phy_status = PHYSTATUS,
.is_dual_lane_phy = true,
};
static const struct qmp_phy_cfg sm8350_ufsphy_cfg = {
.nlanes = 2,
.lanes = 2,
.serdes_tbl = sm8350_ufsphy_serdes_tbl,
.serdes_tbl_num = ARRAY_SIZE(sm8350_ufsphy_serdes_tbl),
@ -778,12 +771,10 @@ static const struct qmp_phy_cfg sm8350_ufsphy_cfg = {
.start_ctrl = SERDES_START,
.pwrdn_ctrl = SW_PWRDN,
.phy_status = PHYSTATUS,
.is_dual_lane_phy = true,
};
static const struct qmp_phy_cfg sm8450_ufsphy_cfg = {
.nlanes = 2,
.lanes = 2,
.serdes_tbl = sm8350_ufsphy_serdes_tbl,
.serdes_tbl_num = ARRAY_SIZE(sm8350_ufsphy_serdes_tbl),
@ -802,8 +793,6 @@ static const struct qmp_phy_cfg sm8450_ufsphy_cfg = {
.start_ctrl = SERDES_START,
.pwrdn_ctrl = SW_PWRDN,
.phy_status = PHYSTATUS,
.is_dual_lane_phy = true,
};
static void qmp_ufs_configure_lane(void __iomem *base,
@ -956,14 +945,14 @@ static int qmp_ufs_power_on(struct phy *phy)
/* Tx, Rx, and PCS configurations */
qmp_ufs_configure_lane(tx, cfg->regs, cfg->tx_tbl, cfg->tx_tbl_num, 1);
if (cfg->is_dual_lane_phy) {
if (cfg->lanes >= 2) {
qmp_ufs_configure_lane(qphy->tx2, cfg->regs,
cfg->tx_tbl, cfg->tx_tbl_num, 2);
}
qmp_ufs_configure_lane(rx, cfg->regs, cfg->rx_tbl, cfg->rx_tbl_num, 1);
if (cfg->is_dual_lane_phy) {
if (cfg->lanes >= 2) {
qmp_ufs_configure_lane(qphy->rx2, cfg->regs,
cfg->rx_tbl, cfg->rx_tbl_num, 2);
}
@ -1122,7 +1111,7 @@ static int qmp_ufs_create(struct device *dev, struct device_node *np, int id,
if (IS_ERR(qphy->pcs))
return PTR_ERR(qphy->pcs);
if (cfg->is_dual_lane_phy) {
if (cfg->lanes >= 2) {
qphy->tx2 = devm_of_iomap(dev, np, 3, NULL);
if (IS_ERR(qphy->tx2))
return PTR_ERR(qphy->tx2);