UbiquitousOS
/
OpenCloudOS-Kernel
mirror of https://gitee.com/OpenCloudOS/OpenCloudOS-Kernel.git
11
0
Fork 0
Code Issues Projects Releases Wiki Activity

drm/i915: Replace a few for_each_pipe(i) by for_each_pipe(pipe) 

Consistency throughout the code base is good and remove some room for
mistakes (as explained in the "drm/i915: Use a pipe variable to cycle
through the pipes" commit)

So, let's replace the for_each_pipe(i) occurences by for_each_pipe(pipe)
when it's reasonable and practical to do so (eg. when there isn't another
pipe variable already).

Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Damien Lespiau 2014-03-03 17:31:46 +00:00 committed by Daniel Vetter
parent e3d5128534
commit 07d27e20bc
3 changed files with 22 additions and 22 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

14
drivers/gpu/drm/i915/i915_debugfs.c
View File

@ -614,16 +614,16 @@ static int i915_interrupt_info(struct seq_file *m, void *data)
i, I915_READ(GEN8_GT_IER(i))); i, I915_READ(GEN8_GT_IER(i)));
} }
for_each_pipe(i) { for_each_pipe(pipe) {
seq_printf(m, "Pipe %c IMR:\t%08x\n", seq_printf(m, "Pipe %c IMR:\t%08x\n",
pipe_name(i), pipe_name(pipe),
I915_READ(GEN8_DE_PIPE_IMR(i))); I915_READ(GEN8_DE_PIPE_IMR(pipe)));
seq_printf(m, "Pipe %c IIR:\t%08x\n", seq_printf(m, "Pipe %c IIR:\t%08x\n",
pipe_name(i), pipe_name(pipe),
I915_READ(GEN8_DE_PIPE_IIR(i))); I915_READ(GEN8_DE_PIPE_IIR(pipe)));
seq_printf(m, "Pipe %c IER:\t%08x\n", seq_printf(m, "Pipe %c IER:\t%08x\n",
pipe_name(i), pipe_name(pipe),
I915_READ(GEN8_DE_PIPE_IER(i))); I915_READ(GEN8_DE_PIPE_IER(pipe)));
} }
seq_printf(m, "Display Engine port interrupt mask:\t%08x\n", seq_printf(m, "Display Engine port interrupt mask:\t%08x\n",

14
drivers/gpu/drm/i915/i915_irq.c
View File

@ -1867,7 +1867,7 @@ static void ilk_display_irq_handler(struct drm_device *dev, u32 de_iir)
static void ivb_display_irq_handler(struct drm_device *dev, u32 de_iir) static void ivb_display_irq_handler(struct drm_device *dev, u32 de_iir)
{ {
struct drm_i915_private *dev_priv = dev->dev_private; struct drm_i915_private *dev_priv = dev->dev_private;
enum pipe i; enum pipe pipe;
if (de_iir & DE_ERR_INT_IVB) if (de_iir & DE_ERR_INT_IVB)
ivb_err_int_handler(dev); ivb_err_int_handler(dev);
@ -1878,14 +1878,14 @@ static void ivb_display_irq_handler(struct drm_device *dev, u32 de_iir)
if (de_iir & DE_GSE_IVB) if (de_iir & DE_GSE_IVB)
intel_opregion_asle_intr(dev); intel_opregion_asle_intr(dev);
for_each_pipe(i) { for_each_pipe(pipe) {
if (de_iir & (DE_PIPE_VBLANK_IVB(i))) if (de_iir & (DE_PIPE_VBLANK_IVB(pipe)))
drm_handle_vblank(dev, i); drm_handle_vblank(dev, pipe);
/* plane/pipes map 1:1 on ilk+ */ /* plane/pipes map 1:1 on ilk+ */
if (de_iir & DE_PLANE_FLIP_DONE_IVB(i)) { if (de_iir & DE_PLANE_FLIP_DONE_IVB(pipe)) {
intel_prepare_page_flip(dev, i); intel_prepare_page_flip(dev, pipe);
intel_finish_page_flip_plane(dev, i); intel_finish_page_flip_plane(dev, pipe);
} }
} }

16
drivers/gpu/drm/i915/intel_pm.c
View File

@ -4792,7 +4792,7 @@ static void lpt_suspend_hw(struct drm_device *dev)
static void gen8_init_clock_gating(struct drm_device *dev) static void gen8_init_clock_gating(struct drm_device *dev)
{ {
struct drm_i915_private *dev_priv = dev->dev_private; struct drm_i915_private *dev_priv = dev->dev_private;
enum pipe i; enum pipe pipe;
I915_WRITE(WM3_LP_ILK, 0); I915_WRITE(WM3_LP_ILK, 0);
I915_WRITE(WM2_LP_ILK, 0); I915_WRITE(WM2_LP_ILK, 0);
@ -4837,9 +4837,9 @@ static void gen8_init_clock_gating(struct drm_device *dev)
I915_READ(CHICKEN_PAR1_1) | DPA_MASK_VBLANK_SRD); I915_READ(CHICKEN_PAR1_1) | DPA_MASK_VBLANK_SRD);
/* WaPsrDPRSUnmaskVBlankInSRD:bdw */ /* WaPsrDPRSUnmaskVBlankInSRD:bdw */
for_each_pipe(i) { for_each_pipe(pipe) {
I915_WRITE(CHICKEN_PIPESL_1(i), I915_WRITE(CHICKEN_PIPESL_1(pipe),
I915_READ(CHICKEN_PIPESL_1(i) | I915_READ(CHICKEN_PIPESL_1(pipe) |
DPRS_MASK_VBLANK_SRD)); DPRS_MASK_VBLANK_SRD));
} }
@ -5310,7 +5310,7 @@ static void hsw_power_well_post_enable(struct drm_i915_private *dev_priv)
static void hsw_power_well_post_disable(struct drm_i915_private *dev_priv) static void hsw_power_well_post_disable(struct drm_i915_private *dev_priv)
{ {
struct drm_device *dev = dev_priv->dev; struct drm_device *dev = dev_priv->dev;
enum pipe p; enum pipe pipe;
unsigned long irqflags; unsigned long irqflags;
/* /*
@ -5321,9 +5321,9 @@ static void hsw_power_well_post_disable(struct drm_i915_private *dev_priv)
* FIXME: Should we do this in general in drm_vblank_post_modeset? * FIXME: Should we do this in general in drm_vblank_post_modeset?
*/ */
spin_lock_irqsave(&dev->vbl_lock, irqflags); spin_lock_irqsave(&dev->vbl_lock, irqflags);
for_each_pipe(p) for_each_pipe(pipe)
if (p != PIPE_A) if (pipe != PIPE_A)
dev->vblank[p].last = 0; dev->vblank[pipe].last = 0;
spin_unlock_irqrestore(&dev->vbl_lock, irqflags); spin_unlock_irqrestore(&dev->vbl_lock, irqflags);
} }