ixgbe: allow reading of SFF-8472 data over i2c
This patch adds functions needed for reading SFF-8472 diagnostic data from SFP modules. Based on original patch from Aurélien Guillaume <footplus@gmail.com> CC: Aurélien Guillaume <footplus@gmail.com> Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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a7a1d9da29
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07ce870bed
drivers/net/ethernet/intel/ixgbe
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@ -1003,15 +1003,16 @@ static s32 ixgbe_write_analog_reg8_82598(struct ixgbe_hw *hw, u32 reg, u8 val)
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}
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/**
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* ixgbe_read_i2c_eeprom_82598 - Reads 8 bit word over I2C interface.
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* ixgbe_read_i2c_phy_82598 - Reads 8 bit word over I2C interface.
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* @hw: pointer to hardware structure
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* @byte_offset: EEPROM byte offset to read
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* @dev_addr: address to read from
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* @byte_offset: byte offset to read from dev_addr
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* @eeprom_data: value read
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*
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* Performs 8 byte read operation to SFP module's EEPROM over I2C interface.
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* Performs 8 byte read operation to SFP module's data over I2C interface.
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**/
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static s32 ixgbe_read_i2c_eeprom_82598(struct ixgbe_hw *hw, u8 byte_offset,
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u8 *eeprom_data)
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static s32 ixgbe_read_i2c_phy_82598(struct ixgbe_hw *hw, u8 dev_addr,
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u8 byte_offset, u8 *eeprom_data)
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{
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s32 status = 0;
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u16 sfp_addr = 0;
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@ -1025,7 +1026,7 @@ static s32 ixgbe_read_i2c_eeprom_82598(struct ixgbe_hw *hw, u8 byte_offset,
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* 0xC30D. These registers are used to talk to the SFP+
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* module's EEPROM through the SDA/SCL (I2C) interface.
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*/
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sfp_addr = (IXGBE_I2C_EEPROM_DEV_ADDR << 8) + byte_offset;
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sfp_addr = (dev_addr << 8) + byte_offset;
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sfp_addr = (sfp_addr | IXGBE_I2C_EEPROM_READ_MASK);
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hw->phy.ops.write_reg(hw,
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IXGBE_MDIO_PMA_PMD_SDA_SCL_ADDR,
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@ -1057,13 +1058,42 @@ static s32 ixgbe_read_i2c_eeprom_82598(struct ixgbe_hw *hw, u8 byte_offset,
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*eeprom_data = (u8)(sfp_data >> 8);
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} else {
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status = IXGBE_ERR_PHY;
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goto out;
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}
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out:
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return status;
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}
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/**
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* ixgbe_read_i2c_eeprom_82598 - Reads 8 bit word over I2C interface.
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* @hw: pointer to hardware structure
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* @byte_offset: EEPROM byte offset to read
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* @eeprom_data: value read
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*
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* Performs 8 byte read operation to SFP module's EEPROM over I2C interface.
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**/
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static s32 ixgbe_read_i2c_eeprom_82598(struct ixgbe_hw *hw, u8 byte_offset,
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u8 *eeprom_data)
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{
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return ixgbe_read_i2c_phy_82598(hw, IXGBE_I2C_EEPROM_DEV_ADDR,
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byte_offset, eeprom_data);
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}
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/**
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* ixgbe_read_i2c_sff8472_82598 - Reads 8 bit word over I2C interface.
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* @hw: pointer to hardware structure
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* @byte_offset: byte offset at address 0xA2
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* @eeprom_data: value read
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*
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* Performs 8 byte read operation to SFP module's SFF-8472 data over I2C
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**/
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static s32 ixgbe_read_i2c_sff8472_82598(struct ixgbe_hw *hw, u8 byte_offset,
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u8 *sff8472_data)
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{
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return ixgbe_read_i2c_phy_82598(hw, IXGBE_I2C_EEPROM_DEV_ADDR2,
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byte_offset, sff8472_data);
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}
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/**
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* ixgbe_get_supported_physical_layer_82598 - Returns physical layer type
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* @hw: pointer to hardware structure
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@ -1297,6 +1327,7 @@ static struct ixgbe_phy_operations phy_ops_82598 = {
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.write_reg = &ixgbe_write_phy_reg_generic,
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.setup_link = &ixgbe_setup_phy_link_generic,
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.setup_link_speed = &ixgbe_setup_phy_link_speed_generic,
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.read_i2c_sff8472 = &ixgbe_read_i2c_sff8472_82598,
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.read_i2c_eeprom = &ixgbe_read_i2c_eeprom_82598,
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.check_overtemp = &ixgbe_tn_check_overtemp,
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};
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@ -2241,6 +2241,7 @@ static struct ixgbe_phy_operations phy_ops_82599 = {
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.setup_link_speed = &ixgbe_setup_phy_link_speed_generic,
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.read_i2c_byte = &ixgbe_read_i2c_byte_generic,
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.write_i2c_byte = &ixgbe_write_i2c_byte_generic,
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.read_i2c_sff8472 = &ixgbe_read_i2c_sff8472_generic,
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.read_i2c_eeprom = &ixgbe_read_i2c_eeprom_generic,
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.write_i2c_eeprom = &ixgbe_write_i2c_eeprom_generic,
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.check_overtemp = &ixgbe_tn_check_overtemp,
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@ -1203,6 +1203,22 @@ s32 ixgbe_read_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset,
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eeprom_data);
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}
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/**
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* ixgbe_read_i2c_sff8472_generic - Reads 8 bit word over I2C interface
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* @hw: pointer to hardware structure
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* @byte_offset: byte offset at address 0xA2
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* @eeprom_data: value read
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*
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* Performs byte read operation to SFP module's SFF-8472 data over I2C
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**/
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s32 ixgbe_read_i2c_sff8472_generic(struct ixgbe_hw *hw, u8 byte_offset,
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u8 *sff8472_data)
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{
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return hw->phy.ops.read_i2c_byte(hw, byte_offset,
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IXGBE_I2C_EEPROM_DEV_ADDR2,
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sff8472_data);
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}
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/**
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* ixgbe_write_i2c_eeprom_generic - Writes 8 bit EEPROM word over I2C interface
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* @hw: pointer to hardware structure
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@ -30,6 +30,7 @@
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#include "ixgbe_type.h"
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#define IXGBE_I2C_EEPROM_DEV_ADDR 0xA0
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#define IXGBE_I2C_EEPROM_DEV_ADDR2 0xA2
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/* EEPROM byte offsets */
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#define IXGBE_SFF_IDENTIFIER 0x0
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@ -41,6 +42,8 @@
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#define IXGBE_SFF_10GBE_COMP_CODES 0x3
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#define IXGBE_SFF_CABLE_TECHNOLOGY 0x8
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#define IXGBE_SFF_CABLE_SPEC_COMP 0x3C
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#define IXGBE_SFF_SFF_8472_SWAP 0x5C
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#define IXGBE_SFF_SFF_8472_COMP 0x5E
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/* Bitmasks */
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#define IXGBE_SFF_DA_PASSIVE_CABLE 0x4
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@ -51,6 +54,7 @@
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#define IXGBE_SFF_1GBASET_CAPABLE 0x8
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#define IXGBE_SFF_10GBASESR_CAPABLE 0x10
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#define IXGBE_SFF_10GBASELR_CAPABLE 0x20
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#define IXGBE_SFF_ADDRESSING_MODE 0x4
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#define IXGBE_I2C_EEPROM_READ_MASK 0x100
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#define IXGBE_I2C_EEPROM_STATUS_MASK 0x3
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#define IXGBE_I2C_EEPROM_STATUS_NO_OPERATION 0x0
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@ -88,6 +92,9 @@
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#define IXGBE_TN_LASI_STATUS_REG 0x9005
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#define IXGBE_TN_LASI_STATUS_TEMP_ALARM 0x0008
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/* SFP+ SFF-8472 Compliance code */
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#define IXGBE_SFF_SFF_8472_UNSUP 0x00
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s32 ixgbe_init_phy_ops_generic(struct ixgbe_hw *hw);
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s32 ixgbe_identify_phy_generic(struct ixgbe_hw *hw);
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s32 ixgbe_reset_phy_generic(struct ixgbe_hw *hw);
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@ -125,6 +132,8 @@ s32 ixgbe_write_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset,
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u8 dev_addr, u8 data);
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s32 ixgbe_read_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset,
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u8 *eeprom_data);
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s32 ixgbe_read_i2c_sff8472_generic(struct ixgbe_hw *hw, u8 byte_offset,
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u8 *sff8472_data);
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s32 ixgbe_write_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset,
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u8 eeprom_data);
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#endif /* _IXGBE_PHY_H_ */
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@ -2874,6 +2874,7 @@ struct ixgbe_phy_operations {
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s32 (*get_firmware_version)(struct ixgbe_hw *, u16 *);
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s32 (*read_i2c_byte)(struct ixgbe_hw *, u8, u8, u8 *);
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s32 (*write_i2c_byte)(struct ixgbe_hw *, u8, u8, u8);
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s32 (*read_i2c_sff8472)(struct ixgbe_hw *, u8 , u8 *);
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s32 (*read_i2c_eeprom)(struct ixgbe_hw *, u8 , u8 *);
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s32 (*write_i2c_eeprom)(struct ixgbe_hw *, u8, u8);
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s32 (*check_overtemp)(struct ixgbe_hw *);
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@ -878,6 +878,7 @@ static struct ixgbe_phy_operations phy_ops_X540 = {
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.setup_link_speed = &ixgbe_setup_phy_link_speed_generic,
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.read_i2c_byte = &ixgbe_read_i2c_byte_generic,
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.write_i2c_byte = &ixgbe_write_i2c_byte_generic,
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.read_i2c_sff8472 = &ixgbe_read_i2c_sff8472_generic,
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.read_i2c_eeprom = &ixgbe_read_i2c_eeprom_generic,
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.write_i2c_eeprom = &ixgbe_write_i2c_eeprom_generic,
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.check_overtemp = &ixgbe_tn_check_overtemp,
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