[POWERPC] Oprofile enhanced instruction sampling support
Oprofile enhanced instruction sampling support. When performing instruction sampling, the mmcra[SLOT] field can be used to more accurately identify the address of the sampled instruction. Tested on power4, js20, power5 and power5+. Signed-off-by: Will Schmidt <will_schmidt@vnet.ibm.com> cc: Maynard Johnson <maynardj@us.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
This commit is contained in:
parent
f5e6a280d1
commit
078f194045
|
@ -1,5 +1,7 @@
|
|||
/*
|
||||
* Copyright (C) 2004 Anton Blanchard <anton@au.ibm.com>, IBM
|
||||
* Added mmcra[slot] support:
|
||||
* Copyright (C) 2006-2007 Will Schmidt <willschm@us.ibm.com>, IBM
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
|
@ -181,11 +183,17 @@ static void __attribute_used__ kernel_unknown_bucket(void)
|
|||
* On GQ and newer the MMCRA stores the HV and PR bits at the time
|
||||
* the SIAR was sampled. We use that to work out if the SIAR was sampled in
|
||||
* the hypervisor, our exception vectors or RTAS.
|
||||
* If the MMCRA_SAMPLE_ENABLE bit is set, we can use the MMCRA[slot] bits
|
||||
* to more accurately identify the address of the sampled instruction. The
|
||||
* mmcra[slot] bits represent the slot number of a sampled instruction
|
||||
* within an instruction group. The slot will contain a value between 1
|
||||
* and 5 if MMCRA_SAMPLE_ENABLE is set, otherwise 0.
|
||||
*/
|
||||
static unsigned long get_pc(struct pt_regs *regs)
|
||||
{
|
||||
unsigned long pc = mfspr(SPRN_SIAR);
|
||||
unsigned long mmcra;
|
||||
unsigned long slot;
|
||||
|
||||
/* Cant do much about it */
|
||||
if (!cur_cpu_spec->oprofile_mmcra_sihv)
|
||||
|
@ -193,6 +201,12 @@ static unsigned long get_pc(struct pt_regs *regs)
|
|||
|
||||
mmcra = mfspr(SPRN_MMCRA);
|
||||
|
||||
if (mmcra & MMCRA_SAMPLE_ENABLE) {
|
||||
slot = ((mmcra & MMCRA_SLOT) >> MMCRA_SLOT_SHIFT);
|
||||
if (slot > 1)
|
||||
pc += 4 * (slot - 1);
|
||||
}
|
||||
|
||||
/* Were we in the hypervisor? */
|
||||
if (firmware_has_feature(FW_FEATURE_LPAR) &&
|
||||
(mmcra & cur_cpu_spec->oprofile_mmcra_sihv))
|
||||
|
|
|
@ -453,6 +453,8 @@
|
|||
#define SPRN_MMCRA 0x312
|
||||
#define MMCRA_SIHV 0x10000000UL /* state of MSR HV when SIAR set */
|
||||
#define MMCRA_SIPR 0x08000000UL /* state of MSR PR when SIAR set */
|
||||
#define MMCRA_SLOT 0x07000000UL /* SLOT bits (37-39) */
|
||||
#define MMCRA_SLOT_SHIFT 24
|
||||
#define MMCRA_SAMPLE_ENABLE 0x00000001UL /* enable sampling */
|
||||
#define POWER6_MMCRA_SIHV 0x0000040000000000ULL
|
||||
#define POWER6_MMCRA_SIPR 0x0000020000000000ULL
|
||||
|
|
Loading…
Reference in New Issue