accel/habanalabs: in hw_fini return error code if polling timed-out
In hw_fini callback, we use either the cpucp packet method or polling a register. Currently we return error only in the case of cpucp packet failure. In this patch we also return error if polling timed out. Signed-off-by: Dafna Hirschfeld <dhirschfeld@habana.ai> Reviewed-by: Oded Gabbay <ogabbay@kernel.org> Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
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@ -4206,10 +4206,10 @@ skip_reset:
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msleep(reset_timeout_ms);
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status = RREG32(mmPSOC_GLOBAL_CONF_BTM_FSM);
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if (status & PSOC_GLOBAL_CONF_BTM_FSM_STATE_MASK)
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dev_err(hdev->dev,
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"Timeout while waiting for device to reset 0x%x\n",
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status);
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if (status & PSOC_GLOBAL_CONF_BTM_FSM_STATE_MASK) {
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dev_err(hdev->dev, "Timeout while waiting for device to reset 0x%x\n", status);
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return -ETIMEDOUT;
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}
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if (gaudi) {
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gaudi->hw_cap_initialized &= ~(HW_CAP_CPU | HW_CAP_CPU_Q | HW_CAP_HBM |
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@ -6036,7 +6036,7 @@ static void gaudi2_execute_hard_reset(struct hl_device *hdev, u32 reset_sleep_ms
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WREG32(mmPSOC_RESET_CONF_SW_ALL_RST, 1);
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}
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static void gaudi2_get_soft_rst_done_indication(struct hl_device *hdev, u32 poll_timeout_us)
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static int gaudi2_get_soft_rst_done_indication(struct hl_device *hdev, u32 poll_timeout_us)
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{
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int i, rc = 0;
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u32 reg_val;
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@ -6053,6 +6053,7 @@ static void gaudi2_get_soft_rst_done_indication(struct hl_device *hdev, u32 poll
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if (rc)
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dev_err(hdev->dev, "Timeout while waiting for FW to complete soft reset (0x%x)\n",
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reg_val);
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return rc;
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}
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/**
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@ -6065,7 +6066,7 @@ static void gaudi2_get_soft_rst_done_indication(struct hl_device *hdev, u32 poll
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*
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* This function executes soft reset based on if driver/FW should do the reset
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*/
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static void gaudi2_execute_soft_reset(struct hl_device *hdev, u32 reset_sleep_ms,
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static int gaudi2_execute_soft_reset(struct hl_device *hdev, u32 reset_sleep_ms,
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bool driver_performs_reset, u32 poll_timeout_us)
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{
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struct cpu_dyn_regs *dyn_regs = &hdev->fw_loader.dynamic_loader.comm_desc.cpu_dyn_regs;
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@ -6079,8 +6080,8 @@ static void gaudi2_execute_soft_reset(struct hl_device *hdev, u32 reset_sleep_ms
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WREG32(le32_to_cpu(dyn_regs->gic_host_soft_rst_irq),
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gaudi2_irq_map_table[GAUDI2_EVENT_CPU_SOFT_RESET].cpu_id);
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gaudi2_get_soft_rst_done_indication(hdev, poll_timeout_us);
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return;
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return gaudi2_get_soft_rst_done_indication(hdev, poll_timeout_us);
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}
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/* Block access to engines, QMANs and SM during reset, these
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@ -6095,6 +6096,7 @@ static void gaudi2_execute_soft_reset(struct hl_device *hdev, u32 reset_sleep_ms
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mmPCIE_VDEC1_MSTR_IF_RR_SHRD_HBW_BASE + HL_BLOCK_SIZE);
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WREG32(mmPSOC_RESET_CONF_SOFT_RST, 1);
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return 0;
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}
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static void gaudi2_poll_btm_indication(struct hl_device *hdev, u32 reset_sleep_ms,
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@ -2834,10 +2834,10 @@ static int goya_hw_fini(struct hl_device *hdev, bool hard_reset, bool fw_reset)
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msleep(reset_timeout_ms);
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status = RREG32(mmPSOC_GLOBAL_CONF_BTM_FSM);
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if (status & PSOC_GLOBAL_CONF_BTM_FSM_STATE_MASK)
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dev_err(hdev->dev,
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"Timeout while waiting for device to reset 0x%x\n",
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status);
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if (status & PSOC_GLOBAL_CONF_BTM_FSM_STATE_MASK) {
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dev_err(hdev->dev, "Timeout while waiting for device to reset 0x%x\n", status);
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return -ETIMEDOUT;
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}
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if (!hard_reset && goya) {
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goya->hw_cap_initialized &= ~(HW_CAP_DMA | HW_CAP_MME |
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