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drm/amdgpu: always set and check dma addresses in the VM code 

Clean that up a bit and allow to always have the DMA addresses around.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Christian König 2019-03-18 12:24:03 +01:00 committed by Alex Deucher
parent 2c2508029f
commit 072b7a0bd2
1 changed files with 9 additions and 12 deletions
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21
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
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@ -85,6 +85,13 @@ struct amdgpu_pte_update_params {
*/ */
struct amdgpu_vm *vm; struct amdgpu_vm *vm;
/**
* @pages_addr:
*
* DMA addresses to use for mapping
*/
dma_addr_t *pages_addr;
/** /**
* @src: address where to copy page table entries from * @src: address where to copy page table entries from
*/ */
@ -102,12 +109,6 @@ struct amdgpu_pte_update_params {
struct amdgpu_bo *bo, uint64_t pe, struct amdgpu_bo *bo, uint64_t pe,
uint64_t addr, unsigned count, uint32_t incr, uint64_t addr, unsigned count, uint32_t incr,
uint64_t flags); uint64_t flags);
/**
* @pages_addr:
*
* DMA addresses to use for mapping, used during VM update by CPU
*/
dma_addr_t *pages_addr;
}; };
/** /**
@ -1572,7 +1573,7 @@ static void amdgpu_vm_fragment(struct amdgpu_pte_update_params *params,
max_frag = 31; max_frag = 31;
/* system pages are non continuously */ /* system pages are non continuously */
if (params->src) { if (params->pages_addr) {
*frag = 0; *frag = 0;
*frag_end = end; *frag_end = end;
return; return;
@ -1752,16 +1753,13 @@ static int amdgpu_vm_bo_update_mapping(struct amdgpu_device *adev,
memset(&params, 0, sizeof(params)); memset(&params, 0, sizeof(params));
params.adev = adev; params.adev = adev;
params.vm = vm; params.vm = vm;
params.pages_addr = pages_addr;
/* sync to everything except eviction fences on unmapping */ /* sync to everything except eviction fences on unmapping */
if (!(flags & AMDGPU_PTE_VALID)) if (!(flags & AMDGPU_PTE_VALID))
owner = AMDGPU_FENCE_OWNER_KFD; owner = AMDGPU_FENCE_OWNER_KFD;
if (vm->use_cpu_for_update) { if (vm->use_cpu_for_update) {
/* params.src is used as flag to indicate system Memory */
if (pages_addr)
params.src = ~0;
/* Wait for PT BOs to be idle. PTs share the same resv. object /* Wait for PT BOs to be idle. PTs share the same resv. object
* as the root PD BO * as the root PD BO
*/ */
@ -1777,7 +1775,6 @@ static int amdgpu_vm_bo_update_mapping(struct amdgpu_device *adev,
} }
params.func = amdgpu_vm_cpu_set_ptes; params.func = amdgpu_vm_cpu_set_ptes;
params.pages_addr = pages_addr;
return amdgpu_vm_update_ptes(&params, start, last + 1, return amdgpu_vm_update_ptes(&params, start, last + 1,
addr, flags); addr, flags);
} }