drm/i915/gvt: Introduce intel_vgpu_reset_submission
Introduce an generic API to reset vGPU virtual submission interface. Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
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@ -564,18 +564,7 @@ void clean_execlist(struct intel_vgpu *vgpu)
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}
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}
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int init_execlist(struct intel_vgpu *vgpu)
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{
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enum intel_engine_id i;
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struct intel_engine_cs *engine;
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for_each_engine(engine, vgpu->gvt->dev_priv, i)
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init_vgpu_execlist(vgpu, i);
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return 0;
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}
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void intel_vgpu_reset_execlist(struct intel_vgpu *vgpu,
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void reset_execlist(struct intel_vgpu *vgpu,
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unsigned long engine_mask)
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{
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struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv;
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@ -587,8 +576,15 @@ void intel_vgpu_reset_execlist(struct intel_vgpu *vgpu,
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init_vgpu_execlist(vgpu, engine->id);
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}
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int init_execlist(struct intel_vgpu *vgpu)
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{
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reset_execlist(vgpu, ALL_ENGINES);
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return 0;
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}
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const struct intel_vgpu_submission_ops intel_vgpu_execlist_submission_ops = {
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.name = "execlist",
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.init = init_execlist,
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.reset = reset_execlist,
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.clean = clean_execlist,
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};
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@ -151,6 +151,7 @@ struct intel_vgpu_submission_ops {
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const char *name;
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int (*init)(struct intel_vgpu *vgpu);
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void (*clean)(struct intel_vgpu *vgpu);
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void (*reset)(struct intel_vgpu *vgpu, unsigned long engine_mask);
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};
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struct intel_vgpu_submission {
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@ -889,6 +889,26 @@ void intel_vgpu_clean_submission(struct intel_vgpu *vgpu)
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kmem_cache_destroy(s->workloads);
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}
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/**
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* intel_vgpu_reset_submission - reset submission-related resource for vGPU
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* @vgpu: a vGPU
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* @engine_mask: engines expected to be reset
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*
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* This function is called when a vGPU is being destroyed.
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*
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*/
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void intel_vgpu_reset_submission(struct intel_vgpu *vgpu,
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unsigned long engine_mask)
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{
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struct intel_vgpu_submission *s = &vgpu->submission;
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if (!s->active)
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return;
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s->ops->reset(vgpu, engine_mask);
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}
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/**
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* intel_vgpu_setup_submission - setup submission-related resource for vGPU
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* @vgpu: a vGPU
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@ -139,6 +139,9 @@ void intel_gvt_wait_vgpu_idle(struct intel_vgpu *vgpu);
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int intel_vgpu_setup_submission(struct intel_vgpu *vgpu);
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void intel_vgpu_reset_submission(struct intel_vgpu *vgpu,
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unsigned long engine_mask);
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void intel_vgpu_clean_submission(struct intel_vgpu *vgpu);
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int intel_vgpu_select_submission_ops(struct intel_vgpu *vgpu,
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@ -492,10 +492,10 @@ void intel_gvt_reset_vgpu_locked(struct intel_vgpu *vgpu, bool dmlr,
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mutex_lock(&gvt->lock);
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}
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intel_vgpu_reset_execlist(vgpu, resetting_eng);
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intel_vgpu_reset_submission(vgpu, resetting_eng);
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/* full GPU reset or device model level reset */
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if (engine_mask == ALL_ENGINES || dmlr) {
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intel_vgpu_select_submission_ops(vgpu, 0);
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/*fence will not be reset during virtual reset */
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if (dmlr) {
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