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Round one of new device support, features and cleanup for IIO in the 4.15 cycle. 

Note there is a misc driver drop in here given we have support
 in IIO and the feeling is no one will care.
 
 A large part of this series is a boiler plate removal series avoiding
 the need to explicitly provide THIS_MODULE in various locations.
 It's very dull but touches all drivers.
 
 New device support
 * ad5446
   - add ids to support compatible parts DAC081S101, DAC101S101,
     DAC121S101.
   - add the dac7512 id and drop the misc driver as feeling is no
     one is using it (was introduced for a board that is long obsolete)
 * mt6577
   - add bindings for mt2712 which is fully compatible with other
     supported parts.
 * st_pressure
   - add support for LPS33HW and LPS35HW with bindings (ids mostly).
 
 New features
 * ccs811
   - Add support for the data ready trigger.
 * mma8452
   - remove artifical restriction on supporting multiple event types
     at the same time.
 * tcs3472
   - support out of threshold events
 
 Core and tree wide cleanup
 * Use macro magic to remove the need to provide THIS_MODULE as part of
   struct iio_info or struct iio_trigger_ops.  This is similar to
   work done in a number of other subsystems (e.g. i2c, spi).
 
   All drivers are fixed and then the fields in these structures are
   removed.
 
   This will cause build failures for out of tree drivers and any
   new drivers that cross with this work going into the kernel.
 
   Note mostly done with a coccinelle patch, included in the series
   on the mailing list but not merged as the fields no longer exist
   in the structures so the any hold outs will cause a build failure.
 
 Cleanups
 * ads1015
   - avoid writing config register when it doesn't change.
   - add 10% to conversion wait time as it seems it is sometimes
     a little small.
 * ade7753
   - replace use of core mlock with a local lock.  This is part of a
     long term effort to make the use of mlock opaque and single
     purpose.
 * ade7759
   - expand the use of buf_lock to cover previous mlock cases.  This
     is a slightly nicer solution to the same issue as in ade7753.
 * cros_ec
   - drop an unused variable
 * inv_mpu6050
   - add a missing break in a switch for consistency - not actual
     bug,
   - make some local arrays static to save on object code size.
 * max5481
   - drop manual setting of the spi module owner as handled by the
     spi core.
 * max5487
   - drop manual setting of the spi module owner as handled by the
     spi core.
 * max9611
   - drop explicit setting of the i2c module owner as handled by
     the i2c core.
 * mcp320x
   - speed up reads on single channel devices,
   - drop unused of_device_id data elements,
   - document the struct mcp320x,
   - improve binding docs to reflect restrictions on spi setup and
     to make it explicit that the reference regulator is needed.
 * mma8452
   - symbolic to octal permissions,
   - unsigned to unsigned int.
 * st_lsm6dsx
   - avoid setting odr values multiple times,
   - drop config of LIR as it is only ever set to the existing
     defaults,
   - drop rounding configuration as it only ever matches the defaults.
 * ti-ads8688
   - drop manual setting of the spi module owner as handled by the
     spi core.
 * tsl2x7x
   - constify the i2c_device_id,
   - cleanup limit checks to avoid static checker warnings (and generally
     have nicer code).
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Merge tag 'iio-for-4.15a' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into staging-next

Jonathan writes:

Round one of new device support, features and cleanup for IIO in the 4.15 cycle.

Note there is a misc driver drop in here given we have support
in IIO and the feeling is no one will care.

A large part of this series is a boiler plate removal series avoiding
the need to explicitly provide THIS_MODULE in various locations.
It's very dull but touches all drivers.

New device support
* ad5446
  - add ids to support compatible parts DAC081S101, DAC101S101,
    DAC121S101.
  - add the dac7512 id and drop the misc driver as feeling is no
    one is using it (was introduced for a board that is long obsolete)
* mt6577
  - add bindings for mt2712 which is fully compatible with other
    supported parts.
* st_pressure
  - add support for LPS33HW and LPS35HW with bindings (ids mostly).

New features
* ccs811
  - Add support for the data ready trigger.
* mma8452
  - remove artifical restriction on supporting multiple event types
    at the same time.
* tcs3472
  - support out of threshold events

Core and tree wide cleanup
* Use macro magic to remove the need to provide THIS_MODULE as part of
  struct iio_info or struct iio_trigger_ops.  This is similar to
  work done in a number of other subsystems (e.g. i2c, spi).

  All drivers are fixed and then the fields in these structures are
  removed.

  This will cause build failures for out of tree drivers and any
  new drivers that cross with this work going into the kernel.

  Note mostly done with a coccinelle patch, included in the series
  on the mailing list but not merged as the fields no longer exist
  in the structures so the any hold outs will cause a build failure.

Cleanups
* ads1015
  - avoid writing config register when it doesn't change.
  - add 10% to conversion wait time as it seems it is sometimes
    a little small.
* ade7753
  - replace use of core mlock with a local lock.  This is part of a
    long term effort to make the use of mlock opaque and single
    purpose.
* ade7759
  - expand the use of buf_lock to cover previous mlock cases.  This
    is a slightly nicer solution to the same issue as in ade7753.
* cros_ec
  - drop an unused variable
* inv_mpu6050
  - add a missing break in a switch for consistency - not actual
    bug,
  - make some local arrays static to save on object code size.
* max5481
  - drop manual setting of the spi module owner as handled by the
    spi core.
* max5487
  - drop manual setting of the spi module owner as handled by the
    spi core.
* max9611
  - drop explicit setting of the i2c module owner as handled by
    the i2c core.
* mcp320x
  - speed up reads on single channel devices,
  - drop unused of_device_id data elements,
  - document the struct mcp320x,
  - improve binding docs to reflect restrictions on spi setup and
    to make it explicit that the reference regulator is needed.
* mma8452
  - symbolic to octal permissions,
  - unsigned to unsigned int.
* st_lsm6dsx
  - avoid setting odr values multiple times,
  - drop config of LIR as it is only ever set to the existing
    defaults,
  - drop rounding configuration as it only ever matches the defaults.
* ti-ads8688
  - drop manual setting of the spi module owner as handled by the
    spi core.
* tsl2x7x
  - constify the i2c_device_id,
  - cleanup limit checks to avoid static checker warnings (and generally
    have nicer code).
This commit is contained in:
Greg Kroah-Hartman 2017-09-25 12:56:37 +02:00
parent 821797e069 a678684740
commit 069f0e0c06
301 changed files with 790 additions and 830 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

14
Documentation/devicetree/bindings/iio/adc/mcp320x.txt
View File

@ -29,15 +29,29 @@ Required properties:
"microchip,mcp3204"
"microchip,mcp3208"
"microchip,mcp3301"
"microchip,mcp3550-50"
"microchip,mcp3550-60"
"microchip,mcp3551"
"microchip,mcp3553"
NOTE: The use of the compatibles with no vendor prefix
is deprecated and only listed because old DT use them.
- spi-cpha, spi-cpol (boolean):
Either SPI mode (0,0) or (1,1) must be used, so specify
none or both of spi-cpha, spi-cpol. The MCP3550/1/3
is more efficient in mode (1,1) as only 3 instead of
4 bytes need to be read from the ADC, but not all SPI
masters support it.
- vref-supply: Phandle to the external reference voltage supply.
Examples:
spi_controller {
mcp3x0x@0 {
compatible = "mcp3002";
reg = <0>;
spi-max-frequency = <1000000>;
vref-supply = <&vref_reg>;
};
};

1
Documentation/devicetree/bindings/iio/adc/mt6577_auxadc.txt
View File

@ -12,6 +12,7 @@ for the Thermal Controller which holds a phandle to the AUXADC.
Required properties:
- compatible: Should be one of:
- "mediatek,mt2701-auxadc": For MT2701 family of SoCs
- "mediatek,mt2712-auxadc": For MT2712 family of SoCs
- "mediatek,mt7622-auxadc": For MT7622 family of SoCs
- "mediatek,mt8173-auxadc": For MT8173 family of SoCs
- reg: Address range of the AUXADC unit.

2
Documentation/devicetree/bindings/iio/st-sensors.txt
View File

@ -71,3 +71,5 @@ Pressure sensors:
- st,lps25h-press
- st,lps331ap-press
- st,lps22hb-press
- st,lps33hw
- st,lps35hw

3
arch/arm/configs/pxa_defconfig
View File

@ -219,7 +219,8 @@ CONFIG_AD525X_DPOT_I2C=m
CONFIG_ICS932S401=m
CONFIG_APDS9802ALS=m
CONFIG_ISL29003=m
CONFIG_TI_DAC7512=m
CONFIG_IIO=m
CONFIG_AD5446=m
CONFIG_EEPROM_AT24=m
CONFIG_SENSORS_LIS3_SPI=m
CONFIG_IDE=m

3
arch/arm/configs/raumfeld_defconfig
View File

@ -37,7 +37,8 @@ CONFIG_MTD_NAND_PXA3xx=y
CONFIG_MTD_UBI=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_ISL29003=y
CONFIG_TI_DAC7512=y
CONFIG_IIO=y
CONFIG_AD5446=y
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_CHR_DEV_SG=y

1
drivers/iio/accel/adxl345_core.c
View File

@ -95,7 +95,6 @@ static int adxl345_read_raw(struct iio_dev *indio_dev,
}
static const struct iio_info adxl345_info = {
.driver_module = THIS_MODULE,
.read_raw = adxl345_read_raw,
};

2
drivers/iio/accel/bma180.c
View File

@ -536,7 +536,6 @@ static const struct iio_info bma180_info = {
.attrs = &bma180_attrs_group,
.read_raw = bma180_read_raw,
.write_raw = bma180_write_raw,
.driver_module = THIS_MODULE,
};
static const char * const bma180_power_modes[] = { "low_noise", "low_power" };
@ -700,7 +699,6 @@ static int bma180_trig_try_reen(struct iio_trigger *trig)
static const struct iio_trigger_ops bma180_trigger_ops = {
.set_trigger_state = bma180_data_rdy_trigger_set_state,
.try_reenable = bma180_trig_try_reen,
.owner = THIS_MODULE,
};
static int bma180_probe(struct i2c_client *client,

1
drivers/iio/accel/bma220_spi.c
View File

@ -186,7 +186,6 @@ static int bma220_write_raw(struct iio_dev *indio_dev,
}
static const struct iio_info bma220_info = {
.driver_module = THIS_MODULE,
.read_raw = bma220_read_raw,
.write_raw = bma220_write_raw,
.attrs = &bma220_attribute_group,

3
drivers/iio/accel/bmc150-accel-core.c
View File

@ -1094,7 +1094,6 @@ static const struct iio_info bmc150_accel_info = {
.write_event_value = bmc150_accel_write_event,
.write_event_config = bmc150_accel_write_event_config,
.read_event_config = bmc150_accel_read_event_config,
.driver_module = THIS_MODULE,
};
static const struct iio_info bmc150_accel_info_fifo = {
@ -1108,7 +1107,6 @@ static const struct iio_info bmc150_accel_info_fifo = {
.validate_trigger = bmc150_accel_validate_trigger,
.hwfifo_set_watermark = bmc150_accel_set_watermark,
.hwfifo_flush_to_buffer = bmc150_accel_fifo_flush,
.driver_module = THIS_MODULE,
};
static const unsigned long bmc150_accel_scan_masks[] = {
@ -1200,7 +1198,6 @@ static int bmc150_accel_trigger_set_state(struct iio_trigger *trig,
static const struct iio_trigger_ops bmc150_accel_trigger_ops = {
.set_trigger_state = bmc150_accel_trigger_set_state,
.try_reenable = bmc150_accel_trig_try_reen,
.owner = THIS_MODULE,
};
static int bmc150_accel_handle_roc_event(struct iio_dev *indio_dev)

1
drivers/iio/accel/da280.c
View File

@ -88,7 +88,6 @@ static int da280_read_raw(struct iio_dev *indio_dev,
}
static const struct iio_info da280_info = {
.driver_module = THIS_MODULE,
.read_raw = da280_read_raw,
};

1
drivers/iio/accel/da311.c
View File

@ -212,7 +212,6 @@ static int da311_read_raw(struct iio_dev *indio_dev,
}
static const struct iio_info da311_info = {
.driver_module = THIS_MODULE,
.read_raw = da311_read_raw,
};

1
drivers/iio/accel/dmard06.c
View File

@ -124,7 +124,6 @@ static int dmard06_read_raw(struct iio_dev *indio_dev,
}
static const struct iio_info dmard06_info = {
.driver_module = THIS_MODULE,
.read_raw = dmard06_read_raw,
};

1
drivers/iio/accel/dmard09.c
View File

@ -93,7 +93,6 @@ static int dmard09_read_raw(struct iio_dev *indio_dev,
}
static const struct iio_info dmard09_info = {
.driver_module = THIS_MODULE,
.read_raw = dmard09_read_raw,
};

1
drivers/iio/accel/dmard10.c
View File

@ -170,7 +170,6 @@ static int dmard10_read_raw(struct iio_dev *indio_dev,
}
static const struct iio_info dmard10_info = {
.driver_module = THIS_MODULE,
.read_raw = dmard10_read_raw,
};

1
drivers/iio/accel/hid-sensor-accel-3d.c
View File

@ -225,7 +225,6 @@ static int accel_3d_write_raw(struct iio_dev *indio_dev,
}
static const struct iio_info accel_3d_info = {
.driver_module = THIS_MODULE,
.read_raw = &accel_3d_read_raw,
.write_raw = &accel_3d_write_raw,
};

2
drivers/iio/accel/kxcjk-1013.c
View File

@ -950,7 +950,6 @@ static const struct iio_info kxcjk1013_info = {
.write_event_value = kxcjk1013_write_event,
.write_event_config = kxcjk1013_write_event_config,
.read_event_config = kxcjk1013_read_event_config,
.driver_module = THIS_MODULE,
};
static const unsigned long kxcjk1013_scan_masks[] = {0x7, 0};
@ -1036,7 +1035,6 @@ static int kxcjk1013_data_rdy_trigger_set_state(struct iio_trigger *trig,
static const struct iio_trigger_ops kxcjk1013_trigger_ops = {
.set_trigger_state = kxcjk1013_data_rdy_trigger_set_state,
.try_reenable = kxcjk1013_trig_try_reen,
.owner = THIS_MODULE,
};
static irqreturn_t kxcjk1013_event_handler(int irq, void *private)

1
drivers/iio/accel/kxsd9.c
View File

@ -390,7 +390,6 @@ static const struct iio_info kxsd9_info = {
.read_raw = &kxsd9_read_raw,
.write_raw = &kxsd9_write_raw,
.attrs = &kxsd9_attribute_group,
.driver_module = THIS_MODULE,
};
/* Four channels apart from timestamp, scan mask = 0x0f */

1
drivers/iio/accel/mc3230.c
View File

@ -107,7 +107,6 @@ static int mc3230_read_raw(struct iio_dev *indio_dev,
}
static const struct iio_info mc3230_info = {
.driver_module = THIS_MODULE,
.read_raw = mc3230_read_raw,
};

1
drivers/iio/accel/mma7455_core.c
View File

@ -199,7 +199,6 @@ static const struct iio_info mma7455_info = {
.attrs = &mma7455_group,
.read_raw = mma7455_read_raw,
.write_raw = mma7455_write_raw,
.driver_module = THIS_MODULE,
};
#define MMA7455_CHANNEL(axis, idx) { \

1
drivers/iio/accel/mma7660.c
View File

@ -168,7 +168,6 @@ static int mma7660_read_raw(struct iio_dev *indio_dev,
}
static const struct iio_info mma7660_info = {
.driver_module = THIS_MODULE,
.read_raw = mma7660_read_raw,
.attrs = &mma7660_attribute_group,
};

375
drivers/iio/accel/mma8452.c
View File

@ -59,7 +59,9 @@
#define MMA8452_FF_MT_THS 0x17
#define MMA8452_FF_MT_THS_MASK 0x7f
#define MMA8452_FF_MT_COUNT 0x18
#define MMA8452_FF_MT_CHAN_SHIFT 3
#define MMA8452_TRANSIENT_CFG 0x1d
#define MMA8452_TRANSIENT_CFG_CHAN(chan) BIT(chan + 1)
#define MMA8452_TRANSIENT_CFG_HPF_BYP BIT(0)
#define MMA8452_TRANSIENT_CFG_ELE BIT(4)
#define MMA8452_TRANSIENT_SRC 0x1e
@ -69,6 +71,7 @@
#define MMA8452_TRANSIENT_THS 0x1f
#define MMA8452_TRANSIENT_THS_MASK GENMASK(6, 0)
#define MMA8452_TRANSIENT_COUNT 0x20
#define MMA8452_TRANSIENT_CHAN_SHIFT 1
#define MMA8452_CTRL_REG1 0x2a
#define MMA8452_CTRL_ACTIVE BIT(0)
#define MMA8452_CTRL_DR_MASK GENMASK(5, 3)
@ -107,6 +110,51 @@ struct mma8452_data {
const struct mma_chip_info *chip_info;
};
/**
* struct mma8452_event_regs - chip specific data related to events
* @ev_cfg: event config register address
* @ev_cfg_ele: latch bit in event config register
* @ev_cfg_chan_shift: number of the bit to enable events in X
* direction; in event config register
* @ev_src: event source register address
* @ev_ths: event threshold register address
* @ev_ths_mask: mask for the threshold value
* @ev_count: event count (period) register address
*
* Since not all chips supported by the driver support comparing high pass
* filtered data for events (interrupts), different interrupt sources are
* used for different chips and the relevant registers are included here.
*/
struct mma8452_event_regs {
u8 ev_cfg;
u8 ev_cfg_ele;
u8 ev_cfg_chan_shift;
u8 ev_src;
u8 ev_ths;
u8 ev_ths_mask;
u8 ev_count;
};
static const struct mma8452_event_regs ev_regs_accel_falling = {
.ev_cfg = MMA8452_FF_MT_CFG,
.ev_cfg_ele = MMA8452_FF_MT_CFG_ELE,
.ev_cfg_chan_shift = MMA8452_FF_MT_CHAN_SHIFT,
.ev_src = MMA8452_FF_MT_SRC,
.ev_ths = MMA8452_FF_MT_THS,
.ev_ths_mask = MMA8452_FF_MT_THS_MASK,
.ev_count = MMA8452_FF_MT_COUNT
};
static const struct mma8452_event_regs ev_regs_accel_rising = {
.ev_cfg = MMA8452_TRANSIENT_CFG,
.ev_cfg_ele = MMA8452_TRANSIENT_CFG_ELE,
.ev_cfg_chan_shift = MMA8452_TRANSIENT_CHAN_SHIFT,
.ev_src = MMA8452_TRANSIENT_SRC,
.ev_ths = MMA8452_TRANSIENT_THS,
.ev_ths_mask = MMA8452_TRANSIENT_THS_MASK,
.ev_count = MMA8452_TRANSIENT_COUNT,
};
/**
* struct mma_chip_info - chip specific data
* @chip_id: WHO_AM_I register's value
@ -116,40 +164,16 @@ struct mma8452_data {
* @mma_scales: scale factors for converting register values
* to m/s^2; 3 modes: 2g, 4g, 8g; 2 integers
* per mode: m/s^2 and micro m/s^2
* @ev_cfg: event config register address
* @ev_cfg_ele: latch bit in event config register
* @ev_cfg_chan_shift: number of the bit to enable events in X
* direction; in event config register
* @ev_src: event source register address
* @ev_src_xe: bit in event source register that indicates
* an event in X direction
* @ev_src_ye: bit in event source register that indicates
* an event in Y direction
* @ev_src_ze: bit in event source register that indicates
* an event in Z direction
* @ev_ths: event threshold register address
* @ev_ths_mask: mask for the threshold value
* @ev_count: event count (period) register address
*
* Since not all chips supported by the driver support comparing high pass
* filtered data for events (interrupts), different interrupt sources are
* used for different chips and the relevant registers are included here.
* @all_events: all events supported by this chip
* @enabled_events: event flags enabled and handled by this driver
*/
struct mma_chip_info {
u8 chip_id;
const struct iio_chan_spec *channels;
int num_channels;
const int mma_scales[3][2];
u8 ev_cfg;
u8 ev_cfg_ele;
u8 ev_cfg_chan_shift;
u8 ev_src;
u8 ev_src_xe;
u8 ev_src_ye;
u8 ev_src_ze;
u8 ev_ths;
u8 ev_ths_mask;
u8 ev_count;
int all_events;
int enabled_events;
};
enum {
@ -394,11 +418,11 @@ static ssize_t mma8452_show_os_ratio_avail(struct device *dev,
}
static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(mma8452_show_samp_freq_avail);
static IIO_DEVICE_ATTR(in_accel_scale_available, S_IRUGO,
static IIO_DEVICE_ATTR(in_accel_scale_available, 0444,
mma8452_show_scale_avail, NULL, 0);
static IIO_DEVICE_ATTR(in_accel_filter_high_pass_3db_frequency_available,
S_IRUGO, mma8452_show_hp_cutoff_avail, NULL, 0);
static IIO_DEVICE_ATTR(in_accel_oversampling_ratio_available, S_IRUGO,
0444, mma8452_show_hp_cutoff_avail, NULL, 0);
static IIO_DEVICE_ATTR(in_accel_oversampling_ratio_available, 0444,
mma8452_show_os_ratio_avail, NULL, 0);
static int mma8452_get_samp_freq_index(struct mma8452_data *data,
@ -602,9 +626,8 @@ static int mma8452_set_power_mode(struct mma8452_data *data, u8 mode)
static int mma8452_freefall_mode_enabled(struct mma8452_data *data)
{
int val;
const struct mma_chip_info *chip = data->chip_info;
val = i2c_smbus_read_byte_data(data->client, chip->ev_cfg);
val = i2c_smbus_read_byte_data(data->client, MMA8452_FF_MT_CFG);
if (val < 0)
return val;
@ -614,29 +637,28 @@ static int mma8452_freefall_mode_enabled(struct mma8452_data *data)
static int mma8452_set_freefall_mode(struct mma8452_data *data, bool state)
{
int val;
const struct mma_chip_info *chip = data->chip_info;
if ((state && mma8452_freefall_mode_enabled(data)) ||
(!state && !(mma8452_freefall_mode_enabled(data))))
return 0;
val = i2c_smbus_read_byte_data(data->client, chip->ev_cfg);
val = i2c_smbus_read_byte_data(data->client, MMA8452_FF_MT_CFG);
if (val < 0)
return val;
if (state) {
val |= BIT(idx_x + chip->ev_cfg_chan_shift);
val |= BIT(idx_y + chip->ev_cfg_chan_shift);
val |= BIT(idx_z + chip->ev_cfg_chan_shift);
val |= BIT(idx_x + MMA8452_FF_MT_CHAN_SHIFT);
val |= BIT(idx_y + MMA8452_FF_MT_CHAN_SHIFT);
val |= BIT(idx_z + MMA8452_FF_MT_CHAN_SHIFT);
val &= ~MMA8452_FF_MT_CFG_OAE;
} else {
val &= ~BIT(idx_x + chip->ev_cfg_chan_shift);
val &= ~BIT(idx_y + chip->ev_cfg_chan_shift);
val &= ~BIT(idx_z + chip->ev_cfg_chan_shift);
val &= ~BIT(idx_x + MMA8452_FF_MT_CHAN_SHIFT);
val &= ~BIT(idx_y + MMA8452_FF_MT_CHAN_SHIFT);
val &= ~BIT(idx_z + MMA8452_FF_MT_CHAN_SHIFT);
val |= MMA8452_FF_MT_CFG_OAE;
}
return mma8452_change_config(data, chip->ev_cfg, val);
return mma8452_change_config(data, MMA8452_FF_MT_CFG, val);
}
static int mma8452_set_hp_filter_frequency(struct mma8452_data *data,
@ -740,6 +762,36 @@ static int mma8452_write_raw(struct iio_dev *indio_dev,
return ret;
}
static int mma8452_get_event_regs(struct mma8452_data *data,
const struct iio_chan_spec *chan, enum iio_event_direction dir,
const struct mma8452_event_regs **ev_reg)
{
if (!chan)
return -EINVAL;
switch (chan->type) {
case IIO_ACCEL:
switch (dir) {
case IIO_EV_DIR_RISING:
if ((data->chip_info->all_events
& MMA8452_INT_TRANS) &&
(data->chip_info->enabled_events
& MMA8452_INT_TRANS))
*ev_reg = &ev_regs_accel_rising;
else
*ev_reg = &ev_regs_accel_falling;
return 0;
case IIO_EV_DIR_FALLING:
*ev_reg = &ev_regs_accel_falling;
return 0;
default:
return -EINVAL;
}
default:
return -EINVAL;
}
}
static int mma8452_read_thresh(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
@ -749,21 +801,24 @@ static int mma8452_read_thresh(struct iio_dev *indio_dev,
{
struct mma8452_data *data = iio_priv(indio_dev);
int ret, us, power_mode;
const struct mma8452_event_regs *ev_regs;
ret = mma8452_get_event_regs(data, chan, dir, &ev_regs);
if (ret)
return ret;
switch (info) {
case IIO_EV_INFO_VALUE:
ret = i2c_smbus_read_byte_data(data->client,
data->chip_info->ev_ths);
ret = i2c_smbus_read_byte_data(data->client, ev_regs->ev_ths);
if (ret < 0)
return ret;
*val = ret & data->chip_info->ev_ths_mask;
*val = ret & ev_regs->ev_ths_mask;
return IIO_VAL_INT;
case IIO_EV_INFO_PERIOD:
ret = i2c_smbus_read_byte_data(data->client,
data->chip_info->ev_count);
ret = i2c_smbus_read_byte_data(data->client, ev_regs->ev_count);
if (ret < 0)
return ret;
@ -809,14 +864,18 @@ static int mma8452_write_thresh(struct iio_dev *indio_dev,
{
struct mma8452_data *data = iio_priv(indio_dev);
int ret, reg, steps;
const struct mma8452_event_regs *ev_regs;
ret = mma8452_get_event_regs(data, chan, dir, &ev_regs);
if (ret)
return ret;
switch (info) {
case IIO_EV_INFO_VALUE:
if (val < 0 || val > MMA8452_TRANSIENT_THS_MASK)
if (val < 0 || val > ev_regs->ev_ths_mask)
return -EINVAL;
return mma8452_change_config(data, data->chip_info->ev_ths,
val);
return mma8452_change_config(data, ev_regs->ev_ths, val);
case IIO_EV_INFO_PERIOD:
ret = mma8452_get_power_mode(data);
@ -830,8 +889,7 @@ static int mma8452_write_thresh(struct iio_dev *indio_dev,
if (steps < 0 || steps > 0xff)
return -EINVAL;
return mma8452_change_config(data, data->chip_info->ev_count,
steps);
return mma8452_change_config(data, ev_regs->ev_count, steps);
case IIO_EV_INFO_HIGH_PASS_FILTER_3DB:
reg = i2c_smbus_read_byte_data(data->client,
@ -861,23 +919,24 @@ static int mma8452_read_event_config(struct iio_dev *indio_dev,
enum iio_event_direction dir)
{
struct mma8452_data *data = iio_priv(indio_dev);
const struct mma_chip_info *chip = data->chip_info;
int ret;
const struct mma8452_event_regs *ev_regs;
ret = mma8452_get_event_regs(data, chan, dir, &ev_regs);
if (ret)
return ret;
switch (dir) {
case IIO_EV_DIR_FALLING:
return mma8452_freefall_mode_enabled(data);
case IIO_EV_DIR_RISING:
if (mma8452_freefall_mode_enabled(data))
return 0;
ret = i2c_smbus_read_byte_data(data->client,
data->chip_info->ev_cfg);
ev_regs->ev_cfg);
if (ret < 0)
return ret;
return !!(ret & BIT(chan->scan_index +
chip->ev_cfg_chan_shift));
ev_regs->ev_cfg_chan_shift));
default:
return -EINVAL;
}
@ -890,8 +949,12 @@ static int mma8452_write_event_config(struct iio_dev *indio_dev,
int state)
{
struct mma8452_data *data = iio_priv(indio_dev);
const struct mma_chip_info *chip = data->chip_info;
int val, ret;
const struct mma8452_event_regs *ev_regs;
ret = mma8452_get_event_regs(data, chan, dir, &ev_regs);
if (ret)
return ret;
ret = mma8452_set_runtime_pm_state(data->client, state);
if (ret)
@ -901,28 +964,30 @@ static int mma8452_write_event_config(struct iio_dev *indio_dev,
case IIO_EV_DIR_FALLING:
return mma8452_set_freefall_mode(data, state);
case IIO_EV_DIR_RISING:
val = i2c_smbus_read_byte_data(data->client, chip->ev_cfg);
val = i2c_smbus_read_byte_data(data->client, ev_regs->ev_cfg);
if (val < 0)
return val;
if (state) {
if (mma8452_freefall_mode_enabled(data)) {
val &= ~BIT(idx_x + chip->ev_cfg_chan_shift);
val &= ~BIT(idx_y + chip->ev_cfg_chan_shift);
val &= ~BIT(idx_z + chip->ev_cfg_chan_shift);
val &= ~BIT(idx_x + ev_regs->ev_cfg_chan_shift);
val &= ~BIT(idx_y + ev_regs->ev_cfg_chan_shift);
val &= ~BIT(idx_z + ev_regs->ev_cfg_chan_shift);
val |= MMA8452_FF_MT_CFG_OAE;
}
val |= BIT(chan->scan_index + chip->ev_cfg_chan_shift);
val |= BIT(chan->scan_index +
ev_regs->ev_cfg_chan_shift);
} else {
if (mma8452_freefall_mode_enabled(data))
return 0;
val &= ~BIT(chan->scan_index + chip->ev_cfg_chan_shift);
val &= ~BIT(chan->scan_index +
ev_regs->ev_cfg_chan_shift);
}
val |= chip->ev_cfg_ele;
val |= ev_regs->ev_cfg_ele;
return mma8452_change_config(data, chip->ev_cfg, val);
return mma8452_change_config(data, ev_regs->ev_cfg, val);
default:
return -EINVAL;
}
@ -934,35 +999,25 @@ static void mma8452_transient_interrupt(struct iio_dev *indio_dev)
s64 ts = iio_get_time_ns(indio_dev);
int src;
src = i2c_smbus_read_byte_data(data->client, data->chip_info->ev_src);
src = i2c_smbus_read_byte_data(data->client, MMA8452_TRANSIENT_SRC);
if (src < 0)
return;
if (mma8452_freefall_mode_enabled(data)) {
iio_push_event(indio_dev,
IIO_MOD_EVENT_CODE(IIO_ACCEL, 0,
IIO_MOD_X_AND_Y_AND_Z,
IIO_EV_TYPE_MAG,
IIO_EV_DIR_FALLING),
ts);
return;
}
if (src & data->chip_info->ev_src_xe)
if (src & MMA8452_TRANSIENT_SRC_XTRANSE)
iio_push_event(indio_dev,
IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, IIO_MOD_X,
IIO_EV_TYPE_MAG,
IIO_EV_DIR_RISING),
ts);
if (src & data->chip_info->ev_src_ye)
if (src & MMA8452_TRANSIENT_SRC_YTRANSE)
iio_push_event(indio_dev,
IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, IIO_MOD_Y,
IIO_EV_TYPE_MAG,
IIO_EV_DIR_RISING),
ts);
if (src & data->chip_info->ev_src_ze)
if (src & MMA8452_TRANSIENT_SRC_ZTRANSE)
iio_push_event(indio_dev,
IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, IIO_MOD_Z,
IIO_EV_TYPE_MAG,
@ -974,7 +1029,6 @@ static irqreturn_t mma8452_interrupt(int irq, void *p)
{
struct iio_dev *indio_dev = p;
struct mma8452_data *data = iio_priv(indio_dev);
const struct mma_chip_info *chip = data->chip_info;
int ret = IRQ_NONE;
int src;
@ -982,15 +1036,29 @@ static irqreturn_t mma8452_interrupt(int irq, void *p)
if (src < 0)
return IRQ_NONE;
if (!(src & data->chip_info->enabled_events))
return IRQ_NONE;
if (src & MMA8452_INT_DRDY) {
iio_trigger_poll_chained(indio_dev->trig);
ret = IRQ_HANDLED;
}
if ((src & MMA8452_INT_TRANS &&
chip->ev_src == MMA8452_TRANSIENT_SRC) ||
(src & MMA8452_INT_FF_MT &&
chip->ev_src == MMA8452_FF_MT_SRC)) {
if (src & MMA8452_INT_FF_MT) {
if (mma8452_freefall_mode_enabled(data)) {
s64 ts = iio_get_time_ns(indio_dev);
iio_push_event(indio_dev,
IIO_MOD_EVENT_CODE(IIO_ACCEL, 0,
IIO_MOD_X_AND_Y_AND_Z,
IIO_EV_TYPE_MAG,
IIO_EV_DIR_FALLING),
ts);
}
ret = IRQ_HANDLED;
}
if (src & MMA8452_INT_TRANS) {
mma8452_transient_interrupt(indio_dev);
ret = IRQ_HANDLED;
}
@ -1020,8 +1088,8 @@ done:
}
static int mma8452_reg_access_dbg(struct iio_dev *indio_dev,
unsigned reg, unsigned writeval,
unsigned *readval)
unsigned int reg, unsigned int writeval,
unsigned int *readval)
{
int ret;
struct mma8452_data *data = iio_priv(indio_dev);
@ -1222,96 +1290,87 @@ static const struct mma_chip_info mma_chip_info_table[] = {
* g * N * 1000000 / 2048 for N = 2, 4, 8 and g=9.80665
*/
.mma_scales = { {0, 2394}, {0, 4788}, {0, 9577} },
.ev_cfg = MMA8452_TRANSIENT_CFG,
.ev_cfg_ele = MMA8452_TRANSIENT_CFG_ELE,
.ev_cfg_chan_shift = 1,
.ev_src = MMA8452_TRANSIENT_SRC,
.ev_src_xe = MMA8452_TRANSIENT_SRC_XTRANSE,
.ev_src_ye = MMA8452_TRANSIENT_SRC_YTRANSE,
.ev_src_ze = MMA8452_TRANSIENT_SRC_ZTRANSE,
.ev_ths = MMA8452_TRANSIENT_THS,
.ev_ths_mask = MMA8452_TRANSIENT_THS_MASK,
.ev_count = MMA8452_TRANSIENT_COUNT,
/*
* Although we enable the interrupt sources once and for
* all here the event detection itself is not enabled until
* userspace asks for it by mma8452_write_event_config()
*/
.all_events = MMA8452_INT_DRDY |
MMA8452_INT_TRANS |
MMA8452_INT_FF_MT,
.enabled_events = MMA8452_INT_TRANS |
MMA8452_INT_FF_MT,
},
[mma8452] = {
.chip_id = MMA8452_DEVICE_ID,
.channels = mma8452_channels,
.num_channels = ARRAY_SIZE(mma8452_channels),
.mma_scales = { {0, 9577}, {0, 19154}, {0, 38307} },
.ev_cfg = MMA8452_TRANSIENT_CFG,
.ev_cfg_ele = MMA8452_TRANSIENT_CFG_ELE,
.ev_cfg_chan_shift = 1,
.ev_src = MMA8452_TRANSIENT_SRC,
.ev_src_xe = MMA8452_TRANSIENT_SRC_XTRANSE,
.ev_src_ye = MMA8452_TRANSIENT_SRC_YTRANSE,
.ev_src_ze = MMA8452_TRANSIENT_SRC_ZTRANSE,
.ev_ths = MMA8452_TRANSIENT_THS,
.ev_ths_mask = MMA8452_TRANSIENT_THS_MASK,
.ev_count = MMA8452_TRANSIENT_COUNT,
/*
* Although we enable the interrupt sources once and for
* all here the event detection itself is not enabled until
* userspace asks for it by mma8452_write_event_config()
*/
.all_events = MMA8452_INT_DRDY |
MMA8452_INT_TRANS |
MMA8452_INT_FF_MT,
.enabled_events = MMA8452_INT_TRANS |
MMA8452_INT_FF_MT,
},
[mma8453] = {
.chip_id = MMA8453_DEVICE_ID,
.channels = mma8453_channels,
.num_channels = ARRAY_SIZE(mma8453_channels),
.mma_scales = { {0, 38307}, {0, 76614}, {0, 153228} },
.ev_cfg = MMA8452_TRANSIENT_CFG,
.ev_cfg_ele = MMA8452_TRANSIENT_CFG_ELE,
.ev_cfg_chan_shift = 1,
.ev_src = MMA8452_TRANSIENT_SRC,
.ev_src_xe = MMA8452_TRANSIENT_SRC_XTRANSE,
.ev_src_ye = MMA8452_TRANSIENT_SRC_YTRANSE,
.ev_src_ze = MMA8452_TRANSIENT_SRC_ZTRANSE,
.ev_ths = MMA8452_TRANSIENT_THS,
.ev_ths_mask = MMA8452_TRANSIENT_THS_MASK,
.ev_count = MMA8452_TRANSIENT_COUNT,
/*
* Although we enable the interrupt sources once and for
* all here the event detection itself is not enabled until
* userspace asks for it by mma8452_write_event_config()
*/
.all_events = MMA8452_INT_DRDY |
MMA8452_INT_TRANS |
MMA8452_INT_FF_MT,
.enabled_events = MMA8452_INT_TRANS |
MMA8452_INT_FF_MT,
},
[mma8652] = {
.chip_id = MMA8652_DEVICE_ID,
.channels = mma8652_channels,
.num_channels = ARRAY_SIZE(mma8652_channels),
.mma_scales = { {0, 9577}, {0, 19154}, {0, 38307} },
.ev_cfg = MMA8452_FF_MT_CFG,
.ev_cfg_ele = MMA8452_FF_MT_CFG_ELE,
.ev_cfg_chan_shift = 3,
.ev_src = MMA8452_FF_MT_SRC,
.ev_src_xe = MMA8452_FF_MT_SRC_XHE,
.ev_src_ye = MMA8452_FF_MT_SRC_YHE,
.ev_src_ze = MMA8452_FF_MT_SRC_ZHE,
.ev_ths = MMA8452_FF_MT_THS,
.ev_ths_mask = MMA8452_FF_MT_THS_MASK,
.ev_count = MMA8452_FF_MT_COUNT,
.all_events = MMA8452_INT_DRDY |
MMA8452_INT_FF_MT,
.enabled_events = MMA8452_INT_FF_MT,
},
[mma8653] = {
.chip_id = MMA8653_DEVICE_ID,
.channels = mma8653_channels,
.num_channels = ARRAY_SIZE(mma8653_channels),
.mma_scales = { {0, 38307}, {0, 76614}, {0, 153228} },
.ev_cfg = MMA8452_FF_MT_CFG,
.ev_cfg_ele = MMA8452_FF_MT_CFG_ELE,
.ev_cfg_chan_shift = 3,
.ev_src = MMA8452_FF_MT_SRC,
.ev_src_xe = MMA8452_FF_MT_SRC_XHE,
.ev_src_ye = MMA8452_FF_MT_SRC_YHE,
.ev_src_ze = MMA8452_FF_MT_SRC_ZHE,
.ev_ths = MMA8452_FF_MT_THS,
.ev_ths_mask = MMA8452_FF_MT_THS_MASK,
.ev_count = MMA8452_FF_MT_COUNT,
/*
* Although we enable the interrupt sources once and for
* all here the event detection itself is not enabled until
* userspace asks for it by mma8452_write_event_config()
*/
.all_events = MMA8452_INT_DRDY |
MMA8452_INT_FF_MT,
.enabled_events = MMA8452_INT_FF_MT,
},
[fxls8471] = {
.chip_id = FXLS8471_DEVICE_ID,
.channels = mma8451_channels,
.num_channels = ARRAY_SIZE(mma8451_channels),
.mma_scales = { {0, 2394}, {0, 4788}, {0, 9577} },
.ev_cfg = MMA8452_TRANSIENT_CFG,
.ev_cfg_ele = MMA8452_TRANSIENT_CFG_ELE,
.ev_cfg_chan_shift = 1,
.ev_src = MMA8452_TRANSIENT_SRC,
.ev_src_xe = MMA8452_TRANSIENT_SRC_XTRANSE,
.ev_src_ye = MMA8452_TRANSIENT_SRC_YTRANSE,
.ev_src_ze = MMA8452_TRANSIENT_SRC_ZTRANSE,
.ev_ths = MMA8452_TRANSIENT_THS,
.ev_ths_mask = MMA8452_TRANSIENT_THS_MASK,
.ev_count = MMA8452_TRANSIENT_COUNT,
/*
* Although we enable the interrupt sources once and for
* all here the event detection itself is not enabled until
* userspace asks for it by mma8452_write_event_config()
*/
.all_events = MMA8452_INT_DRDY |
MMA8452_INT_TRANS |
MMA8452_INT_FF_MT,
.enabled_events = MMA8452_INT_TRANS |
MMA8452_INT_FF_MT,
},
};
@ -1337,7 +1396,6 @@ static const struct iio_info mma8452_info = {
.read_event_config = &mma8452_read_event_config,
.write_event_config = &mma8452_write_event_config,
.debugfs_reg_access = &mma8452_reg_access_dbg,
.driver_module = THIS_MODULE,
};
static const unsigned long mma8452_scan_masks[] = {0x7, 0};
@ -1368,7 +1426,6 @@ static int mma8452_data_rdy_trigger_set_state(struct iio_trigger *trig,
static const struct iio_trigger_ops mma8452_trigger_ops = {
.set_trigger_state = mma8452_data_rdy_trigger_set_state,
.validate_device = iio_trigger_validate_own_device,
.owner = THIS_MODULE,
};
static int mma8452_trigger_setup(struct iio_dev *indio_dev)
@ -1509,16 +1566,6 @@ static int mma8452_probe(struct i2c_client *client,
return ret;
if (client->irq) {
/*
* Although we enable the interrupt sources once and for
* all here the event detection itself is not enabled until
* userspace asks for it by mma8452_write_event_config()
*/
int supported_interrupts = MMA8452_INT_DRDY |
MMA8452_INT_TRANS |
MMA8452_INT_FF_MT;
int enabled_interrupts = MMA8452_INT_TRANS |
MMA8452_INT_FF_MT;
int irq2;
irq2 = of_irq_get_byname(client->dev.of_node, "INT2");
@ -1527,8 +1574,8 @@ static int mma8452_probe(struct i2c_client *client,
dev_dbg(&client->dev, "using interrupt line INT2\n");
} else {
ret = i2c_smbus_write_byte_data(client,
MMA8452_CTRL_REG5,
supported_interrupts);
MMA8452_CTRL_REG5,
data->chip_info->all_events);
if (ret < 0)
return ret;
@ -1536,8 +1583,8 @@ static int mma8452_probe(struct i2c_client *client,
}
ret = i2c_smbus_write_byte_data(client,
MMA8452_CTRL_REG4,
enabled_interrupts);
MMA8452_CTRL_REG4,
data->chip_info->enabled_events);
if (ret < 0)
return ret;

1
drivers/iio/accel/mma9551.c
View File

@ -332,7 +332,6 @@ static const struct iio_chan_spec mma9551_channels[] = {
};
static const struct iio_info mma9551_info = {
.driver_module = THIS_MODULE,
.read_raw = mma9551_read_raw,
.read_event_config = mma9551_read_event_config,
.write_event_config = mma9551_write_event_config,

1
drivers/iio/accel/mma9553.c
View File

@ -987,7 +987,6 @@ static const struct iio_chan_spec mma9553_channels[] = {
};
static const struct iio_info mma9553_info = {
.driver_module = THIS_MODULE,
.read_raw = mma9553_read_raw,
.write_raw = mma9553_write_raw,
.read_event_config = mma9553_read_event_config,

2
drivers/iio/accel/mxc4005.c
View File

@ -264,7 +264,6 @@ static int mxc4005_write_raw(struct iio_dev *indio_dev,
}
static const struct iio_info mxc4005_info = {
.driver_module = THIS_MODULE,
.read_raw = mxc4005_read_raw,
.write_raw = mxc4005_write_raw,
.attrs = &mxc4005_attrs_group,
@ -376,7 +375,6 @@ static int mxc4005_trigger_try_reen(struct iio_trigger *trig)
static const struct iio_trigger_ops mxc4005_trigger_ops = {
.set_trigger_state = mxc4005_set_trigger_state,
.try_reenable = mxc4005_trigger_try_reen,
.owner = THIS_MODULE,
};
static int mxc4005_chip_init(struct mxc4005_data *data)

1
drivers/iio/accel/mxc6255.c
View File

@ -78,7 +78,6 @@ static int mxc6255_read_raw(struct iio_dev *indio_dev,
}
static const struct iio_info mxc6255_info = {
.driver_module = THIS_MODULE,
.read_raw = mxc6255_read_raw,
};

1
drivers/iio/accel/sca3000.c
View File

@ -1454,7 +1454,6 @@ static const struct iio_info sca3000_info = {
.write_event_value = &sca3000_write_event_value,
.read_event_config = &sca3000_read_event_config,
.write_event_config = &sca3000_write_event_config,
.driver_module = THIS_MODULE,
};
static int sca3000_probe(struct spi_device *spi)

2
drivers/iio/accel/st_accel_core.c
View File

@ -721,7 +721,6 @@ static const struct attribute_group st_accel_attribute_group = {
};
static const struct iio_info accel_info = {
.driver_module = THIS_MODULE,
.attrs = &st_accel_attribute_group,
.read_raw = &st_accel_read_raw,
.write_raw = &st_accel_write_raw,
@ -730,7 +729,6 @@ static const struct iio_info accel_info = {
#ifdef CONFIG_IIO_TRIGGER
static const struct iio_trigger_ops st_accel_trigger_ops = {
.owner = THIS_MODULE,
.set_trigger_state = ST_ACCEL_TRIGGER_SET_STATE,
.validate_device = st_sensors_validate_device,
};

2
drivers/iio/accel/stk8312.c
View File

@ -237,7 +237,6 @@ static int stk8312_data_rdy_trigger_set_state(struct iio_trigger *trig,
static const struct iio_trigger_ops stk8312_trigger_ops = {
.set_trigger_state = stk8312_data_rdy_trigger_set_state,
.owner = THIS_MODULE,
};
static int stk8312_set_sample_rate(struct stk8312_data *data, u8 rate)
@ -421,7 +420,6 @@ static int stk8312_write_raw(struct iio_dev *indio_dev,
}
static const struct iio_info stk8312_info = {
.driver_module = THIS_MODULE,
.read_raw = stk8312_read_raw,
.write_raw = stk8312_write_raw,
.attrs = &stk8312_attribute_group,

2
drivers/iio/accel/stk8ba50.c
View File

@ -179,7 +179,6 @@ static int stk8ba50_data_rdy_trigger_set_state(struct iio_trigger *trig,
static const struct iio_trigger_ops stk8ba50_trigger_ops = {
.set_trigger_state = stk8ba50_data_rdy_trigger_set_state,
.owner = THIS_MODULE,
};
static int stk8ba50_set_power(struct stk8ba50_data *data, bool mode)
@ -307,7 +306,6 @@ static int stk8ba50_write_raw(struct iio_dev *indio_dev,
}
static const struct iio_info stk8ba50_info = {
.driver_module = THIS_MODULE,
.read_raw = stk8ba50_read_raw,
.write_raw = stk8ba50_write_raw,
.attrs = &stk8ba50_attribute_group,

1
drivers/iio/adc/ad7266.c
View File

@ -280,7 +280,6 @@ static AD7266_DECLARE_DIFF_CHANNELS_FIXED(u, 'u');
static const struct iio_info ad7266_info = {
.read_raw = &ad7266_read_raw,
.update_scan_mode = &ad7266_update_scan_mode,
.driver_module = THIS_MODULE,
};
static const unsigned long ad7266_available_scan_masks[] = {

1
drivers/iio/adc/ad7291.c
View File

@ -461,7 +461,6 @@ static const struct iio_info ad7291_info = {
.write_event_config = &ad7291_write_event_config,
.read_event_value = &ad7291_read_event_value,
.write_event_value = &ad7291_write_event_value,
.driver_module = THIS_MODULE,
};
static int ad7291_probe(struct i2c_client *client,

1
drivers/iio/adc/ad7298.c
View File

@ -280,7 +280,6 @@ static int ad7298_read_raw(struct iio_dev *indio_dev,
static const struct iio_info ad7298_info = {
.read_raw = &ad7298_read_raw,
.update_scan_mode = ad7298_update_scan_mode,
.driver_module = THIS_MODULE,
};
static int ad7298_probe(struct spi_device *spi)

1
drivers/iio/adc/ad7476.c
View File

@ -195,7 +195,6 @@ static const struct ad7476_chip_info ad7476_chip_info_tbl[] = {
};
static const struct iio_info ad7476_info = {
.driver_module = THIS_MODULE,
.read_raw = &ad7476_read_raw,
};

2
drivers/iio/adc/ad7766.c
View File

@ -185,7 +185,6 @@ static const struct iio_buffer_setup_ops ad7766_buffer_setup_ops = {
};
static const struct iio_info ad7766_info = {
.driver_module = THIS_MODULE,
.read_raw = &ad7766_read_raw,
};
@ -208,7 +207,6 @@ static int ad7766_set_trigger_state(struct iio_trigger *trig, bool enable)
}
static const struct iio_trigger_ops ad7766_trigger_ops = {
.owner = THIS_MODULE,
.set_trigger_state = ad7766_set_trigger_state,
.validate_device = iio_trigger_validate_own_device,
};

2
drivers/iio/adc/ad7791.c
View File

@ -308,13 +308,11 @@ static const struct iio_info ad7791_info = {
.read_raw = &ad7791_read_raw,
.attrs = &ad7791_attribute_group,
.validate_trigger = ad_sd_validate_trigger,
.driver_module = THIS_MODULE,
};
static const struct iio_info ad7791_no_filter_info = {
.read_raw = &ad7791_read_raw,
.validate_trigger = ad_sd_validate_trigger,
.driver_module = THIS_MODULE,
};
static int ad7791_setup(struct ad7791_state *st,

2
drivers/iio/adc/ad7793.c
View File

@ -563,7 +563,6 @@ static const struct iio_info ad7793_info = {
.write_raw_get_fmt = &ad7793_write_raw_get_fmt,
.attrs = &ad7793_attribute_group,
.validate_trigger = ad_sd_validate_trigger,
.driver_module = THIS_MODULE,
};
static const struct iio_info ad7797_info = {
@ -572,7 +571,6 @@ static const struct iio_info ad7797_info = {
.write_raw_get_fmt = &ad7793_write_raw_get_fmt,
.attrs = &ad7793_attribute_group,
.validate_trigger = ad_sd_validate_trigger,
.driver_module = THIS_MODULE,
};
#define DECLARE_AD7793_CHANNELS(_name, _b, _sb, _s) \

1
drivers/iio/adc/ad7887.c
View File

@ -229,7 +229,6 @@ static const struct ad7887_chip_info ad7887_chip_info_tbl[] = {
static const struct iio_info ad7887_info = {
.read_raw = &ad7887_read_raw,
.driver_module = THIS_MODULE,
};
static int ad7887_probe(struct spi_device *spi)

1
drivers/iio/adc/ad7923.c
View File

@ -262,7 +262,6 @@ static int ad7923_read_raw(struct iio_dev *indio_dev,
static const struct iio_info ad7923_info = {
.read_raw = &ad7923_read_raw,
.update_scan_mode = ad7923_update_scan_mode,
.driver_module = THIS_MODULE,
};
static int ad7923_probe(struct spi_device *spi)

3
drivers/iio/adc/ad799x.c
View File

@ -526,13 +526,11 @@ static const struct attribute_group ad799x_event_attrs_group = {
static const struct iio_info ad7991_info = {
.read_raw = &ad799x_read_raw,
.driver_module = THIS_MODULE,
.update_scan_mode = ad799x_update_scan_mode,
};
static const struct iio_info ad7993_4_7_8_noirq_info = {
.read_raw = &ad799x_read_raw,
.driver_module = THIS_MODULE,
.update_scan_mode = ad799x_update_scan_mode,
};
@ -543,7 +541,6 @@ static const struct iio_info ad7993_4_7_8_irq_info = {
.write_event_config = &ad799x_write_event_config,
.read_event_value = &ad799x_read_event_value,
.write_event_value = &ad799x_write_event_value,
.driver_module = THIS_MODULE,
.update_scan_mode = ad799x_update_scan_mode,
};

1
drivers/iio/adc/ad_sigma_delta.c
View File

@ -435,7 +435,6 @@ int ad_sd_validate_trigger(struct iio_dev *indio_dev, struct iio_trigger *trig)
EXPORT_SYMBOL_GPL(ad_sd_validate_trigger);
static const struct iio_trigger_ops ad_sd_trigger_ops = {
.owner = THIS_MODULE,
};
static int ad_sd_probe_trigger(struct iio_dev *indio_dev)

1
drivers/iio/adc/aspeed_adc.c
View File

@ -165,7 +165,6 @@ static int aspeed_adc_reg_access(struct iio_dev *indio_dev,
}
static const struct iio_info aspeed_adc_iio_info = {
.driver_module = THIS_MODULE,
.read_raw = aspeed_adc_read_raw,
.write_raw = aspeed_adc_write_raw,
.debugfs_reg_access = aspeed_adc_reg_access,

2
drivers/iio/adc/at91-sama5d2_adc.c
View File

@ -338,7 +338,6 @@ static int at91_adc_reenable_trigger(struct iio_trigger *trig)
}
static const struct iio_trigger_ops at91_adc_trigger_ops = {
.owner = THIS_MODULE,
.set_trigger_state = &at91_adc_configure_trigger,
.try_reenable = &at91_adc_reenable_trigger,
};
@ -574,7 +573,6 @@ static int at91_adc_write_raw(struct iio_dev *indio_dev,
static const struct iio_info at91_adc_info = {
.read_raw = &at91_adc_read_raw,
.write_raw = &at91_adc_write_raw,
.driver_module = THIS_MODULE,
};
static void at91_adc_hw_init(struct at91_adc_state *st)

2
drivers/iio/adc/at91_adc.c
View File

@ -594,7 +594,6 @@ static int at91_adc_configure_trigger(struct iio_trigger *trig, bool state)
}
static const struct iio_trigger_ops at91_adc_trigger_ops = {
.owner = THIS_MODULE,
.set_trigger_state = &at91_adc_configure_trigger,
};
@ -976,7 +975,6 @@ static int at91_adc_probe_pdata(struct at91_adc_state *st,
}
static const struct iio_info at91_adc_info = {
.driver_module = THIS_MODULE,
.read_raw = &at91_adc_read_raw,
};

2
drivers/iio/adc/axp20x_adc.c
View File

@ -464,12 +464,10 @@ static int axp20x_write_raw(struct iio_dev *indio_dev,
static const struct iio_info axp20x_adc_iio_info = {
.read_raw = axp20x_read_raw,
.write_raw = axp20x_write_raw,
.driver_module = THIS_MODULE,
};
static const struct iio_info axp22x_adc_iio_info = {
.read_raw = axp22x_read_raw,
.driver_module = THIS_MODULE,
};
static int axp20x_adc_rate(int rate)

1
drivers/iio/adc/axp288_adc.c
View File

@ -183,7 +183,6 @@ static int axp288_adc_set_state(struct regmap *regmap)
static const struct iio_info axp288_adc_iio_info = {
.read_raw = &axp288_adc_read_raw,
.driver_module = THIS_MODULE,
};
static int axp288_adc_probe(struct platform_device *pdev)

1
drivers/iio/adc/bcm_iproc_adc.c
View File

@ -492,7 +492,6 @@ static int iproc_adc_read_raw(struct iio_dev *indio_dev,
static const struct iio_info iproc_adc_iio_info = {
.read_raw = &iproc_adc_read_raw,
.driver_module = THIS_MODULE,
};
#define IPROC_ADC_CHANNEL(_index, _id) { \

1
drivers/iio/adc/berlin2-adc.c
View File

@ -277,7 +277,6 @@ static irqreturn_t berlin2_adc_tsen_irq(int irq, void *private)
}
static const struct iio_info berlin2_adc_info = {
.driver_module = THIS_MODULE,
.read_raw = berlin2_adc_read_raw,
};

1
drivers/iio/adc/cc10001_adc.c
View File

@ -262,7 +262,6 @@ static int cc10001_update_scan_mode(struct iio_dev *indio_dev,
}
static const struct iio_info cc10001_adc_info = {
.driver_module = THIS_MODULE,
.read_raw = &cc10001_adc_read_raw,
.update_scan_mode = &cc10001_update_scan_mode,
};

1
drivers/iio/adc/cpcap-adc.c
View File

@ -932,7 +932,6 @@ err_unlock:
static const struct iio_info cpcap_adc_info = {
.read_raw = &cpcap_adc_read,
.driver_module = THIS_MODULE,
};
/*

1
drivers/iio/adc/da9150-gpadc.c
View File

@ -249,7 +249,6 @@ static int da9150_gpadc_read_raw(struct iio_dev *indio_dev,
static const struct iio_info da9150_gpadc_info = {
.read_raw = &da9150_gpadc_read_raw,
.driver_module = THIS_MODULE,
};
#define DA9150_GPADC_CHANNEL(_id, _hw_id, _type, chan_info, \

6
drivers/iio/adc/dln2-adc.c
View File

@ -479,7 +479,6 @@ static const struct iio_info dln2_adc_info = {
.read_raw = dln2_adc_read_raw,
.write_raw = dln2_adc_write_raw,
.update_scan_mode = dln2_update_scan_mode,
.driver_module = THIS_MODULE,
};
static irqreturn_t dln2_adc_trigger_h(int irq, void *p)
@ -604,10 +603,6 @@ static void dln2_adc_event(struct platform_device *pdev, u16 echo,
iio_trigger_poll(dln2->trig);
}
static const struct iio_trigger_ops dln2_adc_trigger_ops = {
.owner = THIS_MODULE,
};
static int dln2_adc_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
@ -665,7 +660,6 @@ static int dln2_adc_probe(struct platform_device *pdev)
dev_err(dev, "failed to allocate trigger\n");
return -ENOMEM;
}
dln2->trig->ops = &dln2_adc_trigger_ops;
iio_trigger_set_drvdata(dln2->trig, dln2);
devm_iio_trigger_register(dev, dln2->trig);
iio_trigger_set_immutable(indio_dev, dln2->trig);

1
drivers/iio/adc/envelope-detector.c
View File

@ -322,7 +322,6 @@ static const struct iio_chan_spec envelope_detector_iio_channel = {
static const struct iio_info envelope_detector_info = {
.read_raw = &envelope_detector_read_raw,
.driver_module = THIS_MODULE,
};
static int envelope_detector_probe(struct platform_device *pdev)

1
drivers/iio/adc/exynos_adc.c
View File

@ -657,7 +657,6 @@ static int exynos_adc_reg_access(struct iio_dev *indio_dev,
static const struct iio_info exynos_adc_iio_info = {
.read_raw = &exynos_read_raw,
.debugfs_reg_access = &exynos_adc_reg_access,
.driver_module = THIS_MODULE,
};
#define ADC_CHANNEL(_index, _id) { \

1
drivers/iio/adc/hi8435.c
View File

@ -408,7 +408,6 @@ static const struct iio_chan_spec hi8435_channels[] = {
};
static const struct iio_info hi8435_info = {
.driver_module = THIS_MODULE,
.read_raw = hi8435_read_raw,
.read_event_config = hi8435_read_event_config,
.write_event_config = hi8435_write_event_config,

1
drivers/iio/adc/hx711.c
View File

@ -374,7 +374,6 @@ static const struct attribute_group hx711_attribute_group = {
};
static const struct iio_info hx711_iio_info = {
.driver_module = THIS_MODULE,
.read_raw = hx711_read_raw,
.write_raw = hx711_write_raw,
.write_raw_get_fmt = hx711_write_raw_get_fmt,

1
drivers/iio/adc/imx7d_adc.c
View File

@ -412,7 +412,6 @@ static int imx7d_adc_reg_access(struct iio_dev *indio_dev,
}
static const struct iio_info imx7d_adc_iio_info = {
.driver_module = THIS_MODULE,
.read_raw = &imx7d_adc_read_raw,
.debugfs_reg_access = &imx7d_adc_reg_access,
};

2
drivers/iio/adc/ina2xx-adc.c
View File

@ -778,7 +778,6 @@ static const struct attribute_group ina226_attribute_group = {
};
static const struct iio_info ina219_info = {
.driver_module = THIS_MODULE,
.attrs = &ina219_attribute_group,
.read_raw = ina2xx_read_raw,
.write_raw = ina2xx_write_raw,
@ -786,7 +785,6 @@ static const struct iio_info ina219_info = {
};
static const struct iio_info ina226_info = {
.driver_module = THIS_MODULE,
.attrs = &ina226_attribute_group,
.read_raw = ina2xx_read_raw,
.write_raw = ina2xx_write_raw,

1
drivers/iio/adc/lp8788_adc.c
View File

@ -125,7 +125,6 @@ static int lp8788_adc_read_raw(struct iio_dev *indio_dev,
static const struct iio_info lp8788_adc_info = {
.read_raw = &lp8788_adc_read_raw,
.driver_module = THIS_MODULE,
};
#define LP8788_CHAN(_id, _type) { \

1
drivers/iio/adc/lpc18xx_adc.c
View File

@ -116,7 +116,6 @@ static int lpc18xx_adc_read_raw(struct iio_dev *indio_dev,
static const struct iio_info lpc18xx_adc_info = {
.read_raw = lpc18xx_adc_read_raw,
.driver_module = THIS_MODULE,
};
static int lpc18xx_adc_probe(struct platform_device *pdev)

1
drivers/iio/adc/lpc32xx_adc.c
View File

@ -104,7 +104,6 @@ static int lpc32xx_read_raw(struct iio_dev *indio_dev,
static const struct iio_info lpc32xx_adc_iio_info = {
.read_raw = &lpc32xx_read_raw,
.driver_module = THIS_MODULE,
};
#define LPC32XX_ADC_CHANNEL(_index) { \

1
drivers/iio/adc/ltc2471.c
View File

@ -98,7 +98,6 @@ static const struct iio_chan_spec ltc2473_channel[] = {
static const struct iio_info ltc2471_info = {
.read_raw = ltc2471_read_raw,
.driver_module = THIS_MODULE,
};
static int ltc2471_i2c_probe(struct i2c_client *client,

1
drivers/iio/adc/ltc2485.c
View File

@ -90,7 +90,6 @@ static const struct iio_chan_spec ltc2485_channel[] = {
static const struct iio_info ltc2485_info = {
.read_raw = ltc2485_read_raw,
.driver_module = THIS_MODULE,
};
static int ltc2485_probe(struct i2c_client *client,

1
drivers/iio/adc/ltc2497.c
View File

@ -186,7 +186,6 @@ static const struct iio_chan_spec ltc2497_channel[] = {
static const struct iio_info ltc2497_info = {
.read_raw = ltc2497_read_raw,
.driver_module = THIS_MODULE,
};
static int ltc2497_probe(struct i2c_client *client,

2
drivers/iio/adc/max1027.c
View File

@ -381,13 +381,11 @@ static irqreturn_t max1027_trigger_handler(int irq, void *private)
}
static const struct iio_trigger_ops max1027_trigger_ops = {
.owner = THIS_MODULE,
.validate_device = &iio_trigger_validate_own_device,
.set_trigger_state = &max1027_set_trigger_state,
};
static const struct iio_info max1027_info = {
.driver_module = THIS_MODULE,
.read_raw = &max1027_read_raw,
.validate_trigger = &max1027_validate_trigger,
.debugfs_reg_access = &max1027_debugfs_reg_access,

1
drivers/iio/adc/max11100.c
View File

@ -100,7 +100,6 @@ static int max11100_read_raw(struct iio_dev *indio_dev,
}
static const struct iio_info max11100_info = {
.driver_module = THIS_MODULE,
.read_raw = max11100_read_raw,
};

1
drivers/iio/adc/max1118.c
View File

@ -155,7 +155,6 @@ static int max1118_read_raw(struct iio_dev *indio_dev,
static const struct iio_info max1118_info = {
.read_raw = max1118_read_raw,
.driver_module = THIS_MODULE,
};
static irqreturn_t max1118_trigger_handler(int irq, void *p)

2
drivers/iio/adc/max1363.c
View File

@ -1029,7 +1029,6 @@ static int max1363_update_scan_mode(struct iio_dev *indio_dev,
static const struct iio_info max1238_info = {
.read_raw = &max1363_read_raw,
.driver_module = THIS_MODULE,
.update_scan_mode = &max1363_update_scan_mode,
};
@ -1040,7 +1039,6 @@ static const struct iio_info max1363_info = {
.write_event_config = &max1363_write_event_config,
.read_raw = &max1363_read_raw,
.update_scan_mode = &max1363_update_scan_mode,
.driver_module = THIS_MODULE,
.event_attrs = &max1363_event_attribute_group,
};

2
drivers/iio/adc/max9611.c
View File

@ -460,7 +460,6 @@ static const struct attribute_group max9611_attribute_group = {
};
static const struct iio_info indio_info = {
.driver_module = THIS_MODULE,
.read_raw = max9611_read_raw,
.attrs = &max9611_attribute_group,
};
@ -573,7 +572,6 @@ static int max9611_probe(struct i2c_client *client,
static struct i2c_driver max9611_driver = {
.driver = {
.name = DRIVER_NAME,
.owner = THIS_MODULE,
.of_match_table = max9611_of_table,
},
.probe = max9611_probe,

121
drivers/iio/adc/mcp320x.c
View File

@ -57,6 +57,17 @@ struct mcp320x_chip_info {
unsigned int resolution;
};
/**
* struct mcp320x - Microchip SPI ADC instance
* @spi: SPI slave (parent of the IIO device)
* @msg: SPI message to select a channel and receive a value from the ADC
* @transfer: SPI transfers used by @msg
* @reg: regulator generating Vref
* @lock: protects read sequences
* @chip_info: ADC properties
* @tx_buf: buffer for @transfer[0] (not used on single-channel converters)
* @rx_buf: buffer for @transfer[1]
*/
struct mcp320x {
struct spi_device *spi;
struct spi_message msg;
@ -76,10 +87,6 @@ static int mcp320x_channel_to_tx_data(int device_index,
int start_bit = 1;
switch (device_index) {
case mcp3001:
case mcp3201:
case mcp3301:
return 0;
case mcp3002:
case mcp3202:
return ((start_bit << 4) | (!differential << 3) |
@ -100,20 +107,14 @@ static int mcp320x_adc_conversion(struct mcp320x *adc, u8 channel,
{
int ret;
adc->rx_buf[0] = 0;
adc->rx_buf[1] = 0;
adc->tx_buf = mcp320x_channel_to_tx_data(device_index,
channel, differential);
memset(&adc->rx_buf, 0, sizeof(adc->rx_buf));
if (adc->chip_info->num_channels > 1)
adc->tx_buf = mcp320x_channel_to_tx_data(device_index, channel,
differential);
if (device_index != mcp3001 && device_index != mcp3201 && device_index != mcp3301) {
ret = spi_sync(adc->spi, &adc->msg);
if (ret < 0)
return ret;
} else {
ret = spi_read(adc->spi, &adc->rx_buf, sizeof(adc->rx_buf));
if (ret < 0)
return ret;
}
ret = spi_sync(adc->spi, &adc->msg);
if (ret < 0)
return ret;
switch (device_index) {
case mcp3001:
@ -242,7 +243,6 @@ static const struct iio_chan_spec mcp3208_channels[] = {
static const struct iio_info mcp320x_info = {
.read_raw = mcp320x_read_raw,
.driver_module = THIS_MODULE,
};
static const struct mcp320x_chip_info mcp320x_chip_infos[] = {
@ -323,9 +323,13 @@ static int mcp320x_probe(struct spi_device *spi)
adc->transfer[0].len = sizeof(adc->tx_buf);
adc->transfer[1].rx_buf = adc->rx_buf;
adc->transfer[1].len = sizeof(adc->rx_buf);
spi_message_init_with_transfers(&adc->msg, adc->transfer,
ARRAY_SIZE(adc->transfer));
if (chip_info->num_channels == 1)
/* single-channel converters are rx only (no MOSI pin) */
spi_message_init_with_transfers(&adc->msg,
&adc->transfer[1], 1);
else
spi_message_init_with_transfers(&adc->msg, adc->transfer,
ARRAY_SIZE(adc->transfer));
adc->reg = devm_regulator_get(&spi->dev, "vref");
if (IS_ERR(adc->reg))
@ -363,62 +367,25 @@ static int mcp320x_remove(struct spi_device *spi)
#if defined(CONFIG_OF)
static const struct of_device_id mcp320x_dt_ids[] = {
/* NOTE: The use of compatibles with no vendor prefix is deprecated. */
{
.compatible = "mcp3001",
.data = &mcp320x_chip_infos[mcp3001],
}, {
.compatible = "mcp3002",
.data = &mcp320x_chip_infos[mcp3002],
}, {
.compatible = "mcp3004",
.data = &mcp320x_chip_infos[mcp3004],
}, {
.compatible = "mcp3008",
.data = &mcp320x_chip_infos[mcp3008],
}, {
.compatible = "mcp3201",
.data = &mcp320x_chip_infos[mcp3201],
}, {
.compatible = "mcp3202",
.data = &mcp320x_chip_infos[mcp3202],
}, {
.compatible = "mcp3204",
.data = &mcp320x_chip_infos[mcp3204],
}, {
.compatible = "mcp3208",
.data = &mcp320x_chip_infos[mcp3208],
}, {
.compatible = "mcp3301",
.data = &mcp320x_chip_infos[mcp3301],
}, {
.compatible = "microchip,mcp3001",
.data = &mcp320x_chip_infos[mcp3001],
}, {
.compatible = "microchip,mcp3002",
.data = &mcp320x_chip_infos[mcp3002],
}, {
.compatible = "microchip,mcp3004",
.data = &mcp320x_chip_infos[mcp3004],
}, {
.compatible = "microchip,mcp3008",
.data = &mcp320x_chip_infos[mcp3008],
}, {
.compatible = "microchip,mcp3201",
.data = &mcp320x_chip_infos[mcp3201],
}, {
.compatible = "microchip,mcp3202",
.data = &mcp320x_chip_infos[mcp3202],
}, {
.compatible = "microchip,mcp3204",
.data = &mcp320x_chip_infos[mcp3204],
}, {
.compatible = "microchip,mcp3208",
.data = &mcp320x_chip_infos[mcp3208],
}, {
.compatible = "microchip,mcp3301",
.data = &mcp320x_chip_infos[mcp3301],
}, {
}
{ .compatible = "mcp3001" },
{ .compatible = "mcp3002" },
{ .compatible = "mcp3004" },
{ .compatible = "mcp3008" },
{ .compatible = "mcp3201" },
{ .compatible = "mcp3202" },
{ .compatible = "mcp3204" },
{ .compatible = "mcp3208" },
{ .compatible = "mcp3301" },
{ .compatible = "microchip,mcp3001" },
{ .compatible = "microchip,mcp3002" },
{ .compatible = "microchip,mcp3004" },
{ .compatible = "microchip,mcp3008" },
{ .compatible = "microchip,mcp3201" },
{ .compatible = "microchip,mcp3202" },
{ .compatible = "microchip,mcp3204" },
{ .compatible = "microchip,mcp3208" },
{ .compatible = "microchip,mcp3301" },
{ }
};
MODULE_DEVICE_TABLE(of, mcp320x_dt_ids);
#endif

1
drivers/iio/adc/mcp3422.c
View File

@ -327,7 +327,6 @@ static const struct iio_info mcp3422_info = {
.write_raw = mcp3422_write_raw,
.write_raw_get_fmt = mcp3422_write_raw_get_fmt,
.attrs = &mcp3422_attribute_group,
.driver_module = THIS_MODULE,
};
static int mcp3422_probe(struct i2c_client *client,

1
drivers/iio/adc/men_z188_adc.c
View File

@ -80,7 +80,6 @@ static int z188_iio_read_raw(struct iio_dev *iio_dev,
static const struct iio_info z188_adc_info = {
.read_raw = &z188_iio_read_raw,
.driver_module = THIS_MODULE,
};
static void men_z188_config_channels(void __iomem *addr)

1
drivers/iio/adc/meson_saradc.c
View File

@ -840,7 +840,6 @@ out:
static const struct iio_info meson_sar_adc_iio_info = {
.read_raw = meson_sar_adc_iio_info_read_raw,
.driver_module = THIS_MODULE,
};
static const struct meson_sar_adc_data meson_sar_adc_meson8_data = {

2
drivers/iio/adc/mt6577_auxadc.c
View File

@ -180,7 +180,6 @@ static int mt6577_auxadc_read_raw(struct iio_dev *indio_dev,
}
static const struct iio_info mt6577_auxadc_info = {
.driver_module = THIS_MODULE,
.read_raw = &mt6577_auxadc_read_raw,
};
@ -306,6 +305,7 @@ static SIMPLE_DEV_PM_OPS(mt6577_auxadc_pm_ops,
static const struct of_device_id mt6577_auxadc_of_match[] = {
{ .compatible = "mediatek,mt2701-auxadc", },
{ .compatible = "mediatek,mt2712-auxadc", },
{ .compatible = "mediatek,mt7622-auxadc", },
{ .compatible = "mediatek,mt8173-auxadc", },
{ }

2
drivers/iio/adc/mxs-lradc-adc.c
View File

@ -382,7 +382,6 @@ static const struct attribute_group mxs_lradc_adc_attribute_group = {
};
static const struct iio_info mxs_lradc_adc_iio_info = {
.driver_module = THIS_MODULE,
.read_raw = mxs_lradc_adc_read_raw,
.write_raw = mxs_lradc_adc_write_raw,
.write_raw_get_fmt = mxs_lradc_adc_write_raw_get_fmt,
@ -455,7 +454,6 @@ static int mxs_lradc_adc_configure_trigger(struct iio_trigger *trig, bool state)
}
static const struct iio_trigger_ops mxs_lradc_adc_trigger_ops = {
.owner = THIS_MODULE,
.set_trigger_state = &mxs_lradc_adc_configure_trigger,
};

1
drivers/iio/adc/nau7802.c
View File

@ -402,7 +402,6 @@ static int nau7802_write_raw_get_fmt(struct iio_dev *indio_dev,
}
static const struct iio_info nau7802_info = {
.driver_module = THIS_MODULE,
.read_raw = &nau7802_read_raw,
.write_raw = &nau7802_write_raw,
.write_raw_get_fmt = nau7802_write_raw_get_fmt,

1
drivers/iio/adc/palmas_gpadc.c
View File

@ -430,7 +430,6 @@ out:
static const struct iio_info palmas_gpadc_iio_info = {
.read_raw = palmas_gpadc_read_raw,
.driver_module = THIS_MODULE,
};
#define PALMAS_ADC_CHAN_IIO(chan, _type, chan_info) \

1
drivers/iio/adc/qcom-pm8xxx-xoadc.c
View File

@ -728,7 +728,6 @@ static int pm8xxx_of_xlate(struct iio_dev *indio_dev,
}
static const struct iio_info pm8xxx_xoadc_info = {
.driver_module = THIS_MODULE,
.of_xlate = pm8xxx_of_xlate,
.read_raw = pm8xxx_read_raw,
};

1
drivers/iio/adc/qcom-spmi-iadc.c
View File

@ -356,7 +356,6 @@ static int iadc_read_raw(struct iio_dev *indio_dev,
static const struct iio_info iadc_info = {
.read_raw = iadc_read_raw,
.driver_module = THIS_MODULE,
};
static irqreturn_t iadc_isr(int irq, void *dev_id)

1
drivers/iio/adc/qcom-spmi-vadc.c
View File

@ -506,7 +506,6 @@ static int vadc_of_xlate(struct iio_dev *indio_dev,
static const struct iio_info vadc_info = {
.read_raw = vadc_read_raw,
.of_xlate = vadc_of_xlate,
.driver_module = THIS_MODULE,
};
struct vadc_channels {

1
drivers/iio/adc/rcar-gyroadc.c
View File

@ -277,7 +277,6 @@ static int rcar_gyroadc_reg_access(struct iio_dev *indio_dev,
}
static const struct iio_info rcar_gyroadc_iio_info = {
.driver_module = THIS_MODULE,
.read_raw = rcar_gyroadc_read_raw,
.debugfs_reg_access = rcar_gyroadc_reg_access,
};

1
drivers/iio/adc/rockchip_saradc.c
View File

@ -125,7 +125,6 @@ static irqreturn_t rockchip_saradc_isr(int irq, void *dev_id)
static const struct iio_info rockchip_saradc_iio_info = {
.read_raw = rockchip_saradc_read_raw,
.driver_module = THIS_MODULE,
};
#define ADC_CHANNEL(_index, _id) { \

1
drivers/iio/adc/spear_adc.c
View File

@ -254,7 +254,6 @@ static int spear_adc_configure(struct spear_adc_state *st)
static const struct iio_info spear_adc_info = {
.read_raw = &spear_adc_read_raw,
.write_raw = &spear_adc_write_raw,
.driver_module = THIS_MODULE,
};
static int spear_adc_probe(struct platform_device *pdev)

1
drivers/iio/adc/stm32-adc.c
View File

@ -1385,7 +1385,6 @@ static const struct iio_info stm32_adc_iio_info = {
.update_scan_mode = stm32_adc_update_scan_mode,
.debugfs_reg_access = stm32_adc_debugfs_reg_access,
.of_xlate = stm32_adc_of_xlate,
.driver_module = THIS_MODULE,
};
static unsigned int stm32_adc_dma_residue(struct stm32_adc *adc)

1
drivers/iio/adc/stx104.c
View File

@ -172,7 +172,6 @@ static int stx104_write_raw(struct iio_dev *indio_dev,
}
static const struct iio_info stx104_info = {
.driver_module = THIS_MODULE,
.read_raw = stx104_read_raw,
.write_raw = stx104_write_raw
};

1
drivers/iio/adc/sun4i-gpadc-iio.c
View File

@ -352,7 +352,6 @@ static int sun4i_gpadc_read_raw(struct iio_dev *indio_dev,
static const struct iio_info sun4i_gpadc_iio_info = {
.read_raw = sun4i_gpadc_read_raw,
.driver_module = THIS_MODULE,
};
static irqreturn_t sun4i_gpadc_temp_data_irq_handler(int irq, void *dev_id)

1
drivers/iio/adc/ti-adc081c.c
View File

@ -124,7 +124,6 @@ static struct adcxx1c_model adcxx1c_models[] = {
static const struct iio_info adc081c_info = {
.read_raw = adc081c_read_raw,
.driver_module = THIS_MODULE,
};
static irqreturn_t adc081c_trigger_handler(int irq, void *p)

1
drivers/iio/adc/ti-adc0832.c
View File

@ -195,7 +195,6 @@ static int adc0832_read_raw(struct iio_dev *iio,
static const struct iio_info adc0832_info = {
.read_raw = adc0832_read_raw,
.driver_module = THIS_MODULE,
};
static irqreturn_t adc0832_trigger_handler(int irq, void *p)

1
drivers/iio/adc/ti-adc084s021.c
View File

@ -186,7 +186,6 @@ static int adc084s021_buffer_postdisable(struct iio_dev *indio_dev)
static const struct iio_info adc084s021_info = {
.read_raw = adc084s021_read_raw,
.driver_module = THIS_MODULE,
};
static const struct iio_buffer_setup_ops adc084s021_buffer_setup_ops = {

1
drivers/iio/adc/ti-adc108s102.c
View File

@ -220,7 +220,6 @@ static int adc108s102_read_raw(struct iio_dev *indio_dev,
static const struct iio_info adc108s102_info = {
.read_raw = &adc108s102_read_raw,
.update_scan_mode = &adc108s102_update_scan_mode,
.driver_module = THIS_MODULE,
};
static int adc108s102_probe(struct spi_device *spi)

1
drivers/iio/adc/ti-adc12138.c
View File

@ -277,7 +277,6 @@ static int adc12138_read_raw(struct iio_dev *iio,
static const struct iio_info adc12138_info = {
.read_raw = adc12138_read_raw,
.driver_module = THIS_MODULE,
};
static int adc12138_init(struct adc12138 *adc)

1
drivers/iio/adc/ti-adc128s052.c
View File

@ -130,7 +130,6 @@ static const struct adc128_configuration adc128_config[] = {
static const struct iio_info adc128_info = {
.read_raw = adc128_read_raw,
.driver_module = THIS_MODULE,
};
static int adc128_probe(struct spi_device *spi)

1
drivers/iio/adc/ti-adc161s626.c
View File

@ -173,7 +173,6 @@ static int ti_adc_read_raw(struct iio_dev *indio_dev,
}
static const struct iio_info ti_adc_info = {
.driver_module = THIS_MODULE,
.read_raw = ti_adc_read_raw,
};

22
drivers/iio/adc/ti-ads1015.c
View File

@ -332,7 +332,7 @@ static int ads1015_set_power_state(struct ads1015_data *data, bool on)
static
int ads1015_get_adc_result(struct ads1015_data *data, int chan, int *val)
{
int ret, pga, dr, conv_time;
int ret, pga, dr, dr_old, conv_time;
unsigned int old, mask, cfg;
if (chan < 0 || chan >= ADS1015_CHANNELS)
@ -358,17 +358,17 @@ int ads1015_get_adc_result(struct ads1015_data *data, int chan, int *val)
}
cfg = (old & ~mask) | (cfg & mask);
ret = regmap_write(data->regmap, ADS1015_CFG_REG, cfg);
if (ret)
return ret;
if (old != cfg || data->conv_invalid) {
int dr_old = (old & ADS1015_CFG_DR_MASK) >>
ADS1015_CFG_DR_SHIFT;
if (old != cfg) {
ret = regmap_write(data->regmap, ADS1015_CFG_REG, cfg);
if (ret)
return ret;
data->conv_invalid = true;
}
if (data->conv_invalid) {
dr_old = (old & ADS1015_CFG_DR_MASK) >> ADS1015_CFG_DR_SHIFT;
conv_time = DIV_ROUND_UP(USEC_PER_SEC, data->data_rate[dr_old]);
conv_time += DIV_ROUND_UP(USEC_PER_SEC, data->data_rate[dr]);
conv_time += conv_time / 10; /* 10% internal clock inaccuracy */
usleep_range(conv_time, conv_time + 1);
data->conv_invalid = false;
}
@ -821,7 +821,6 @@ static const struct attribute_group ads1115_attribute_group = {
};
static const struct iio_info ads1015_info = {
.driver_module = THIS_MODULE,
.read_raw = ads1015_read_raw,
.write_raw = ads1015_write_raw,
.read_event_value = ads1015_read_event,
@ -832,7 +831,6 @@ static const struct iio_info ads1015_info = {
};
static const struct iio_info ads1115_info = {
.driver_module = THIS_MODULE,
.read_raw = ads1015_read_raw,
.write_raw = ads1015_write_raw,
.read_event_value = ads1015_read_event,

1
drivers/iio/adc/ti-ads7950.c
View File

@ -372,7 +372,6 @@ static int ti_ads7950_read_raw(struct iio_dev *indio_dev,
static const struct iio_info ti_ads7950_info = {
.read_raw = &ti_ads7950_read_raw,
.update_scan_mode = ti_ads7950_update_scan_mode,
.driver_module = THIS_MODULE,
};
static int ti_ads7950_probe(struct spi_device *spi)

2
drivers/iio/adc/ti-ads8688.c
View File

@ -369,7 +369,6 @@ static const struct iio_info ads8688_info = {
.write_raw = &ads8688_write_raw,
.write_raw_get_fmt = &ads8688_write_raw_get_fmt,
.attrs = &ads8688_attribute_group,
.driver_module = THIS_MODULE,
};
static const struct ads8688_chip_info ads8688_chip_info_tbl[] = {
@ -474,7 +473,6 @@ MODULE_DEVICE_TABLE(of, ads8688_of_match);
static struct spi_driver ads8688_driver = {
.driver = {
.name = "ads8688",
.owner = THIS_MODULE,
},
.probe = ads8688_probe,
.remove = ads8688_remove,

1
drivers/iio/adc/ti-tlc4541.c
View File

@ -157,7 +157,6 @@ static int tlc4541_read_raw(struct iio_dev *indio_dev,
static const struct iio_info tlc4541_info = {
.read_raw = &tlc4541_read_raw,
.driver_module = THIS_MODULE,
};
static int tlc4541_probe(struct spi_device *spi)

1
drivers/iio/adc/ti_am335x_adc.c
View File

@ -533,7 +533,6 @@ err_unlock:
static const struct iio_info tiadc_info = {
.read_raw = &tiadc_read_raw,
.driver_module = THIS_MODULE,
};
static int tiadc_request_dma(struct platform_device *pdev,

1
drivers/iio/adc/twl4030-madc.c
View File

@ -212,7 +212,6 @@ static int twl4030_madc_read(struct iio_dev *iio_dev,
static const struct iio_info twl4030_madc_iio_info = {
.read_raw = &twl4030_madc_read,
.driver_module = THIS_MODULE,
};
#define TWL4030_ADC_CHANNEL(_channel, _type, _name) { \

1
drivers/iio/adc/twl6030-gpadc.c
View File

@ -843,7 +843,6 @@ static const struct iio_chan_spec twl6032_gpadc_iio_channels[] = {
static const struct iio_info twl6030_gpadc_iio_info = {
.read_raw = &twl6030_gpadc_read_raw,
.driver_module = THIS_MODULE,
};
static const struct twl6030_gpadc_platform_data twl6030_pdata = {

1
drivers/iio/adc/vf610_adc.c
View File

@ -799,7 +799,6 @@ static int vf610_adc_reg_access(struct iio_dev *indio_dev,
}
static const struct iio_info vf610_adc_iio_info = {
.driver_module = THIS_MODULE,
.read_raw = &vf610_read_raw,
.write_raw = &vf610_write_raw,
.debugfs_reg_access = &vf610_adc_reg_access,

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