clocksource: convert 32-bit down counting clocksource on S5PV210/S5P64X0
Convert the S5PV210/S5P64X0 32-bit down-counting clocksource to the generic mmio clocksource infrastructure Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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@ -726,6 +726,7 @@ config ARCH_S5P64X0
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select GENERIC_GPIO
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select HAVE_CLK
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select CLKDEV_LOOKUP
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select CLKSRC_MMIO
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select HAVE_S3C2410_WATCHDOG if WATCHDOG
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select GENERIC_CLOCKEVENTS
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select HAVE_SCHED_CLOCK
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@ -756,6 +757,7 @@ config ARCH_S5PV210
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select GENERIC_GPIO
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select HAVE_CLK
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select CLKDEV_LOOKUP
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select CLKSRC_MMIO
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select ARM_L1_CACHE_SHIFT_6
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select ARCH_HAS_CPUFREQ
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select GENERIC_CLOCKEVENTS
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@ -314,13 +314,6 @@ static void __iomem *s5p_timer_reg(void)
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return S3C_TIMERREG(offset);
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}
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static cycle_t s5p_timer_read(struct clocksource *cs)
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{
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void __iomem *reg = s5p_timer_reg();
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return (cycle_t) (reg ? ~__raw_readl(reg) : 0);
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}
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/*
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* Override the global weak sched_clock symbol with this
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* local implementation which uses the clocksource to get some
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@ -350,14 +343,6 @@ static void notrace s5p_update_sched_clock(void)
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update_sched_clock(&cd, ~__raw_readl(reg), (u32)~0);
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}
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struct clocksource time_clocksource = {
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.name = "s5p_clocksource_timer",
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.rating = 250,
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.read = s5p_timer_read,
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.mask = CLOCKSOURCE_MASK(32),
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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};
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static void __init s5p_clocksource_init(void)
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{
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unsigned long pclk;
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@ -375,8 +360,9 @@ static void __init s5p_clocksource_init(void)
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init_sched_clock(&cd, s5p_update_sched_clock, 32, clock_rate);
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if (clocksource_register_hz(&time_clocksource, clock_rate))
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panic("%s: can't register clocksource\n", time_clocksource.name);
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if (clocksource_mmio_init(s5p_timer_reg(), "s5p_clocksource_timer",
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clock_rate, 250, 32, clocksource_mmio_readl_down))
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panic("s5p_clocksource_timer: can't register clocksource\n");
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}
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static void __init s5p_timer_resources(void)
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