drm/i915: Eliminate {vlv,bxt}_configure_dsi_pll()
Fold the DSI PLL configuration functions into the DSI PLL enable functions since they are small and not called from anywhere else. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1460488478-18311-4-git-send-email-ville.syrjala@linux.intel.com Tested-by: Jani Nikula <jani.nikula@intel.com>
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@ -141,17 +141,6 @@ static int vlv_compute_dsi_pll(struct intel_encoder *encoder,
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return 0;
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}
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static void vlv_configure_dsi_pll(struct intel_encoder *encoder,
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const struct intel_crtc_state *config)
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{
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struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
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vlv_cck_write(dev_priv, CCK_REG_DSI_PLL_CONTROL, 0);
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vlv_cck_write(dev_priv, CCK_REG_DSI_PLL_DIVIDER, config->dsi_pll.div);
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vlv_cck_write(dev_priv, CCK_REG_DSI_PLL_CONTROL,
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config->dsi_pll.ctrl & ~DSI_PLL_VCO_EN);
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}
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static void vlv_enable_dsi_pll(struct intel_encoder *encoder,
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const struct intel_crtc_state *config)
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{
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@ -161,7 +150,10 @@ static void vlv_enable_dsi_pll(struct intel_encoder *encoder,
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mutex_lock(&dev_priv->sb_lock);
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vlv_configure_dsi_pll(encoder, config);
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vlv_cck_write(dev_priv, CCK_REG_DSI_PLL_CONTROL, 0);
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vlv_cck_write(dev_priv, CCK_REG_DSI_PLL_DIVIDER, config->dsi_pll.div);
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vlv_cck_write(dev_priv, CCK_REG_DSI_PLL_CONTROL,
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config->dsi_pll.ctrl & ~DSI_PLL_VCO_EN);
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/* wait at least 0.5 us after ungating before enabling VCO */
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usleep_range(1, 10);
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@ -470,15 +462,6 @@ static int bxt_compute_dsi_pll(struct intel_encoder *encoder,
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return 0;
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}
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static void bxt_configure_dsi_pll(struct intel_encoder *encoder,
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const struct intel_crtc_state *config)
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{
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struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
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I915_WRITE(BXT_DSI_PLL_CTL, config->dsi_pll.ctrl);
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POSTING_READ(BXT_DSI_PLL_CTL);
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}
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static void bxt_enable_dsi_pll(struct intel_encoder *encoder,
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const struct intel_crtc_state *config)
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{
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@ -490,7 +473,8 @@ static void bxt_enable_dsi_pll(struct intel_encoder *encoder,
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DRM_DEBUG_KMS("\n");
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/* Configure PLL vales */
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bxt_configure_dsi_pll(encoder, config);
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I915_WRITE(BXT_DSI_PLL_CTL, config->dsi_pll.ctrl);
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POSTING_READ(BXT_DSI_PLL_CTL);
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/* Program TX, RX, Dphy clocks */
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for_each_dsi_port(port, intel_dsi->ports)
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