x86/intel_rdt: Change file names to accommodate RDT monitor code
Because the "perf cqm" and resctrl code were separately added and indivdually configurable, there seem to be separate context switch code and also things on global .h which are not really needed. Move only the scheduling specific code and definitions to <asm/intel_rdt_sched.h> and the put all the other declarations to a local intel_rdt.h. h/t to Reinette Chatre for pointing out that we should separate the public interfaces used by other parts of the kernel from private objects shared between the various files comprising RDT. No functional change. Signed-off-by: Vikas Shivappa <vikas.shivappa@linux.intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: ravi.v.shankar@intel.com Cc: tony.luck@intel.com Cc: fenghua.yu@intel.com Cc: peterz@infradead.org Cc: eranian@google.com Cc: vikas.shivappa@intel.com Cc: ak@linux.intel.com Cc: davidcc@google.com Cc: reinette.chatre@intel.com Link: http://lkml.kernel.org/r/1501017287-28083-5-git-send-email-vikas.shivappa@linux.intel.com
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@ -11103,7 +11103,7 @@ M: Fenghua Yu <fenghua.yu@intel.com>
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L: linux-kernel@vger.kernel.org
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S: Supported
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F: arch/x86/kernel/cpu/intel_rdt*
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F: arch/x86/include/asm/intel_rdt*
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F: arch/x86/include/asm/intel_rdt_sched.h
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F: Documentation/x86/intel_rdt*
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READ-COPY UPDATE (RCU)
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@ -1,25 +0,0 @@
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#ifndef _ASM_X86_INTEL_RDT_COMMON_H
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#define _ASM_X86_INTEL_RDT_COMMON_H
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#define MSR_IA32_PQR_ASSOC 0x0c8f
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/**
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* struct intel_pqr_state - State cache for the PQR MSR
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* @rmid: The cached Resource Monitoring ID
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* @closid: The cached Class Of Service ID
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*
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* The upper 32 bits of MSR_IA32_PQR_ASSOC contain closid and the
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* lower 10 bits rmid. The update to MSR_IA32_PQR_ASSOC always
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* contains both parts, so we need to cache them.
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*
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* The cache also helps to avoid pointless updates if the value does
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* not change.
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*/
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struct intel_pqr_state {
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u32 rmid;
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u32 closid;
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};
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DECLARE_PER_CPU(struct intel_pqr_state, pqr_state);
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#endif /* _ASM_X86_INTEL_RDT_COMMON_H */
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@ -0,0 +1,72 @@
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#ifndef _ASM_X86_INTEL_RDT_SCHED_H
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#define _ASM_X86_INTEL_RDT_SCHED_H
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#ifdef CONFIG_INTEL_RDT
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#include <linux/sched.h>
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#include <linux/jump_label.h>
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#define IA32_PQR_ASSOC 0x0c8f
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/**
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* struct intel_pqr_state - State cache for the PQR MSR
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* @rmid: The cached Resource Monitoring ID
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* @closid: The cached Class Of Service ID
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*
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* The upper 32 bits of IA32_PQR_ASSOC contain closid and the
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* lower 10 bits rmid. The update to IA32_PQR_ASSOC always
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* contains both parts, so we need to cache them.
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*
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* The cache also helps to avoid pointless updates if the value does
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* not change.
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*/
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struct intel_pqr_state {
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u32 rmid;
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u32 closid;
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};
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DECLARE_PER_CPU(struct intel_pqr_state, pqr_state);
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DECLARE_PER_CPU_READ_MOSTLY(int, cpu_closid);
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DECLARE_STATIC_KEY_FALSE(rdt_enable_key);
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/*
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* intel_rdt_sched_in() - Writes the task's CLOSid to IA32_PQR_MSR
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*
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* Following considerations are made so that this has minimal impact
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* on scheduler hot path:
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* - This will stay as no-op unless we are running on an Intel SKU
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* which supports resource control and we enable by mounting the
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* resctrl file system.
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* - Caches the per cpu CLOSid values and does the MSR write only
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* when a task with a different CLOSid is scheduled in.
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*
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* Must be called with preemption disabled.
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*/
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static inline void intel_rdt_sched_in(void)
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{
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if (static_branch_likely(&rdt_enable_key)) {
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struct intel_pqr_state *state = this_cpu_ptr(&pqr_state);
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int closid;
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/*
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* If this task has a closid assigned, use it.
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* Else use the closid assigned to this cpu.
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*/
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closid = current->closid;
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if (closid == 0)
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closid = this_cpu_read(cpu_closid);
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if (closid != state->closid) {
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state->closid = closid;
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wrmsr(IA32_PQR_ASSOC, state->rmid, closid);
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}
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}
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}
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#else
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static inline void intel_rdt_sched_in(void) {}
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#endif /* CONFIG_INTEL_RDT */
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#endif /* _ASM_X86_INTEL_RDT_SCHED_H */
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@ -30,7 +30,8 @@
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#include <linux/cpuhotplug.h>
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#include <asm/intel-family.h>
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#include <asm/intel_rdt.h>
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#include <asm/intel_rdt_sched.h>
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#include "intel_rdt.h"
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#define MAX_MBA_BW 100u
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#define MBA_IS_LINEAR 0x4
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@ -455,7 +456,7 @@ static void clear_closid(int cpu)
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per_cpu(cpu_closid, cpu) = 0;
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state->closid = 0;
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wrmsr(MSR_IA32_PQR_ASSOC, state->rmid, 0);
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wrmsr(IA32_PQR_ASSOC, state->rmid, 0);
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}
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static int intel_rdt_online_cpu(unsigned int cpu)
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@ -1,14 +1,10 @@
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#ifndef _ASM_X86_INTEL_RDT_H
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#define _ASM_X86_INTEL_RDT_H
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#ifdef CONFIG_INTEL_RDT
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#include <linux/sched.h>
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#include <linux/kernfs.h>
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#include <linux/jump_label.h>
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#include <asm/intel_rdt_common.h>
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#define IA32_L3_QOS_CFG 0xc81
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#define IA32_L3_CBM_BASE 0xc90
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#define IA32_L2_CBM_BASE 0xd10
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@ -244,43 +240,4 @@ ssize_t rdtgroup_schemata_write(struct kernfs_open_file *of,
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int rdtgroup_schemata_show(struct kernfs_open_file *of,
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struct seq_file *s, void *v);
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/*
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* intel_rdt_sched_in() - Writes the task's CLOSid to IA32_PQR_MSR
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*
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* Following considerations are made so that this has minimal impact
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* on scheduler hot path:
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* - This will stay as no-op unless we are running on an Intel SKU
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* which supports resource control and we enable by mounting the
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* resctrl file system.
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* - Caches the per cpu CLOSid values and does the MSR write only
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* when a task with a different CLOSid is scheduled in.
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*
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* Must be called with preemption disabled.
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*/
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static inline void intel_rdt_sched_in(void)
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{
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if (static_branch_likely(&rdt_enable_key)) {
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struct intel_pqr_state *state = this_cpu_ptr(&pqr_state);
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int closid;
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/*
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* If this task has a closid assigned, use it.
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* Else use the closid assigned to this cpu.
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*/
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closid = current->closid;
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if (closid == 0)
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closid = this_cpu_read(cpu_closid);
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if (closid != state->closid) {
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state->closid = closid;
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wrmsr(MSR_IA32_PQR_ASSOC, state->rmid, closid);
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}
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}
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}
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#else
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static inline void intel_rdt_sched_in(void) {}
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#endif /* CONFIG_INTEL_RDT */
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#endif /* _ASM_X86_INTEL_RDT_H */
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@ -32,8 +32,8 @@
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#include <uapi/linux/magic.h>
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#include <asm/intel_rdt.h>
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#include <asm/intel_rdt_common.h>
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#include <asm/intel_rdt_sched.h>
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#include "intel_rdt.h"
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DEFINE_STATIC_KEY_FALSE(rdt_enable_key);
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struct kernfs_root *rdt_root;
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@ -26,7 +26,7 @@
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#include <linux/kernfs.h>
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#include <linux/seq_file.h>
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#include <linux/slab.h>
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#include <asm/intel_rdt.h>
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#include "intel_rdt.h"
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/*
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* Check whether MBA bandwidth percentage value is correct. The value is
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@ -56,7 +56,7 @@
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#include <asm/debugreg.h>
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#include <asm/switch_to.h>
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#include <asm/vm86.h>
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#include <asm/intel_rdt.h>
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#include <asm/intel_rdt_sched.h>
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#include <asm/proto.h>
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void __show_regs(struct pt_regs *regs, int all)
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@ -52,7 +52,7 @@
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#include <asm/switch_to.h>
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#include <asm/xen/hypervisor.h>
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#include <asm/vdso.h>
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#include <asm/intel_rdt.h>
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#include <asm/intel_rdt_sched.h>
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#include <asm/unistd.h>
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#ifdef CONFIG_IA32_EMULATION
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/* Not included via unistd.h */
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