powerpc/fsl-pci: Don't hide resource for pci/e when configured as Agent/EP
Current pci/pcie init code will hide the pci/pcie host resource. But did not judge it is host/RC or agent/EP. If configured as agent/EP, we should avoid hiding its resource in the host side. In PCI system, the Programing Interface can be used to judge the host/agent status: Programing Interface = 0: host Programing Interface = 1: Agent In PCIE system, both the Programing Interface and Header type can be used to judge the RC/EP status. Header Type = 0: EP Header Type = 1: RC Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Jia Hongtao <B38951@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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@ -1747,10 +1747,13 @@ void __devinit pcibios_scan_phb(struct pci_controller *hose)
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static void fixup_hide_host_resource_fsl(struct pci_dev *dev)
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{
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int i, class = dev->class >> 8;
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/* When configured as agent, programing interface = 1 */
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int prog_if = dev->class & 0xf;
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if ((class == PCI_CLASS_PROCESSOR_POWERPC ||
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class == PCI_CLASS_BRIDGE_OTHER) &&
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(dev->hdr_type == PCI_HEADER_TYPE_NORMAL) &&
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(prog_if == 0) &&
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(dev->bus->parent == NULL)) {
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for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
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dev->resource[i].start = 0;
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