drm/amd/display: add DP2.0 debug option to set MST_EN for SST stream
[why] Some DP2.0 RX requires us to set MST_EN even for SST configuration. We added this debug option so we can configure this temporary workaround for the RX. Reviewed-by: George Shen <george.shen@amd.com> Acked-by: Agustin Gutierrez Sanchez <agustin.gutierrez@amd.com> Signed-off-by: Wenjing Liu <wenjing.liu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -1869,8 +1869,13 @@ static enum dc_status enable_link_dp(struct dc_state *state,
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do_fallback = true;
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#if defined(CONFIG_DRM_AMD_DC_DCN)
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/*
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* Temporary w/a to get DP2.0 link rates to work with SST.
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* TODO DP2.0 - Workaround: Remove w/a if and when the issue is resolved.
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*/
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if (dp_get_link_encoding_format(&link_settings) == DP_128b_132b_ENCODING &&
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pipe_ctx->stream->signal == SIGNAL_TYPE_DISPLAY_PORT) {
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pipe_ctx->stream->signal == SIGNAL_TYPE_DISPLAY_PORT &&
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link->dc->debug.set_mst_en_for_sst) {
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dp_enable_mst_on_sink(link, true);
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}
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#endif
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@ -664,6 +664,7 @@ struct dc_debug_options {
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#if defined(CONFIG_DRM_AMD_DC_DCN)
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/* TODO - remove once tested */
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bool legacy_dp2_lt;
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bool set_mst_en_for_sst;
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#endif
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union mem_low_power_enable_options enable_mem_low_power;
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union root_clock_optimization_options root_clock_optimization;
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