soc: renesas: rcar-sysc: Move SYSC interrupt config to rcar-sysc driver
On R-Car H1 and Gen2, the SYSC interrupt registers are always configured using hardcoded values in platform code. For R-Car Gen2, values are provided for H2 and M2-W only, other SoCs are not yet supported, and never will be. Move this configuration from SoC-specific platform code to the rcar_sysc_init() wrapper, so it can be skipped if the SYSC is configured from DT. This would be the case not only for H1, H2, and M2-W using a modern DTS, but also for other R-Car Gen2 SoCs not supported by the platform code, relying purely on DT. There is no longer a need to return the mapped register block, hence make the function return void. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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@ -23,11 +23,7 @@
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static void __init r8a7779_sysc_init(void)
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static void __init r8a7779_sysc_init(void)
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{
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{
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void __iomem *base = rcar_sysc_init(0xffd85000);
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rcar_sysc_init(0xffd85000, 0x0131000e);
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/* enable all interrupt sources, but do not use interrupt handler */
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iowrite32(0x0131000e, base + SYSCIER);
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iowrite32(0, base + SYSCIMR);
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}
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}
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#else /* CONFIG_PM || CONFIG_SMP */
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#else /* CONFIG_PM || CONFIG_SMP */
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@ -37,11 +37,7 @@
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static void __init rcar_gen2_sysc_init(u32 syscier)
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static void __init rcar_gen2_sysc_init(u32 syscier)
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{
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{
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void __iomem *base = rcar_sysc_init(0xe6180000);
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rcar_sysc_init(0xe6180000, syscier);
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/* enable all interrupt sources, but do not use interrupt handler */
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iowrite32(syscier, base + SYSCIER);
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iowrite32(0, base + SYSCIMR);
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}
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}
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#else /* CONFIG_SMP */
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#else /* CONFIG_SMP */
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@ -400,10 +400,14 @@ out_put:
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}
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}
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early_initcall(rcar_sysc_pd_init);
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early_initcall(rcar_sysc_pd_init);
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void __iomem * __init rcar_sysc_init(phys_addr_t base)
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void __init rcar_sysc_init(phys_addr_t base, u32 syscier)
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{
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{
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if (rcar_sysc_pd_init())
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if (!rcar_sysc_pd_init())
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rcar_sysc_base = ioremap_nocache(base, PAGE_SIZE);
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return;
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return rcar_sysc_base;
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rcar_sysc_base = ioremap_nocache(base, PAGE_SIZE);
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/* enable all interrupt sources, but do not use interrupt handler */
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iowrite32(syscier, rcar_sysc_base + SYSCIER);
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iowrite32(0, rcar_sysc_base + SYSCIMR);
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}
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}
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@ -11,6 +11,6 @@ struct rcar_sysc_ch {
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int rcar_sysc_power_down(const struct rcar_sysc_ch *sysc_ch);
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int rcar_sysc_power_down(const struct rcar_sysc_ch *sysc_ch);
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int rcar_sysc_power_up(const struct rcar_sysc_ch *sysc_ch);
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int rcar_sysc_power_up(const struct rcar_sysc_ch *sysc_ch);
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void __iomem *rcar_sysc_init(phys_addr_t base);
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void rcar_sysc_init(phys_addr_t base, u32 syscier);
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#endif /* __LINUX_SOC_RENESAS_RCAR_SYSC_H__ */
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#endif /* __LINUX_SOC_RENESAS_RCAR_SYSC_H__ */
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