Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin:
  Blackfin: bf54x: re-enable anomaly 05000353 for all revs
  Blackfin: enable atomic64_t support
  Blackfin: wire up new syncfs syscall
  Blackfin: SMP: flush CoreB cache when shutting down
This commit is contained in:
Linus Torvalds 2011-03-24 08:24:28 -07:00
commit 05061bf678
6 changed files with 20 additions and 2 deletions

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@ -31,6 +31,7 @@ config BLACKFIN
select HAVE_OPROFILE
select ARCH_WANT_OPTIONAL_GPIOLIB
select HAVE_GENERIC_HARDIRQS
select GENERIC_ATOMIC64
select GENERIC_IRQ_PROBE
select IRQ_PER_CPU if SMP
select GENERIC_HARDIRQS_NO_DEPRECATED

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@ -121,4 +121,6 @@ static inline int atomic_test_mask(int mask, atomic_t *v)
#endif
#include <asm-generic/atomic64.h>
#endif

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@ -396,8 +396,9 @@
#define __NR_name_to_handle_at 375
#define __NR_open_by_handle_at 376
#define __NR_clock_adjtime 377
#define __NR_syncfs 378
#define __NR_syscall 378
#define __NR_syscall 379
#define NR_syscalls __NR_syscall
/* Old optional stuff no one actually uses */

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@ -81,7 +81,11 @@
/* PLL Status Register Is Inaccurate */
#define ANOMALY_05000351 (__SILICON_REVISION__ < 1)
/* bfrom_SysControl() Firmware Function Performs Improper System Reset */
#define ANOMALY_05000353 (__SILICON_REVISION__ < 2)
/*
* Note: anomaly sheet says this is fixed with bf54x-0.2+, but testing
* shows that the fix itself does not cover all cases.
*/
#define ANOMALY_05000353 (1)
/* Regulator Programming Blocked when Hibernate Wakeup Source Remains Active */
#define ANOMALY_05000355 (__SILICON_REVISION__ < 1)
/* System Stalled During A Core Access To AMC While A Core Access To NFC FIFO Is Required */

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@ -7,6 +7,7 @@
#include <linux/smp.h>
#include <asm/blackfin.h>
#include <asm/cacheflush.h>
#include <mach/pll.h>
int hotplug_coreb;
@ -14,8 +15,16 @@ int hotplug_coreb;
void platform_cpu_die(void)
{
unsigned long iwr;
hotplug_coreb = 1;
/*
* When CoreB wakes up, the code in _coreb_trampoline_start cannot
* turn off the data cache. This causes the CoreB failed to boot.
* As a workaround, we invalidate all the data cache before sleep.
*/
blackfin_invalidate_entire_dcache();
/* disable core timer */
bfin_write_TCNTL(0);

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@ -1752,6 +1752,7 @@ ENTRY(_sys_call_table)
.long _sys_name_to_handle_at /* 375 */
.long _sys_open_by_handle_at
.long _sys_clock_adjtime
.long _sys_syncfs
.rept NR_syscalls-(.-_sys_call_table)/4
.long _sys_ni_syscall