x86: cleanup kernel/setup_64.c
Clean it up before applying more patches to it. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
Thomas Gleixner
Ingo Molnar
parent
5cabbd97b1
commit
04e1ba8521
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@ -77,7 +77,7 @@ unsigned long saved_video_mode;
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int force_mwait __cpuinitdata;
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/*
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/*
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* Early DMI memory
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*/
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int dmi_alloc_index;
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@ -169,12 +169,12 @@ contig_initmem_init(unsigned long start_pfn, unsigned long end_pfn)
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bootmap_size = bootmem_bootmap_pages(end_pfn)<<PAGE_SHIFT;
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bootmap = find_e820_area(0, end_pfn<<PAGE_SHIFT, bootmap_size);
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if (bootmap == -1L)
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panic("Cannot find bootmem map of size %ld\n",bootmap_size);
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panic("Cannot find bootmem map of size %ld\n", bootmap_size);
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bootmap_size = init_bootmem(bootmap >> PAGE_SHIFT, end_pfn);
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e820_register_active_regions(0, start_pfn, end_pfn);
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free_bootmem_with_active_regions(0, end_pfn);
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reserve_bootmem(bootmap, bootmap_size);
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}
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}
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#endif
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#if defined(CONFIG_EDD) || defined(CONFIG_EDD_MODULE)
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@ -208,7 +208,8 @@ static void __init reserve_crashkernel(void)
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unsigned long long crash_size, crash_base;
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int ret;
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free_mem = ((unsigned long long)max_low_pfn - min_low_pfn) << PAGE_SHIFT;
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free_mem =
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((unsigned long long)max_low_pfn - min_low_pfn) << PAGE_SHIFT;
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ret = parse_crashkernel(boot_command_line, free_mem,
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&crash_size, &crash_base);
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@ -240,7 +241,7 @@ unsigned __initdata ebda_size;
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static void discover_ebda(void)
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{
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/*
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* there is a real-mode segmented pointer pointing to the
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* there is a real-mode segmented pointer pointing to the
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* 4K EBDA area at 0x40E
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*/
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ebda_addr = *(unsigned short *)__va(EBDA_ADDR_POINTER);
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@ -259,6 +260,8 @@ static void discover_ebda(void)
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void __init setup_arch(char **cmdline_p)
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{
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unsigned i;
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printk(KERN_INFO "Command line: %s\n", boot_command_line);
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ROOT_DEV = old_decode_dev(boot_params.hdr.root_dev);
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@ -345,13 +348,13 @@ void __init setup_arch(char **cmdline_p)
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#endif
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#ifdef CONFIG_NUMA
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numa_initmem_init(0, end_pfn);
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numa_initmem_init(0, end_pfn);
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#else
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contig_initmem_init(0, end_pfn);
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#endif
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/* Reserve direct mapping */
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reserve_bootmem_generic(table_start << PAGE_SHIFT,
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reserve_bootmem_generic(table_start << PAGE_SHIFT,
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(table_end - table_start) << PAGE_SHIFT);
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/* reserve kernel */
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@ -379,14 +382,14 @@ void __init setup_arch(char **cmdline_p)
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#endif
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#ifdef CONFIG_ACPI_SLEEP
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/*
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* Reserve low memory region for sleep support.
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*/
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/*
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* Reserve low memory region for sleep support.
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*/
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acpi_reserve_bootmem();
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#endif
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/*
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* Find and reserve possible boot-time SMP configuration:
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*/
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/*
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* Find and reserve possible boot-time SMP configuration:
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*/
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find_smp_config();
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#ifdef CONFIG_BLK_DEV_INITRD
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if (boot_params.hdr.type_of_loader && boot_params.hdr.ramdisk_image) {
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@ -437,16 +440,13 @@ void __init setup_arch(char **cmdline_p)
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/*
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* We trust e820 completely. No explicit ROM probing in memory.
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*/
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*/
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e820_reserve_resources(&code_resource, &data_resource, &bss_resource);
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e820_mark_nosave_regions();
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{
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unsigned i;
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/* request I/O space for devices used on all i[345]86 PCs */
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for (i = 0; i < ARRAY_SIZE(standard_io_resources); i++)
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request_resource(&ioport_resource, &standard_io_resources[i]);
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}
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e820_setup_gap();
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@ -483,9 +483,10 @@ static void __cpuinit display_cacheinfo(struct cpuinfo_x86 *c)
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if (n >= 0x80000005) {
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cpuid(0x80000005, &dummy, &ebx, &ecx, &edx);
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printk(KERN_INFO "CPU: L1 I Cache: %dK (%d bytes/line), D cache %dK (%d bytes/line)\n",
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edx>>24, edx&0xFF, ecx>>24, ecx&0xFF);
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c->x86_cache_size=(ecx>>24)+(edx>>24);
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printk(KERN_INFO "CPU: L1 I Cache: %dK (%d bytes/line), "
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"D cache %dK (%d bytes/line)\n",
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edx>>24, edx&0xFF, ecx>>24, ecx&0xFF);
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c->x86_cache_size = (ecx>>24) + (edx>>24);
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/* On K8 L1 TLB is inclusive, so don't count it */
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c->x86_tlbsize = 0;
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}
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@ -501,9 +502,9 @@ static void __cpuinit display_cacheinfo(struct cpuinfo_x86 *c)
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}
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if (n >= 0x80000007)
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cpuid(0x80000007, &dummy, &dummy, &dummy, &c->x86_power);
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cpuid(0x80000007, &dummy, &dummy, &dummy, &c->x86_power);
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if (n >= 0x80000008) {
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cpuid(0x80000008, &eax, &dummy, &dummy, &dummy);
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cpuid(0x80000008, &eax, &dummy, &dummy, &dummy);
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c->x86_virt_bits = (eax >> 8) & 0xff;
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c->x86_phys_bits = eax & 0xff;
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}
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@ -512,14 +513,15 @@ static void __cpuinit display_cacheinfo(struct cpuinfo_x86 *c)
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#ifdef CONFIG_NUMA
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static int nearby_node(int apicid)
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{
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int i;
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int i, node;
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for (i = apicid - 1; i >= 0; i--) {
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int node = apicid_to_node[i];
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node = apicid_to_node[i];
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if (node != NUMA_NO_NODE && node_online(node))
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return node;
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}
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for (i = apicid + 1; i < MAX_LOCAL_APIC; i++) {
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int node = apicid_to_node[i];
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node = apicid_to_node[i];
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if (node != NUMA_NO_NODE && node_online(node))
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return node;
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}
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@ -559,27 +561,29 @@ static void __init amd_detect_cmp(struct cpuinfo_x86 *c)
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c->phys_proc_id = phys_pkg_id(bits);
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#ifdef CONFIG_NUMA
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node = c->phys_proc_id;
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if (apicid_to_node[apicid] != NUMA_NO_NODE)
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node = apicid_to_node[apicid];
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if (!node_online(node)) {
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/* Two possibilities here:
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- The CPU is missing memory and no node was created.
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In that case try picking one from a nearby CPU
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- The APIC IDs differ from the HyperTransport node IDs
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which the K8 northbridge parsing fills in.
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Assume they are all increased by a constant offset,
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but in the same order as the HT nodeids.
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If that doesn't result in a usable node fall back to the
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path for the previous case. */
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node = c->phys_proc_id;
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if (apicid_to_node[apicid] != NUMA_NO_NODE)
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node = apicid_to_node[apicid];
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if (!node_online(node)) {
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/* Two possibilities here:
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- The CPU is missing memory and no node was created.
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In that case try picking one from a nearby CPU
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- The APIC IDs differ from the HyperTransport node IDs
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which the K8 northbridge parsing fills in.
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Assume they are all increased by a constant offset,
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but in the same order as the HT nodeids.
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If that doesn't result in a usable node fall back to the
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path for the previous case. */
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int ht_nodeid = apicid - (cpu_data(0).phys_proc_id << bits);
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if (ht_nodeid >= 0 &&
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apicid_to_node[ht_nodeid] != NUMA_NO_NODE)
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node = apicid_to_node[ht_nodeid];
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/* Pick a nearby node */
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if (!node_online(node))
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node = nearby_node(apicid);
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}
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if (ht_nodeid >= 0 &&
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apicid_to_node[ht_nodeid] != NUMA_NO_NODE)
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node = apicid_to_node[ht_nodeid];
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/* Pick a nearby node */
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if (!node_online(node))
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node = nearby_node(apicid);
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}
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numa_set_node(cpu, node);
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printk(KERN_INFO "CPU %d/%x -> Node %d\n", cpu, apicid, node);
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@ -599,8 +603,8 @@ static void __init amd_detect_cmp(struct cpuinfo_x86 *c)
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/* AMD systems with C1E don't have a working lAPIC timer. Check for that. */
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static __cpuinit int amd_apic_timer_broken(void)
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{
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u32 lo, hi;
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u32 eax = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);
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u32 lo, hi, eax = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);
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switch (eax & CPUID_XFAM) {
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case CPUID_XFAM_K8:
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if ((eax & CPUID_XMOD) < CPUID_XMOD_REV_F)
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@ -628,7 +632,7 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
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/*
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* Disable TLB flush filter by setting HWCR.FFDIS on K8
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* bit 6 of msr C001_0015
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*
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*
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* Errata 63 for SH-B3 steppings
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* Errata 122 for all steppings (F+ have it disabled by default)
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*/
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@ -642,10 +646,11 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
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/* Bit 31 in normal CPUID used for nonstandard 3DNow ID;
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3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */
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clear_bit(0*32+31, &c->x86_capability);
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/* On C+ stepping K8 rep microcode works well for copy/memset */
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level = cpuid_eax(1);
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if (c->x86 == 15 && ((level >= 0x0f48 && level < 0x0f50) || level >= 0x0f58))
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if (c->x86 == 15 && ((level >= 0x0f48 && level < 0x0f50) ||
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level >= 0x0f58))
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set_bit(X86_FEATURE_REP_GOOD, &c->x86_capability);
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if (c->x86 == 0x10 || c->x86 == 0x11)
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set_bit(X86_FEATURE_REP_GOOD, &c->x86_capability);
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@ -656,14 +661,14 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
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level = get_model_name(c);
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if (!level) {
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switch (c->x86) {
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switch (c->x86) {
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case 15:
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/* Should distinguish Models here, but this is only
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a fallback anyways. */
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strcpy(c->x86_model_id, "Hammer");
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break;
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}
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}
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break;
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}
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}
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display_cacheinfo(c);
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/* c->x86_power is 8000_0007 edx. Bit 8 is constant TSC */
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@ -697,25 +702,26 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
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static void __cpuinit detect_ht(struct cpuinfo_x86 *c)
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{
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#ifdef CONFIG_SMP
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u32 eax, ebx, ecx, edx;
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int index_msb, core_bits;
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u32 eax, ebx, ecx, edx;
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int index_msb, core_bits;
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cpuid(1, &eax, &ebx, &ecx, &edx);
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if (!cpu_has(c, X86_FEATURE_HT))
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return;
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if (cpu_has(c, X86_FEATURE_CMP_LEGACY))
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if (cpu_has(c, X86_FEATURE_CMP_LEGACY))
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goto out;
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smp_num_siblings = (ebx & 0xff0000) >> 16;
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if (smp_num_siblings == 1) {
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printk(KERN_INFO "CPU: Hyper-Threading is disabled\n");
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} else if (smp_num_siblings > 1 ) {
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} else if (smp_num_siblings > 1) {
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if (smp_num_siblings > NR_CPUS) {
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printk(KERN_WARNING "CPU: Unsupported number of the siblings %d", smp_num_siblings);
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printk(KERN_WARNING "CPU: Unsupported number of "
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"siblings %d", smp_num_siblings);
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smp_num_siblings = 1;
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return;
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}
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@ -725,7 +731,7 @@ static void __cpuinit detect_ht(struct cpuinfo_x86 *c)
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smp_num_siblings = smp_num_siblings / c->x86_max_cores;
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index_msb = get_count_order(smp_num_siblings) ;
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index_msb = get_count_order(smp_num_siblings);
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core_bits = get_count_order(c->x86_max_cores);
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@ -734,8 +740,10 @@ static void __cpuinit detect_ht(struct cpuinfo_x86 *c)
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}
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out:
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if ((c->x86_max_cores * smp_num_siblings) > 1) {
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printk(KERN_INFO "CPU: Physical Processor ID: %d\n", c->phys_proc_id);
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printk(KERN_INFO "CPU: Processor Core ID: %d\n", c->cpu_core_id);
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printk(KERN_INFO "CPU: Physical Processor ID: %d\n",
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c->phys_proc_id);
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printk(KERN_INFO "CPU: Processor Core ID: %d\n",
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c->cpu_core_id);
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}
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#endif
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@ -783,7 +791,7 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c)
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unsigned n;
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init_intel_cacheinfo(c);
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if (c->cpuid_level > 9 ) {
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if (c->cpuid_level > 9) {
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unsigned eax = cpuid_eax(10);
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/* Check for version and the number of counters */
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if ((eax & 0xff) && (((eax>>8) & 0xff) > 1))
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@ -822,7 +830,7 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c)
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set_bit(X86_FEATURE_SYNC_RDTSC, &c->x86_capability);
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else
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clear_bit(X86_FEATURE_SYNC_RDTSC, &c->x86_capability);
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c->x86_max_cores = intel_num_cpu_cores(c);
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c->x86_max_cores = intel_num_cpu_cores(c);
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srat_detect_node();
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}
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@ -869,7 +877,7 @@ static void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c)
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(unsigned int *)&c->x86_vendor_id[0],
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(unsigned int *)&c->x86_vendor_id[8],
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(unsigned int *)&c->x86_vendor_id[4]);
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get_cpu_vendor(c);
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/* Initialize the standard set of capabilities */
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@ -887,7 +895,7 @@ static void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c)
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c->x86 += (tfms >> 20) & 0xff;
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if (c->x86 >= 0x6)
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c->x86_model += ((tfms >> 16) & 0xF) << 4;
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if (c->x86_capability[0] & (1<<19))
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if (c->x86_capability[0] & (1<<19))
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c->x86_clflush_size = ((misc >> 8) & 0xff) * 8;
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} else {
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/* Have CPUID level 0 only - unheard of */
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@ -959,7 +967,7 @@ void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
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}
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select_idle_routine(c);
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detect_ht(c);
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detect_ht(c);
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/*
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* On SMP, boot_cpu_data holds the common feature set between
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@ -969,7 +977,7 @@ void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
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*/
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if (c != &boot_cpu_data) {
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/* AND the already accumulated flags with these */
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for (i = 0 ; i < NCAPINTS ; i++)
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for (i = 0; i < NCAPINTS; i++)
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boot_cpu_data.x86_capability[i] &= c->x86_capability[i];
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}
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@ -982,17 +990,16 @@ void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
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numa_add_cpu(smp_processor_id());
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#endif
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}
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void __cpuinit print_cpu_info(struct cpuinfo_x86 *c)
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{
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if (c->x86_model_id[0])
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printk("%s", c->x86_model_id);
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printk(KERN_INFO "%s", c->x86_model_id);
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if (c->x86_mask || c->cpuid_level >= 0)
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printk(" stepping %02x\n", c->x86_mask);
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if (c->x86_mask || c->cpuid_level >= 0)
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printk(KERN_CONT " stepping %02x\n", c->x86_mask);
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else
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printk("\n");
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printk(KERN_CONT "\n");
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}
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/*
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@ -1002,9 +1009,9 @@ void __cpuinit print_cpu_info(struct cpuinfo_x86 *c)
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static int show_cpuinfo(struct seq_file *m, void *v)
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{
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struct cpuinfo_x86 *c = v;
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int cpu = 0;
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int cpu = 0, i;
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/*
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/*
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* These flag bits must match the definitions in <asm/cpufeature.h>.
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* NULL means this bit is undefined or reserved; either way it doesn't
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* have meaning as far as Linux is concerned. Note that it's important
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@ -1014,10 +1021,10 @@ static int show_cpuinfo(struct seq_file *m, void *v)
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*/
|
||||
static const char *const x86_cap_flags[] = {
|
||||
/* Intel-defined */
|
||||
"fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
|
||||
"cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov",
|
||||
"pat", "pse36", "pn", "clflush", NULL, "dts", "acpi", "mmx",
|
||||
"fxsr", "sse", "sse2", "ss", "ht", "tm", "ia64", "pbe",
|
||||
"fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
|
||||
"cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov",
|
||||
"pat", "pse36", "pn", "clflush", NULL, "dts", "acpi", "mmx",
|
||||
"fxsr", "sse", "sse2", "ss", "ht", "tm", "ia64", "pbe",
|
||||
|
||||
/* AMD-defined */
|
||||
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
||||
|
|
@ -1084,34 +1091,35 @@ static int show_cpuinfo(struct seq_file *m, void *v)
|
|||
cpu = c->cpu_index;
|
||||
#endif
|
||||
|
||||
seq_printf(m,"processor\t: %u\n"
|
||||
"vendor_id\t: %s\n"
|
||||
"cpu family\t: %d\n"
|
||||
"model\t\t: %d\n"
|
||||
"model name\t: %s\n",
|
||||
(unsigned)cpu,
|
||||
c->x86_vendor_id[0] ? c->x86_vendor_id : "unknown",
|
||||
c->x86,
|
||||
(int)c->x86_model,
|
||||
c->x86_model_id[0] ? c->x86_model_id : "unknown");
|
||||
|
||||
seq_printf(m, "processor\t: %u\n"
|
||||
"vendor_id\t: %s\n"
|
||||
"cpu family\t: %d\n"
|
||||
"model\t\t: %d\n"
|
||||
"model name\t: %s\n",
|
||||
(unsigned)cpu,
|
||||
c->x86_vendor_id[0] ? c->x86_vendor_id : "unknown",
|
||||
c->x86,
|
||||
(int)c->x86_model,
|
||||
c->x86_model_id[0] ? c->x86_model_id : "unknown");
|
||||
|
||||
if (c->x86_mask || c->cpuid_level >= 0)
|
||||
seq_printf(m, "stepping\t: %d\n", c->x86_mask);
|
||||
else
|
||||
seq_printf(m, "stepping\t: unknown\n");
|
||||
|
||||
if (cpu_has(c,X86_FEATURE_TSC)) {
|
||||
|
||||
if (cpu_has(c, X86_FEATURE_TSC)) {
|
||||
unsigned int freq = cpufreq_quick_get((unsigned)cpu);
|
||||
|
||||
if (!freq)
|
||||
freq = cpu_khz;
|
||||
seq_printf(m, "cpu MHz\t\t: %u.%03u\n",
|
||||
freq / 1000, (freq % 1000));
|
||||
freq / 1000, (freq % 1000));
|
||||
}
|
||||
|
||||
/* Cache size */
|
||||
if (c->x86_cache_size >= 0)
|
||||
if (c->x86_cache_size >= 0)
|
||||
seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size);
|
||||
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
if (smp_num_siblings * c->x86_max_cores > 1) {
|
||||
seq_printf(m, "physical id\t: %d\n", c->phys_proc_id);
|
||||
|
|
@ -1120,48 +1128,43 @@ static int show_cpuinfo(struct seq_file *m, void *v)
|
|||
seq_printf(m, "core id\t\t: %d\n", c->cpu_core_id);
|
||||
seq_printf(m, "cpu cores\t: %d\n", c->booted_cores);
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
||||
seq_printf(m,
|
||||
"fpu\t\t: yes\n"
|
||||
"fpu_exception\t: yes\n"
|
||||
"cpuid level\t: %d\n"
|
||||
"wp\t\t: yes\n"
|
||||
"flags\t\t:",
|
||||
"fpu\t\t: yes\n"
|
||||
"fpu_exception\t: yes\n"
|
||||
"cpuid level\t: %d\n"
|
||||
"wp\t\t: yes\n"
|
||||
"flags\t\t:",
|
||||
c->cpuid_level);
|
||||
|
||||
{
|
||||
int i;
|
||||
for ( i = 0 ; i < 32*NCAPINTS ; i++ )
|
||||
if (cpu_has(c, i) && x86_cap_flags[i] != NULL)
|
||||
seq_printf(m, " %s", x86_cap_flags[i]);
|
||||
}
|
||||
|
||||
for (i = 0; i < 32*NCAPINTS; i++)
|
||||
if (cpu_has(c, i) && x86_cap_flags[i] != NULL)
|
||||
seq_printf(m, " %s", x86_cap_flags[i]);
|
||||
|
||||
seq_printf(m, "\nbogomips\t: %lu.%02lu\n",
|
||||
c->loops_per_jiffy/(500000/HZ),
|
||||
(c->loops_per_jiffy/(5000/HZ)) % 100);
|
||||
|
||||
if (c->x86_tlbsize > 0)
|
||||
if (c->x86_tlbsize > 0)
|
||||
seq_printf(m, "TLB size\t: %d 4K pages\n", c->x86_tlbsize);
|
||||
seq_printf(m, "clflush size\t: %d\n", c->x86_clflush_size);
|
||||
seq_printf(m, "cache_alignment\t: %d\n", c->x86_cache_alignment);
|
||||
|
||||
seq_printf(m, "address sizes\t: %u bits physical, %u bits virtual\n",
|
||||
seq_printf(m, "address sizes\t: %u bits physical, %u bits virtual\n",
|
||||
c->x86_phys_bits, c->x86_virt_bits);
|
||||
|
||||
seq_printf(m, "power management:");
|
||||
{
|
||||
unsigned i;
|
||||
for (i = 0; i < 32; i++)
|
||||
if (c->x86_power & (1 << i)) {
|
||||
if (i < ARRAY_SIZE(x86_power_flags) &&
|
||||
x86_power_flags[i])
|
||||
seq_printf(m, "%s%s",
|
||||
x86_power_flags[i][0]?" ":"",
|
||||
x86_power_flags[i]);
|
||||
else
|
||||
seq_printf(m, " [%d]", i);
|
||||
}
|
||||
for (i = 0; i < 32; i++) {
|
||||
if (c->x86_power & (1 << i)) {
|
||||
if (i < ARRAY_SIZE(x86_power_flags) &&
|
||||
x86_power_flags[i])
|
||||
seq_printf(m, "%s%s",
|
||||
x86_power_flags[i][0]?" ":"",
|
||||
x86_power_flags[i]);
|
||||
else
|
||||
seq_printf(m, " [%d]", i);
|
||||
}
|
||||
}
|
||||
|
||||
seq_printf(m, "\n\n");
|
||||
|
|
@ -1189,7 +1192,7 @@ static void c_stop(struct seq_file *m, void *v)
|
|||
}
|
||||
|
||||
struct seq_operations cpuinfo_op = {
|
||||
.start =c_start,
|
||||
.start = c_start,
|
||||
.next = c_next,
|
||||
.stop = c_stop,
|
||||
.show = show_cpuinfo,
|
||||
|
|
|
|||
Loading…
Reference in New Issue