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usb: dwc2: host: use msleep() for long delays 

ulseep_range() uses hrtimers and provides no advantage over msleep()
for larger delays. Fix up the 20+ ms delays here passing the adjusted "min"
value to msleep(). This helps reduce the load on the hrtimer subsystem.

Acked-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
This commit is contained in:
Nicholas Mc Guire 2017-01-12 16:54:03 +01:00 committed by Felipe Balbi
parent 0e4018ff5d
commit 04a9db7992
1 changed files with 6 additions and 6 deletions
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12
drivers/usb/dwc2/hcd.c
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@ -2150,7 +2150,7 @@ static int dwc2_hcd_endpoint_disable(struct dwc2_hsotg *hsotg,
} }
spin_unlock_irqrestore(&hsotg->lock, flags); spin_unlock_irqrestore(&hsotg->lock, flags);
usleep_range(20000, 40000); msleep(20);
spin_lock_irqsave(&hsotg->lock, flags); spin_lock_irqsave(&hsotg->lock, flags);
qh = ep->hcpriv; qh = ep->hcpriv;
if (!qh) { if (!qh) {
@ -3240,7 +3240,7 @@ static void dwc2_conn_id_status_change(struct work_struct *work)
"Waiting for Peripheral Mode, Mode=%s\n", "Waiting for Peripheral Mode, Mode=%s\n",
dwc2_is_host_mode(hsotg) ? "Host" : dwc2_is_host_mode(hsotg) ? "Host" :
"Peripheral"); "Peripheral");
usleep_range(20000, 40000); msleep(20);
if (++count > 250) if (++count > 250)
break; break;
} }
@ -3261,7 +3261,7 @@ static void dwc2_conn_id_status_change(struct work_struct *work)
dev_info(hsotg->dev, "Waiting for Host Mode, Mode=%s\n", dev_info(hsotg->dev, "Waiting for Host Mode, Mode=%s\n",
dwc2_is_host_mode(hsotg) ? dwc2_is_host_mode(hsotg) ?
"Host" : "Peripheral"); "Host" : "Peripheral");
usleep_range(20000, 40000); msleep(20);
if (++count > 250) if (++count > 250)
break; break;
} }
@ -3354,7 +3354,7 @@ static void dwc2_port_suspend(struct dwc2_hsotg *hsotg, u16 windex)
spin_unlock_irqrestore(&hsotg->lock, flags); spin_unlock_irqrestore(&hsotg->lock, flags);
usleep_range(200000, 250000); msleep(200);
} else { } else {
spin_unlock_irqrestore(&hsotg->lock, flags); spin_unlock_irqrestore(&hsotg->lock, flags);
} }
@ -3378,7 +3378,7 @@ static void dwc2_port_resume(struct dwc2_hsotg *hsotg)
pcgctl &= ~PCGCTL_STOPPCLK; pcgctl &= ~PCGCTL_STOPPCLK;
dwc2_writel(pcgctl, hsotg->regs + PCGCTL); dwc2_writel(pcgctl, hsotg->regs + PCGCTL);
spin_unlock_irqrestore(&hsotg->lock, flags); spin_unlock_irqrestore(&hsotg->lock, flags);
usleep_range(20000, 40000); msleep(20);
spin_lock_irqsave(&hsotg->lock, flags); spin_lock_irqsave(&hsotg->lock, flags);
} }
@ -3691,7 +3691,7 @@ static int dwc2_hcd_hub_control(struct dwc2_hsotg *hsotg, u16 typereq,
} }
/* Clear reset bit in 10ms (FS/LS) or 50ms (HS) */ /* Clear reset bit in 10ms (FS/LS) or 50ms (HS) */
usleep_range(50000, 70000); msleep(50);
hprt0 &= ~HPRT0_RST; hprt0 &= ~HPRT0_RST;
dwc2_writel(hprt0, hsotg->regs + HPRT0); dwc2_writel(hprt0, hsotg->regs + HPRT0);
hsotg->lx_state = DWC2_L0; /* Now back to On state */ hsotg->lx_state = DWC2_L0; /* Now back to On state */