Merge branch 'topic/axi' into for-linus
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commit
049d0d3849
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@ -72,6 +72,9 @@
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#define AXI_DMAC_FLAG_CYCLIC BIT(0)
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/* The maximum ID allocated by the hardware is 31 */
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#define AXI_DMAC_SG_UNUSED 32U
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struct axi_dmac_sg {
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dma_addr_t src_addr;
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dma_addr_t dest_addr;
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@ -80,6 +83,7 @@ struct axi_dmac_sg {
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unsigned int dest_stride;
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unsigned int src_stride;
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unsigned int id;
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bool schedule_when_free;
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};
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struct axi_dmac_desc {
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@ -200,11 +204,21 @@ static void axi_dmac_start_transfer(struct axi_dmac_chan *chan)
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}
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sg = &desc->sg[desc->num_submitted];
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/* Already queued in cyclic mode. Wait for it to finish */
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if (sg->id != AXI_DMAC_SG_UNUSED) {
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sg->schedule_when_free = true;
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return;
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}
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desc->num_submitted++;
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if (desc->num_submitted == desc->num_sgs)
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chan->next_desc = NULL;
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if (desc->num_submitted == desc->num_sgs) {
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if (desc->cyclic)
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desc->num_submitted = 0; /* Start again */
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else
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chan->next_desc = NULL;
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} else {
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chan->next_desc = desc;
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}
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sg->id = axi_dmac_read(dmac, AXI_DMAC_REG_TRANSFER_ID);
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@ -220,9 +234,11 @@ static void axi_dmac_start_transfer(struct axi_dmac_chan *chan)
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/*
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* If the hardware supports cyclic transfers and there is no callback to
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* call, enable hw cyclic mode to avoid unnecessary interrupts.
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* call and only a single segment, enable hw cyclic mode to avoid
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* unnecessary interrupts.
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*/
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if (chan->hw_cyclic && desc->cyclic && !desc->vdesc.tx.callback)
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if (chan->hw_cyclic && desc->cyclic && !desc->vdesc.tx.callback &&
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desc->num_sgs == 1)
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flags |= AXI_DMAC_FLAG_CYCLIC;
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axi_dmac_write(dmac, AXI_DMAC_REG_X_LENGTH, sg->x_len - 1);
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@ -237,37 +253,52 @@ static struct axi_dmac_desc *axi_dmac_active_desc(struct axi_dmac_chan *chan)
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struct axi_dmac_desc, vdesc.node);
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}
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static void axi_dmac_transfer_done(struct axi_dmac_chan *chan,
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static bool axi_dmac_transfer_done(struct axi_dmac_chan *chan,
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unsigned int completed_transfers)
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{
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struct axi_dmac_desc *active;
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struct axi_dmac_sg *sg;
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bool start_next = false;
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active = axi_dmac_active_desc(chan);
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if (!active)
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return;
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return false;
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if (active->cyclic) {
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vchan_cyclic_callback(&active->vdesc);
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} else {
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do {
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sg = &active->sg[active->num_completed];
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if (sg->id == AXI_DMAC_SG_UNUSED) /* Not yet submitted */
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break;
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if (!(BIT(sg->id) & completed_transfers))
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break;
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active->num_completed++;
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sg->id = AXI_DMAC_SG_UNUSED;
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if (sg->schedule_when_free) {
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sg->schedule_when_free = false;
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start_next = true;
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}
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if (active->cyclic)
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vchan_cyclic_callback(&active->vdesc);
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if (active->num_completed == active->num_sgs) {
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if (active->cyclic) {
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active->num_completed = 0; /* wrap around */
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} else {
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list_del(&active->vdesc.node);
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vchan_cookie_complete(&active->vdesc);
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active = axi_dmac_active_desc(chan);
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}
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} while (active);
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}
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} while (active);
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return start_next;
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}
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static irqreturn_t axi_dmac_interrupt_handler(int irq, void *devid)
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{
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struct axi_dmac *dmac = devid;
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unsigned int pending;
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bool start_next = false;
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pending = axi_dmac_read(dmac, AXI_DMAC_REG_IRQ_PENDING);
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if (!pending)
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@ -281,10 +312,10 @@ static irqreturn_t axi_dmac_interrupt_handler(int irq, void *devid)
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unsigned int completed;
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completed = axi_dmac_read(dmac, AXI_DMAC_REG_TRANSFER_DONE);
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axi_dmac_transfer_done(&dmac->chan, completed);
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start_next = axi_dmac_transfer_done(&dmac->chan, completed);
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}
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/* Space has become available in the descriptor queue */
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if (pending & AXI_DMAC_IRQ_SOT)
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if ((pending & AXI_DMAC_IRQ_SOT) || start_next)
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axi_dmac_start_transfer(&dmac->chan);
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spin_unlock(&dmac->chan.vchan.lock);
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@ -334,12 +365,16 @@ static void axi_dmac_issue_pending(struct dma_chan *c)
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static struct axi_dmac_desc *axi_dmac_alloc_desc(unsigned int num_sgs)
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{
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struct axi_dmac_desc *desc;
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unsigned int i;
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desc = kzalloc(sizeof(struct axi_dmac_desc) +
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sizeof(struct axi_dmac_sg) * num_sgs, GFP_NOWAIT);
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if (!desc)
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return NULL;
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for (i = 0; i < num_sgs; i++)
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desc->sg[i].id = AXI_DMAC_SG_UNUSED;
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desc->num_sgs = num_sgs;
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return desc;
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