soc: mediatek: add mtk mutex support for MT8183
Add mtk mutex support for MT8183 SoC. Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> Reviewed-by: CK Hu <ck.hu@mediatek.com> Link: https://lore.kernel.org/r/20210129092209.2584718-8-hsinyi@chromium.org Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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@ -14,6 +14,8 @@
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#define MT2701_MUTEX0_MOD0 0x2c
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#define MT2701_MUTEX0_SOF0 0x30
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#define MT8183_MUTEX0_MOD0 0x30
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#define MT8183_MUTEX0_SOF0 0x2c
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#define DISP_REG_MUTEX_EN(n) (0x20 + 0x20 * (n))
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#define DISP_REG_MUTEX(n) (0x24 + 0x20 * (n))
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@ -37,6 +39,18 @@
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#define MT8167_MUTEX_MOD_DISP_DITHER 15
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#define MT8167_MUTEX_MOD_DISP_UFOE 16
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#define MT8183_MUTEX_MOD_DISP_RDMA0 0
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#define MT8183_MUTEX_MOD_DISP_RDMA1 1
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#define MT8183_MUTEX_MOD_DISP_OVL0 9
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#define MT8183_MUTEX_MOD_DISP_OVL0_2L 10
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#define MT8183_MUTEX_MOD_DISP_OVL1_2L 11
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#define MT8183_MUTEX_MOD_DISP_WDMA0 12
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#define MT8183_MUTEX_MOD_DISP_COLOR0 13
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#define MT8183_MUTEX_MOD_DISP_CCORR0 14
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#define MT8183_MUTEX_MOD_DISP_AAL0 15
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#define MT8183_MUTEX_MOD_DISP_GAMMA0 16
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#define MT8183_MUTEX_MOD_DISP_DITHER0 17
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#define MT8173_MUTEX_MOD_DISP_OVL0 11
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#define MT8173_MUTEX_MOD_DISP_OVL1 12
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#define MT8173_MUTEX_MOD_DISP_RDMA0 13
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@ -87,6 +101,11 @@
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#define MT2712_MUTEX_SOF_DSI3 6
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#define MT8167_MUTEX_SOF_DPI0 2
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#define MT8167_MUTEX_SOF_DPI1 3
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#define MT8183_MUTEX_SOF_DSI0 1
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#define MT8183_MUTEX_SOF_DPI0 2
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#define MT8183_MUTEX_EOF_DSI0 (MT8183_MUTEX_SOF_DSI0 << 6)
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#define MT8183_MUTEX_EOF_DPI0 (MT8183_MUTEX_SOF_DPI0 << 6)
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struct mtk_mutex {
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int id;
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@ -181,6 +200,20 @@ static const unsigned int mt8173_mutex_mod[DDP_COMPONENT_ID_MAX] = {
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[DDP_COMPONENT_WDMA1] = MT8173_MUTEX_MOD_DISP_WDMA1,
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};
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static const unsigned int mt8183_mutex_mod[DDP_COMPONENT_ID_MAX] = {
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[DDP_COMPONENT_AAL0] = MT8183_MUTEX_MOD_DISP_AAL0,
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[DDP_COMPONENT_CCORR] = MT8183_MUTEX_MOD_DISP_CCORR0,
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[DDP_COMPONENT_COLOR0] = MT8183_MUTEX_MOD_DISP_COLOR0,
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[DDP_COMPONENT_DITHER] = MT8183_MUTEX_MOD_DISP_DITHER0,
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[DDP_COMPONENT_GAMMA] = MT8183_MUTEX_MOD_DISP_GAMMA0,
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[DDP_COMPONENT_OVL0] = MT8183_MUTEX_MOD_DISP_OVL0,
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[DDP_COMPONENT_OVL_2L0] = MT8183_MUTEX_MOD_DISP_OVL0_2L,
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[DDP_COMPONENT_OVL_2L1] = MT8183_MUTEX_MOD_DISP_OVL1_2L,
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[DDP_COMPONENT_RDMA0] = MT8183_MUTEX_MOD_DISP_RDMA0,
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[DDP_COMPONENT_RDMA1] = MT8183_MUTEX_MOD_DISP_RDMA1,
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[DDP_COMPONENT_WDMA0] = MT8183_MUTEX_MOD_DISP_WDMA0,
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};
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static const unsigned int mt2712_mutex_sof[MUTEX_SOF_DSI3 + 1] = {
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[MUTEX_SOF_SINGLE_MODE] = MUTEX_SOF_SINGLE_MODE,
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[MUTEX_SOF_DSI0] = MUTEX_SOF_DSI0,
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@ -198,6 +231,13 @@ static const unsigned int mt8167_mutex_sof[MUTEX_SOF_DSI3 + 1] = {
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[MUTEX_SOF_DPI1] = MT8167_MUTEX_SOF_DPI1,
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};
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/* Add EOF setting so overlay hardware can receive frame done irq */
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static const unsigned int mt8183_mutex_sof[MUTEX_SOF_DSI3 + 1] = {
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[MUTEX_SOF_SINGLE_MODE] = MUTEX_SOF_SINGLE_MODE,
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[MUTEX_SOF_DSI0] = MUTEX_SOF_DSI0 | MT8183_MUTEX_EOF_DSI0,
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[MUTEX_SOF_DPI0] = MT8183_MUTEX_SOF_DPI0 | MT8183_MUTEX_EOF_DPI0,
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};
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static const struct mtk_mutex_data mt2701_mutex_driver_data = {
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.mutex_mod = mt2701_mutex_mod,
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.mutex_sof = mt2712_mutex_sof,
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@ -227,6 +267,14 @@ static const struct mtk_mutex_data mt8173_mutex_driver_data = {
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.mutex_sof_reg = MT2701_MUTEX0_SOF0,
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};
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static const struct mtk_mutex_data mt8183_mutex_driver_data = {
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.mutex_mod = mt8183_mutex_mod,
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.mutex_sof = mt8183_mutex_sof,
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.mutex_mod_reg = MT8183_MUTEX0_MOD0,
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.mutex_sof_reg = MT8183_MUTEX0_SOF0,
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.no_clk = true,
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};
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struct mtk_mutex *mtk_mutex_get(struct device *dev)
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{
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struct mtk_mutex_ctx *mtx = dev_get_drvdata(dev);
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@ -457,6 +505,8 @@ static const struct of_device_id mutex_driver_dt_match[] = {
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.data = &mt8167_mutex_driver_data},
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{ .compatible = "mediatek,mt8173-disp-mutex",
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.data = &mt8173_mutex_driver_data},
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{ .compatible = "mediatek,mt8183-disp-mutex",
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.data = &mt8183_mutex_driver_data},
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{},
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};
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MODULE_DEVICE_TABLE(of, mutex_driver_dt_match);
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