staging: rtl8192su: r8192U.h, clean header
Signed-off-by: Florian Schilhabel <florian.c.schilhabel@googlemail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
Florian Schilhabel
Greg Kroah-Hartman
parent
0825c40f95
commit
03dff6265d
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@ -20,14 +20,12 @@
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#include <linux/module.h>
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#include <linux/kernel.h>
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//#include <linux/config.h>
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#include <linux/init.h>
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#include <linux/ioport.h>
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#include <linux/sched.h>
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#include <linux/types.h>
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#include <linux/slab.h>
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#include <linux/netdevice.h>
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//#include <linux/pci.h>
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#include <linux/usb.h>
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#include <linux/etherdevice.h>
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#include <linux/delay.h>
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@ -51,9 +49,7 @@
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#define RTL819X_EEPROM_CMD_CK (1 << 2)
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#define RTL819X_EEPROM_CMD_CS (1 << 3)
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//#define RTL8192U
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#define RTL819xU_MODULE_NAME "rtl819xU"
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//added for HW security, john.0629
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#define FALSE 0
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#define TRUE 1
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#define MAX_KEY_LEN 61
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@ -137,10 +133,8 @@ do { if(rt_global_debug_component & component) \
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#define COMP_SEC BIT20 // Event handling
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#define COMP_LED BIT21 // For LED.
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#define COMP_RF BIT22 // For RF.
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//1!!!!!!!!!!!!!!!!!!!!!!!!!!!
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#define COMP_RXDESC BIT23 // Show Rx desc information for SD3 debug. Added by Annie, 2006-07-15.
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//1//1Attention Please!!!<11n or 8190 specific code should be put below this line>
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//1!!!!!!!!!!!!!!!!!!!!!!!!!!!
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#define COMP_FIRMWARE BIT24 //for firmware downloading
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#define COMP_HT BIT25 // For 802.11n HT related information. by Emily 2006-8-11
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@ -159,8 +153,7 @@ do { if(rt_global_debug_component & component) \
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printk( "Assertion failed! %s,%s,%s,line=%d\n", \
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#expr,__FILE__,__FUNCTION__,__LINE__); \
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}
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//wb added to debug out data buf
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//if you want print DATA buffer related BA, please set ieee80211_debug_level to DATA|BA
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#define RT_DEBUG_DATA(level, data, datalen) \
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do{ if ((rt_global_debug_component & (level)) == (level)) \
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{ \
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@ -180,25 +173,17 @@ do { if(rt_global_debug_component & component) \
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#define RT_DEBUG_DATA(level, data, datalen) do {} while(0)
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#endif /* RTL8169_DEBUG */
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//#ifdef RTL8192SU
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//2TODO: We should define 8192S firmware related macro settings here!!
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#define RTL819X_DEFAULT_RF_TYPE RF_1T2R
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#define RTL819X_TOTAL_RF_PATH 2
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//#define Rtl819XFwBootArray Rtl8192UsbFwBootArray
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//#define Rtl819XFwMainArray Rtl8192UsbFwMainArray
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//#define Rtl819XFwDataArray Rtl8192UsbFwDataArray
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#define Rtl819XMACPHY_Array_PG Rtl8192UsbMACPHY_Array_PG
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#define Rtl819XMACPHY_Array Rtl8192UsbMACPHY_Array
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#define Rtl819XPHY_REGArray Rtl8192UsbPHY_REGArray
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#define Rtl819XPHY_REG_1T2RArray Rtl8192UsbPHY_REG_1T2RArray
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//#define Rtl819XRadioA_Array Rtl8192UsbRadioA_Array
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//#define Rtl819XRadioB_Array Rtl8192UsbRadioB_Array
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#define Rtl819XRadioC_Array Rtl8192UsbRadioC_Array
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#define Rtl819XRadioD_Array Rtl8192UsbRadioD_Array
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//2008.11.06 Add.
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#define Rtl819XFwImageArray Rtl8192SUFwImgArray
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#define Rtl819XMAC_Array Rtl8192SUMAC_2T_Array
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#define Rtl819XAGCTAB_Array Rtl8192SUAGCTAB_Array
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@ -212,8 +197,6 @@ do { if(rt_global_debug_component & component) \
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#define Rtl819XRadioB_GM_Array Rtl8192SURadioB_GM_Array
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#define Rtl819XRadioA_to1T_Array Rtl8192SURadioA_to1T_Array
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#define Rtl819XRadioA_to2T_Array Rtl8192SURadioA_to2T_Array
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//#endif
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//
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// Queue Select Value in TxDesc
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//
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@ -256,7 +239,6 @@ do { if(rt_global_debug_component & component) \
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#define DESC90_RATEMCS15 0x0f
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#define DESC90_RATEMCS32 0x20
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//#ifdef RTL8192SU
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// CCK Rates, TxHT = 0
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#define DESC92S_RATE1M 0x00
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#define DESC92S_RATE2M 0x01
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@ -292,13 +274,12 @@ do { if(rt_global_debug_component & component) \
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#define DESC92S_RATEMCS15 0x1b
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#define DESC92S_RATEMCS15_SG 0x1c
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#define DESC92S_RATEMCS32 0x20
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//#endif
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#define RTL819X_DEFAULT_RF_TYPE RF_1T2R
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#define IEEE80211_WATCH_DOG_TIME 2000
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#define PHY_Beacon_RSSI_SLID_WIN_MAX 10
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//for txpowertracking by amy
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//for txpowertracking
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#define OFDM_Table_Length 19
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#define CCK_Table_length 12
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@ -522,7 +503,6 @@ typedef struct rtl8192_rx_info {
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u8 out_pipe;
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}rtl8192_rx_info ;
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//typedef struct _RX_DESC_STATUS_8192SU{
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typedef struct rx_desc_819x_usb{
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//DWORD 0
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u16 Length:14;
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@ -582,14 +562,12 @@ typedef struct rx_desc_819x_usb{
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//DWORD 5
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u32 TSFL;
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//}RX_DESC_STATUS_8192SU, *PRX_DESC_STATUS_8192SU;
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}rx_desc_819x_usb, *prx_desc_819x_usb;
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//
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// Driver info are written to the begining of the RxBuffer
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//
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//typedef struct _RX_DRIVER_INFO_8192S{
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typedef struct rx_drvinfo_819x_usb{
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//
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// Driver info contain PHY status and other variabel size info
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@ -597,62 +575,27 @@ typedef struct rx_drvinfo_819x_usb{
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//
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//DWORD 0
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/*u4Byte gain_0:7;
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u4Byte trsw_0:1;
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u4Byte gain_1:7;
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u4Byte trsw_1:1;
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u4Byte gain_2:7;
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u4Byte trsw_2:1;
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u4Byte gain_3:7;
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u4Byte trsw_3:1; */
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u8 gain_trsw[4];
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//DWORD 1
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/*u4Byte pwdb_all:8;
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u4Byte cfosho_0:8;
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u4Byte cfosho_1:8;
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u4Byte cfosho_2:8;*/
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u8 pwdb_all;
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u8 cfosho[4];
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//DWORD 2
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/*u4Byte cfosho_3:8;
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u4Byte cfotail_0:8;
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u4Byte cfotail_1:8;
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u4Byte cfotail_2:8;*/
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u8 cfotail[4];
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//DWORD 3
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/*u4Byte cfotail_3:8;
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u4Byte rxevm_0:8;
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u4Byte rxevm_1:8;
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u4Byte rxsnr_0:8;*/
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char rxevm[2];
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char rxsnr[4];
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//DWORD 4
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/*u4Byte rxsnr_1:8;
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u4Byte rxsnr_2:8;
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u4Byte rxsnr_3:8;
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u4Byte pdsnr_0:8;*/
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u8 pdsnr[2];
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//DWORD 5
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/*u4Byte pdsnr_1:8;
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u4Byte csi_current_0:8;
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u4Byte csi_current_1:8;
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u4Byte csi_target_0:8;*/
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u8 csi_current[2];
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u8 csi_target[2];
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//DWORD 6
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/*u4Byte csi_target_1:8;
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u4Byte sigevm:8;
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u4Byte max_ex_pwr:8;
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u4Byte ex_intf_flag:1;
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u4Byte sgi_en:1;
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u4Byte rxsc:2;
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u4Byte reserve:4;*/
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u8 sigevm;
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u8 max_ex_pwr;
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u8 ex_intf_flag:1;
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@ -669,10 +612,8 @@ typedef struct rx_drvinfo_819x_usb{
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#define MAX_DEV_ADDR_SIZE 8 /* support till 64 bit bus width OS */
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#define MAX_FIRMWARE_INFORMATION_SIZE 32 /*2006/04/30 by Emily forRTL8190*/
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//#define MAX_802_11_HEADER_LENGTH (40 + MAX_FIRMWARE_INFORMATION_SIZE)
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#define ENCRYPTION_MAX_OVERHEAD 128
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#define USB_HWDESC_HEADER_LEN sizeof(tx_desc_819x_usb)
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//#define TX_PACKET_SHIFT_BYTES (USB_HWDESC_HEADER_LEN + sizeof(tx_fwinfo_819x_usb))
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#define MAX_FRAGMENT_COUNT 8
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#ifdef RTL8192U
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#define MAX_TRANSMIT_BUFFER_SIZE 8000
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@ -780,10 +721,6 @@ typedef struct rtl_reg_debug{
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typedef struct _rt_9x_tx_rate_history {
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u32 cck[4];
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u32 ofdm[8];
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// HT_MCS[0][]: BW=0 SG=0
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// HT_MCS[1][]: BW=1 SG=0
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// HT_MCS[2][]: BW=0 SG=1
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// HT_MCS[3][]: BW=1 SG=1
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u32 ht_mcs[4][16];
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}rt_tx_rahis_t, *prt_tx_rahis_t;
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typedef struct _RT_SMOOTH_DATA_4RF {
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@ -798,11 +735,6 @@ typedef struct _RT_SMOOTH_DATA_4RF {
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typedef struct Stats
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{
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unsigned long txrdu;
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// unsigned long rxrdu;
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//unsigned long rxnolast;
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//unsigned long rxnodata;
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// unsigned long rxreset;
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// unsigned long rxnopointer;
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unsigned long rxok;
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unsigned long rxframgment;
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unsigned long rxcmdpkt[4]; //08/05/08 amy rx cmd element txfeedback/bcn report/cfg set/query
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@ -822,18 +754,8 @@ typedef struct Stats
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unsigned long txnperr;
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unsigned long txnpdrop;
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unsigned long txresumed;
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// unsigned long rxerr;
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// unsigned long rxoverflow;
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// unsigned long rxint;
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unsigned long txnpokint;
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// unsigned long txhpokint;
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// unsigned long txhperr;
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// unsigned long ints;
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// unsigned long shints;
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unsigned long txoverflow;
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// unsigned long rxdmafail;
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// unsigned long txbeacon;
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// unsigned long txbeaconerr;
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unsigned long txlpokint;
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unsigned long txlpdrop;
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unsigned long txlperr;
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@ -899,14 +821,11 @@ typedef struct Stats
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u32 CurrentShowTxate;
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} Stats;
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// Bandwidth Offset
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#define HAL_PRIME_CHNL_OFFSET_DONT_CARE 0
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#define HAL_PRIME_CHNL_OFFSET_LOWER 1
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#define HAL_PRIME_CHNL_OFFSET_UPPER 2
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//+by amy 080507
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typedef struct ChnlAccessSetting {
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u16 SIFS_Timer;
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u16 DIFS_Timer;
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@ -946,14 +865,12 @@ typedef enum _RT_RF_TYPE_819xU{
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RF_PSEUDO_11N = 5,
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}RT_RF_TYPE_819xU, *PRT_RF_TYPE_819xU;
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//#ifdef RTL8192SU
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typedef enum _RF_POWER_STATE{
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RF_ON,
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RF_SLEEP,
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RF_OFF,
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RF_SHUT_DOWN,
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}RF_POWER_STATE, *PRF_POWER_STATE;
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//#endif
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typedef struct _rate_adaptive
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{
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@ -1004,7 +921,6 @@ typedef struct _init_gain
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u8 cca;
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} init_gain, *pinit_gain;
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//by amy 0606
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typedef struct _phy_ofdm_rx_status_report_819xusb
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{
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@ -1083,8 +999,6 @@ typedef enum{
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NIC_8192SU = 5,
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} nic_t;
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//definded by WB. Ready to fill handlers for different NIC types.
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//add handle here when necessary.
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struct rtl819x_ops{
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nic_t nic_type;
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void (* rtl819x_read_eeprom_info)(struct net_device *dev);
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@ -1121,55 +1035,31 @@ typedef struct r8192_priv
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short card_8192; /* O: rtl8192, 1:rtl8185 V B/C, 2:rtl8185 V D */
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u8 card_8192_version; /* if TCR reports card V B/C this discriminates */
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// short phy_ver; /* meaningful for rtl8225 1:A 2:B 3:C */
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short enable_gpio0;
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enum card_type {PCI,MINIPCI,CARDBUS,USB}card_type;
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short hw_plcp_len;
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short plcp_preamble_mode;
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spinlock_t irq_lock;
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// spinlock_t irq_th_lock;
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spinlock_t tx_lock;
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spinlock_t ps_lock;
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struct mutex mutex;
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spinlock_t rf_lock; //used to lock rf write operation added by wb
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u16 irq_mask;
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// short irq_enabled;
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// struct net_device *dev; //comment this out.
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short chan;
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short sens;
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short max_sens;
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// u8 chtxpwr[15]; //channels from 1 to 14, 0 not used
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// u8 chtxpwr_ofdm[15]; //channels from 1 to 14, 0 not used
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// u8 cck_txpwr_base;
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// u8 ofdm_txpwr_base;
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// u8 challow[15]; //channels from 1 to 14, 0 not used
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short up;
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short crcmon; //if 1 allow bad crc frame reception in monitor mode
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// short prism_hdr;
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// struct timer_list scan_timer;
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/*short scanpending;
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short stopscan;*/
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// spinlock_t scan_lock;
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// u8 active_probe;
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//u8 active_scan_num;
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struct semaphore wx_sem;
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struct semaphore rf_sem; //used to lock rf write operation added by wb, modified by david
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// short hw_wep;
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// short digphy;
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// short antb;
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// short diversity;
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// u8 cs_treshold;
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// short rcr_csense;
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u8 rf_type; //0 means 1T2R, 1 means 2T4R
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RT_RF_TYPE_819xU rf_chip;
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// u32 key0[4];
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short (*rf_set_sens)(struct net_device *dev,short sens);
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u8 (*rf_set_chan)(struct net_device *dev,u8 ch);
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void (*rf_close)(struct net_device *dev);
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@ -1182,13 +1072,10 @@ typedef struct r8192_priv
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struct proc_dir_entry *dir_dev;
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/*RX stuff*/
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// u32 *rxring;
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// u32 *rxringtail;
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// dma_addr_t rxringdma;
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struct urb **rx_urb;
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struct urb **rx_cmd_urb;
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/* modified by davad for Rx process */
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/* for Rx process */
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struct sk_buff_head rx_queue;
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struct sk_buff_head skb_queue;
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@ -1248,7 +1135,6 @@ typedef struct r8192_priv
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u8 EEPROMTxPowerLevelOFDM24G[3]; // OFDM 2.4G channel 1~14
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u8 EEPROMTxPowerLevelOFDM5G[24]; // OFDM 5G
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//RTL8192SU
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bool bDmDisableProtect;
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bool bIgnoreDiffRateTxPowerOffset;
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@ -1291,7 +1177,7 @@ typedef struct r8192_priv
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u8 RfTxPwrLevelCck[2][14];
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u8 RfTxPwrLevelOfdm1T[2][14];
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u8 RfTxPwrLevelOfdm2T[2][14];
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// 2009/01/20 MH Add for new EEPROM format.
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// new EEPROM format.
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u8 TxPwrHt20Diff[2][14]; // HT 20<->40 Pwr diff
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u8 TxPwrLegacyHtDiff[2][14]; // For HT<->legacy pwr diff
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u8 TxPwrbandEdgeHt40[2][2]; // Band edge for HY 40MHZlow/up channel
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@ -1303,7 +1189,6 @@ typedef struct r8192_priv
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u8 MidHighPwrTHR_L1;
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u8 MidHighPwrTHR_L2;
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u8 TxPwrSafetyFlag; // for Tx power safety spec
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//RTL8192SU
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/*PHY related*/
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BB_REGISTER_DEFINITION_T PHYRegDef[4]; //Radio A/B/C/D
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@ -1335,19 +1220,15 @@ typedef struct r8192_priv
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// 8190 40MHz mode
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//
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u8 nCur40MhzPrimeSC; // Control channel sub-carrier
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// Joseph test for shorten RF configuration time.
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// We save RF reg0 in this variable to reduce RF reading.
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//
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u32 RfReg0Value[4];
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u8 NumTotalRFPath;
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bool brfpath_rxenable[4];
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//RF set related
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bool SetRFPowerStateInProgress;
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//+by amy 080507
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struct timer_list watch_dog_timer;
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//+by amy 080515 for dynamic mechenism
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//Add by amy Tx Power Control for Near/Far Range 2008/05/15
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bool bdynamic_txpower; //bDynamicTxPower
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bool bDynamicTxHighPower; // Tx high power state
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bool bDynamicTxLowPower; // Tx low power state
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@ -1356,17 +1237,16 @@ typedef struct r8192_priv
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||||
bool bstore_last_dtpflag;
|
||||
bool bstart_txctrl_bydtp; //Define to discriminate on High power State or on sitesuvey to change Tx gain index
|
||||
//Add by amy for Rate Adaptive
|
||||
|
||||
rate_adaptive rate_adaptive;
|
||||
//Add by amy for TX power tracking
|
||||
//2008/05/15 Mars OPEN/CLOSE TX POWER TRACKING
|
||||
// TX power tracking
|
||||
txbbgain_struct txbbgain_table[TxBBGainTableLength];
|
||||
u8 EEPROMTxPowerTrackEnable;
|
||||
u8 txpower_count;//For 6 sec do tracking again
|
||||
bool btxpower_trackingInit;
|
||||
u8 OFDM_index;
|
||||
u8 CCK_index;
|
||||
//2007/09/10 Mars Add CCK TX Power Tracking
|
||||
// CCK TX Power Tracking
|
||||
ccktxbbgain_struct cck_txbbgain_table[CCKTxBBGainTableLength];
|
||||
ccktxbbgain_struct cck_txbbgain_ch14_table[CCKTxBBGainTableLength];
|
||||
u8 rfa_txpowertrackingindex;
|
||||
|
|
@ -1386,7 +1266,7 @@ typedef struct r8192_priv
|
|||
//For Backup Initial Gain
|
||||
init_gain initgain_backup;
|
||||
u8 DefaultInitialGain[4];
|
||||
// For EDCA Turbo mode, Added by amy 080515.
|
||||
// For EDCA Turbo mode
|
||||
bool bis_any_nonbepkts;
|
||||
bool bcurrent_turbo_EDCA;
|
||||
bool bis_cur_rdlstate;
|
||||
|
|
@ -1400,17 +1280,16 @@ typedef struct r8192_priv
|
|||
u8 framesync;
|
||||
u32 framesyncC34;
|
||||
u8 framesyncMonitor;
|
||||
//Added by amy 080516 for RX related
|
||||
// RX related
|
||||
u16 nrxAMPDU_size;
|
||||
u8 nrxAMPDU_aggr_num;
|
||||
|
||||
//by amy for gpio
|
||||
// gpio
|
||||
bool bHwRadioOff;
|
||||
|
||||
//by amy for reset_count
|
||||
u32 reset_count;
|
||||
bool bpbc_pressed;
|
||||
//by amy for debug
|
||||
// debug
|
||||
u32 txpower_checkcnt;
|
||||
u32 txpower_tracking_callback_cnt;
|
||||
u8 thermal_read_val[40];
|
||||
|
|
@ -1419,7 +1298,7 @@ typedef struct r8192_priv
|
|||
u32 ccktxpower_adjustcnt_ch14;
|
||||
u8 tx_fwinfo_force_subcarriermode;
|
||||
u8 tx_fwinfo_force_subcarrierval;
|
||||
//by amy for silent reset
|
||||
// silent reset
|
||||
RESET_TYPE ResetProgress;
|
||||
bool bForcedSilentReset;
|
||||
bool bDisableNormalResetCheck;
|
||||
|
|
@ -1432,7 +1311,6 @@ typedef struct r8192_priv
|
|||
|
||||
u16 SifsTime;
|
||||
|
||||
//define work item by amy 080526
|
||||
struct delayed_work update_beacon_wq;
|
||||
struct delayed_work watch_dog_wq;
|
||||
struct delayed_work txpower_tracking_wq;
|
||||
|
|
@ -1441,8 +1319,7 @@ typedef struct r8192_priv
|
|||
struct delayed_work initialgain_operate_wq;
|
||||
|
||||
struct workqueue_struct *priv_wq;
|
||||
//#ifdef RTL8192SU
|
||||
//lzm add for 8192S
|
||||
|
||||
u32 IntrMask;
|
||||
// RF and BB access related synchronization flags.
|
||||
bool bChangeBBInProgress; // BaseBand RW is still in progress.
|
||||
|
|
@ -1457,7 +1334,6 @@ typedef struct r8192_priv
|
|||
u8 ThermalReadBackIndex; //debug only
|
||||
u8 ThermalReadVal[40]; //debug only
|
||||
|
||||
// For HCT test, 2005.07.15, by rcnjko.
|
||||
// not realize true, just define it, set it 0 default, because some func use it
|
||||
bool bInHctTest;
|
||||
|
||||
|
|
@ -1474,7 +1350,6 @@ typedef struct r8192_priv
|
|||
char RF_C_TxPwDiff; // Antenna gain offset, rf-c to rf-a
|
||||
|
||||
bool bRFSiOrPi;//0=si, 1=pi.
|
||||
//lzm add for 8192S
|
||||
|
||||
bool SetFwCmdInProgress; //is set FW CMD in Progress? 92S only
|
||||
u8 CurrentFwCmdIO;
|
||||
|
|
@ -1499,14 +1374,6 @@ typedef struct r8192_priv
|
|||
|
||||
}r8192_priv;
|
||||
|
||||
// for rtl8187
|
||||
// now mirging to rtl8187B
|
||||
/*
|
||||
typedef enum{
|
||||
LOW_PRIORITY = 0x02,
|
||||
NORM_PRIORITY
|
||||
} priority_t;
|
||||
*/
|
||||
//for rtl8187B
|
||||
typedef enum{
|
||||
BULK_PRIORITY = 0x01,
|
||||
|
|
@ -1560,7 +1427,6 @@ void rtl8192_rx_enable(struct net_device *);
|
|||
void rtl8192_tx_enable(struct net_device *);
|
||||
|
||||
void rtl8192_disassociate(struct net_device *dev);
|
||||
//void fix_rx_fifo(struct net_device *dev);
|
||||
void rtl8185_set_rf_pins_enable(struct net_device *dev,u32 a);
|
||||
|
||||
void rtl8192_set_anaparam(struct net_device *dev,u32 a);
|
||||
|
|
@ -1575,7 +1441,6 @@ void write_phy_cck(struct net_device *dev, u8 adr, u32 data);
|
|||
void write_phy_ofdm(struct net_device *dev, u8 adr, u32 data);
|
||||
void rtl8185_tx_antenna(struct net_device *dev, u8 ant);
|
||||
void rtl8192_set_rxconf(struct net_device *dev);
|
||||
//short check_nic_enough_desc(struct net_device *dev, priority_t priority);
|
||||
extern void rtl819xusb_beacon_tx(struct net_device *dev,u16 tx_rate);
|
||||
void CamResetAllEntry(struct net_device* dev);
|
||||
void EnableHWSecurityConfig8192(struct net_device *dev);
|
||||
|
|
|
|||
Loading…
Reference in New Issue