MIPS: IP32: use generic dma noncoherent ops
Provide phys_to_dma/dma_to_phys helpers, everything else is generic. Signed-off-by: Christoph Hellwig <hch@lst.de> Patchwork: https://patchwork.linux-mips.org/patch/19546/ Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: David Daney <david.daney@cavium.com> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Jiaxun Yang <jiaxun.yang@flygoat.com> Cc: Tom Bogendoerfer <tsbogend@alpha.franken.de> Cc: Huacai Chen <chenhc@lemote.com> Cc: iommu@lists.linux-foundation.org Cc: linux-mips@linux-mips.org
This commit is contained in:
Christoph Hellwig
Paul Burton
parent
e905086e6b
commit
03df8229a8
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@ -726,6 +726,7 @@ config SGI_IP28
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config SGI_IP32
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bool "SGI IP32 (O2)"
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select ARCH_HAS_PHYS_TO_DMA
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select FW_ARC
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select FW_ARC32
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select BOOT_ELF32
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@ -734,7 +735,6 @@ config SGI_IP32
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select DMA_NONCOHERENT
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select HW_HAS_PCI
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select IRQ_MIPS_CPU
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select MIPS_DMA_DEFAULT
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select R5000_CPU_SCACHE
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select RM7000_CPU_SCACHE
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select SYS_HAS_CPU_R5000
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@ -1,92 +0,0 @@
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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2006 Ralf Baechle <ralf@linux-mips.org>
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*
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*/
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#ifndef __ASM_MACH_IP32_DMA_COHERENCE_H
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#define __ASM_MACH_IP32_DMA_COHERENCE_H
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#include <asm/ip32/crime.h>
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struct device;
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/*
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* Few notes.
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* 1. CPU sees memory as two chunks: 0-256M@0x0, and the rest @0x40000000+256M
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* 2. PCI sees memory as one big chunk @0x0 (or we could use 0x40000000 for
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* native-endian)
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* 3. All other devices see memory as one big chunk at 0x40000000
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* 4. Non-PCI devices will pass NULL as struct device*
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*
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* Thus we translate differently, depending on device.
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*/
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#define RAM_OFFSET_MASK 0x3fffffffUL
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static inline dma_addr_t plat_map_dma_mem(struct device *dev, void *addr,
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size_t size)
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{
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dma_addr_t pa = virt_to_phys(addr) & RAM_OFFSET_MASK;
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if (dev == NULL)
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pa += CRIME_HI_MEM_BASE;
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return pa;
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}
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static inline dma_addr_t plat_map_dma_mem_page(struct device *dev,
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struct page *page)
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{
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dma_addr_t pa;
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pa = page_to_phys(page) & RAM_OFFSET_MASK;
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if (dev == NULL)
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pa += CRIME_HI_MEM_BASE;
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return pa;
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}
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/* This is almost certainly wrong but it's what dma-ip32.c used to use */
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static inline unsigned long plat_dma_addr_to_phys(struct device *dev,
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dma_addr_t dma_addr)
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{
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unsigned long addr = dma_addr & RAM_OFFSET_MASK;
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if (dma_addr >= 256*1024*1024)
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addr += CRIME_HI_MEM_BASE;
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return addr;
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}
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static inline void plat_unmap_dma_mem(struct device *dev, dma_addr_t dma_addr,
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size_t size, enum dma_data_direction direction)
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{
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}
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static inline int plat_dma_supported(struct device *dev, u64 mask)
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{
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/*
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* we fall back to GFP_DMA when the mask isn't all 1s,
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* so we can't guarantee allocations that must be
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* within a tighter range than GFP_DMA..
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*/
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if (mask < DMA_BIT_MASK(24))
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return 0;
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return 1;
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}
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static inline void plat_post_dma_flush(struct device *dev)
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{
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}
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static inline int plat_device_is_coherent(struct device *dev)
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{
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return 0; /* IP32 is non-coherent */
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}
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#endif /* __ASM_MACH_IP32_DMA_COHERENCE_H */
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@ -4,4 +4,4 @@
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#
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obj-y += ip32-berr.o ip32-irq.o ip32-platform.o ip32-setup.o ip32-reset.o \
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crime.o ip32-memory.o
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crime.o ip32-memory.o ip32-dma.o
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@ -0,0 +1,37 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2006 Ralf Baechle <ralf@linux-mips.org>
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*/
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#include <linux/dma-direct.h>
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#include <asm/ip32/crime.h>
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/*
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* Few notes.
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* 1. CPU sees memory as two chunks: 0-256M@0x0, and the rest @0x40000000+256M
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* 2. PCI sees memory as one big chunk @0x0 (or we could use 0x40000000 for
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* native-endian)
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* 3. All other devices see memory as one big chunk at 0x40000000
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* 4. Non-PCI devices will pass NULL as struct device*
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*
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* Thus we translate differently, depending on device.
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*/
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#define RAM_OFFSET_MASK 0x3fffffffUL
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dma_addr_t __phys_to_dma(struct device *dev, phys_addr_t paddr)
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{
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dma_addr_t dma_addr = paddr & RAM_OFFSET_MASK;
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if (!dev)
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dma_addr += CRIME_HI_MEM_BASE;
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return dma_addr;
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}
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phys_addr_t __dma_to_phys(struct device *dev, dma_addr_t dma_addr)
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{
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phys_addr_t paddr = dma_addr & RAM_OFFSET_MASK;
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if (dma_addr >= 256*1024*1024)
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paddr += CRIME_HI_MEM_BASE;
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return paddr;
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}
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