arm64/sysreg: Convert ID_PFR2_EL1 to automatic generation
Convert ID_PFR2_EL1 to be automatically generated as per DDI0487I.a, no functional changes. Reviewed-by: Mark Brown <broonie@kernel.org> Signed-off-by: James Morse <james.morse@arm.com> Link: https://lore.kernel.org/r/20221130171637.718182-32-james.morse@arm.com Signed-off-by: Will Deacon <will@kernel.org>
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@ -165,7 +165,6 @@
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#define SYS_MPIDR_EL1 sys_reg(3, 0, 0, 0, 5)
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#define SYS_REVIDR_EL1 sys_reg(3, 0, 0, 0, 6)
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#define SYS_ID_PFR2_EL1 sys_reg(3, 0, 0, 3, 4)
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#define SYS_ID_DFR0_EL1 sys_reg(3, 0, 0, 1, 2)
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#define SYS_ID_DFR1_EL1 sys_reg(3, 0, 0, 3, 5)
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#define SYS_ID_AFR0_EL1 sys_reg(3, 0, 0, 1, 3)
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@ -694,9 +693,6 @@
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#define ID_DFR0_EL1_CopSDbg_SHIFT 4
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#define ID_DFR0_EL1_CopDbg_SHIFT 0
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#define ID_PFR2_EL1_SSBS_SHIFT 4
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#define ID_PFR2_EL1_CSV3_SHIFT 0
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#define MVFR0_EL1_FPRound_SHIFT 28
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#define MVFR0_EL1_FPShVec_SHIFT 24
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#define MVFR0_EL1_FPSqrt_SHIFT 20
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@ -606,6 +606,22 @@ Enum 3:0 SpecSEI
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EndEnum
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EndSysreg
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Sysreg ID_PFR2_EL1 3 0 0 3 4
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Res0 63:12
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Enum 11:8 RAS_frac
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0b0000 NI
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0b0001 RASv1p1
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EndEnum
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Enum 7:4 SSBS
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0b0000 NI
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0b0001 IMP
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EndEnum
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Enum 3:0 CSV3
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0b0000 NI
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0b0001 IMP
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EndEnum
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EndSysreg
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Sysreg ID_AA64PFR0_EL1 3 0 0 4 0
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Enum 63:60 CSV3
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0b0000 NI
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