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iommu/hygon: Add support for Hygon family 18h model 4h IOAPIC 

The SB IOAPIC is on the device 0xb from Hygon family 18h model 4h.

Signed-off-by: Pu Wen <puwen@hygon.cn>
Signed-off-by: Jinliang Zheng <alexjlzheng@tencent.com>
Reviewed-by: Bin Lai <robinlai@tencent.com>
Signed-off-by: Jinliang Zheng <alexjlzheng@tencent.com>
Reviewed-by: caelli <caelli@tencent.com>
Signed-off-by: Jianping Liu <frankjpliu@tencent.com>
This commit is contained in:
Pu Wen 2023-06-08 12:37:13 +08:00 committed by Jianping Liu
parent 2336e8989a
commit 038d8bb6ce
1 changed files with 9 additions and 1 deletions
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10
drivers/iommu/amd_iommu_init.c
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@ -2445,6 +2445,9 @@ static void __init free_iommu_resources(void)
/* SB IOAPIC is always on this device in AMD systems */ /* SB IOAPIC is always on this device in AMD systems */
#define IOAPIC_SB_DEVID ((0x00 << 8) | PCI_DEVFN(0x14, 0)) #define IOAPIC_SB_DEVID ((0x00 << 8) | PCI_DEVFN(0x14, 0))
/* SB IOAPIC for Hygon family 18h model 4h is on the device 0xb */
#define IOAPIC_SB_DEVID_FAM18H_M4H ((0x00 << 8) | PCI_DEVFN(0xb, 0))
static bool __init check_ioapic_information(void) static bool __init check_ioapic_information(void)
{ {
const char *fw_bug = FW_BUG; const char *fw_bug = FW_BUG;
@ -2470,7 +2473,12 @@ static bool __init check_ioapic_information(void)
pr_err("%s: IOAPIC[%d] not in IVRS table\n", pr_err("%s: IOAPIC[%d] not in IVRS table\n",
fw_bug, id); fw_bug, id);
ret = false; ret = false;
} else if (devid == IOAPIC_SB_DEVID) { } else if (devid == IOAPIC_SB_DEVID ||
(boot_cpu_data.x86_vendor == X86_VENDOR_HYGON &&
boot_cpu_data.x86 == 0x18 &&
boot_cpu_data.x86_model >= 0x4 &&
boot_cpu_data.x86_model <= 0xf &&
devid == IOAPIC_SB_DEVID_FAM18H_M4H)) {
has_sb_ioapic = true; has_sb_ioapic = true;
ret = true; ret = true;
} }