lib: Add generic PIO mapping method
41f8bba7f5 ("of/pci: Add pci_register_io_range() and
pci_pio_to_address()") added support for PCI I/O space mapped into CPU
physical memory space. With that support, the I/O ranges configured for
PCI/PCIe hosts on some architectures can be mapped to logical PIO and
converted easily between CPU address and the corresponding logical PIO.
Based on this, PCI I/O port space can be accessed via in/out accessors that
use memory read/write.
But on some platforms, there are bus hosts that access I/O port space with
host-local I/O port addresses rather than memory addresses.
Add a more generic I/O mapping method to support those devices. With this
patch, both the CPU addresses and the host-local port can be mapped into
the logical PIO space with different logical/fake PIOs. After this, all
the I/O accesses to either PCI MMIO devices or host-local I/O peripherals
can be unified into the existing I/O accessors defined in asm-generic/io.h
and be redirected to the right device-specific hooks based on the input
logical PIO.
Tested-by: dann frazier <dann.frazier@canonical.com>
Signed-off-by: Zhichang Yuan <yuanzhichang@hisilicon.com>
Signed-off-by: Gabriele Paoloni <gabriele.paoloni@huawei.com>
Signed-off-by: John Garry <john.garry@huawei.com>
[bhelgaas: remove -EFAULT return from logic_pio_register_range() per
https://lkml.kernel.org/r/20180403143909.GA21171@ulmo, fix NULL pointer
checking per https://lkml.kernel.org/r/20180403211505.GA29612@embeddedor.com]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>This commit is contained in:
Zhichang Yuan
Bjorn Helgaas
parent
7928b2cbe5
commit
031e360186
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@ -351,6 +351,8 @@ static inline void writesq(volatile void __iomem *addr, const void *buffer,
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#define IO_SPACE_LIMIT 0xffff
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#endif
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#include <linux/logic_pio.h>
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/*
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* {in,out}{b,w,l}() access little endian I/O. {in,out}{b,w,l}_p() can be
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* implemented on hardware that needs an additional delay for I/O accesses to
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@ -0,0 +1,123 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2017 HiSilicon Limited, All Rights Reserved.
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* Author: Gabriele Paoloni <gabriele.paoloni@huawei.com>
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* Author: Zhichang Yuan <yuanzhichang@hisilicon.com>
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*/
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#ifndef __LINUX_LOGIC_PIO_H
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#define __LINUX_LOGIC_PIO_H
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#include <linux/fwnode.h>
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enum {
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LOGIC_PIO_INDIRECT, /* Indirect IO flag */
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LOGIC_PIO_CPU_MMIO, /* Memory-mapped IO flag */
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};
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struct logic_pio_hwaddr {
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struct list_head list;
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struct fwnode_handle *fwnode;
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resource_size_t hw_start;
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resource_size_t io_start;
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resource_size_t size; /* range size populated */
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unsigned long flags;
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void *hostdata;
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const struct logic_pio_host_ops *ops;
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};
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struct logic_pio_host_ops {
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u32 (*in)(void *hostdata, unsigned long addr, size_t dwidth);
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void (*out)(void *hostdata, unsigned long addr, u32 val,
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size_t dwidth);
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u32 (*ins)(void *hostdata, unsigned long addr, void *buffer,
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size_t dwidth, unsigned int count);
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void (*outs)(void *hostdata, unsigned long addr, const void *buffer,
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size_t dwidth, unsigned int count);
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};
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#ifdef CONFIG_INDIRECT_PIO
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u8 logic_inb(unsigned long addr);
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void logic_outb(u8 value, unsigned long addr);
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void logic_outw(u16 value, unsigned long addr);
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void logic_outl(u32 value, unsigned long addr);
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u16 logic_inw(unsigned long addr);
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u32 logic_inl(unsigned long addr);
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void logic_outb(u8 value, unsigned long addr);
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void logic_outw(u16 value, unsigned long addr);
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void logic_outl(u32 value, unsigned long addr);
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void logic_insb(unsigned long addr, void *buffer, unsigned int count);
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void logic_insl(unsigned long addr, void *buffer, unsigned int count);
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void logic_insw(unsigned long addr, void *buffer, unsigned int count);
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void logic_outsb(unsigned long addr, const void *buffer, unsigned int count);
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void logic_outsw(unsigned long addr, const void *buffer, unsigned int count);
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void logic_outsl(unsigned long addr, const void *buffer, unsigned int count);
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#ifndef inb
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#define inb logic_inb
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#endif
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#ifndef inw
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#define inw logic_inw
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#endif
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#ifndef inl
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#define inl logic_inl
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#endif
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#ifndef outb
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#define outb logic_outb
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#endif
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#ifndef outw
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#define outw logic_outw
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#endif
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#ifndef outl
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#define outl logic_outl
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#endif
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#ifndef insb
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#define insb logic_insb
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#endif
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#ifndef insw
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#define insw logic_insw
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#endif
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#ifndef insl
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#define insl logic_insl
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#endif
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#ifndef outsb
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#define outsb logic_outsb
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#endif
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#ifndef outsw
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#define outsw logic_outsw
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#endif
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#ifndef outsl
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#define outsl logic_outsl
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#endif
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/*
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* We reserve 0x4000 bytes for Indirect IO as so far this library is only
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* used by the HiSilicon LPC Host. If needed, we can reserve a wider IO
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* area by redefining the macro below.
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*/
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#define PIO_INDIRECT_SIZE 0x4000
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#define MMIO_UPPER_LIMIT (IO_SPACE_LIMIT - PIO_INDIRECT_SIZE)
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#else
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#define MMIO_UPPER_LIMIT IO_SPACE_LIMIT
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#endif /* CONFIG_INDIRECT_PIO */
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struct logic_pio_hwaddr *find_io_range_by_fwnode(struct fwnode_handle *fwnode);
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unsigned long logic_pio_trans_hwaddr(struct fwnode_handle *fwnode,
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resource_size_t hw_addr, resource_size_t size);
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int logic_pio_register_range(struct logic_pio_hwaddr *newrange);
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resource_size_t logic_pio_to_hwaddr(unsigned long pio);
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unsigned long logic_pio_trans_cpuaddr(resource_size_t hw_addr);
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#endif /* __LINUX_LOGIC_PIO_H */
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16
lib/Kconfig
16
lib/Kconfig
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@ -55,6 +55,22 @@ config ARCH_USE_CMPXCHG_LOCKREF
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config ARCH_HAS_FAST_MULTIPLIER
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bool
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config INDIRECT_PIO
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bool "Access I/O in non-MMIO mode"
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depends on ARM64
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help
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On some platforms where no separate I/O space exists, there are I/O
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hosts which can not be accessed in MMIO mode. Using the logical PIO
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mechanism, the host-local I/O resource can be mapped into system
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logic PIO space shared with MMIO hosts, such as PCI/PCIe, then the
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system can access the I/O devices with the mapped-logic PIO through
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I/O accessors.
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This way has relatively little I/O performance cost. Please make
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sure your devices really need this configure item enabled.
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When in doubt, say N.
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config CRC_CCITT
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tristate "CRC-CCITT functions"
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help
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@ -81,6 +81,8 @@ obj-$(CONFIG_HAS_IOMEM) += iomap_copy.o devres.o
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obj-$(CONFIG_CHECK_SIGNATURE) += check_signature.o
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obj-$(CONFIG_DEBUG_LOCKING_API_SELFTESTS) += locking-selftest.o
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obj-y += logic_pio.o
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obj-$(CONFIG_GENERIC_HWEIGHT) += hweight.o
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obj-$(CONFIG_BTREE) += btree.o
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@ -0,0 +1,280 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2017 HiSilicon Limited, All Rights Reserved.
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* Author: Gabriele Paoloni <gabriele.paoloni@huawei.com>
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* Author: Zhichang Yuan <yuanzhichang@hisilicon.com>
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*/
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#define pr_fmt(fmt) "LOGIC PIO: " fmt
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#include <linux/of.h>
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#include <linux/io.h>
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#include <linux/logic_pio.h>
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#include <linux/mm.h>
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#include <linux/rculist.h>
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#include <linux/sizes.h>
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#include <linux/slab.h>
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/* The unique hardware address list */
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static LIST_HEAD(io_range_list);
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static DEFINE_MUTEX(io_range_mutex);
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/* Consider a kernel general helper for this */
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#define in_range(b, first, len) ((b) >= (first) && (b) < (first) + (len))
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/**
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* logic_pio_register_range - register logical PIO range for a host
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* @new_range: pointer to the IO range to be registered.
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*
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* Returns 0 on success, the error code in case of failure.
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*
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* Register a new IO range node in the IO range list.
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*/
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int logic_pio_register_range(struct logic_pio_hwaddr *new_range)
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{
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struct logic_pio_hwaddr *range;
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resource_size_t start;
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resource_size_t end;
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resource_size_t mmio_sz = 0;
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resource_size_t iio_sz = MMIO_UPPER_LIMIT;
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int ret = 0;
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if (!new_range || !new_range->fwnode || !new_range->size)
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return -EINVAL;
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start = new_range->hw_start;
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end = new_range->hw_start + new_range->size;
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mutex_lock(&io_range_mutex);
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list_for_each_entry_rcu(range, &io_range_list, list) {
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if (range->fwnode == new_range->fwnode) {
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/* range already there */
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goto end_register;
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}
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if (range->flags == LOGIC_PIO_CPU_MMIO &&
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new_range->flags == LOGIC_PIO_CPU_MMIO) {
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/* for MMIO ranges we need to check for overlap */
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if (start >= range->hw_start + range->size ||
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end < range->hw_start) {
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mmio_sz += range->size;
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} else {
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ret = -EFAULT;
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goto end_register;
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}
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} else if (range->flags == LOGIC_PIO_INDIRECT &&
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new_range->flags == LOGIC_PIO_INDIRECT) {
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iio_sz += range->size;
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}
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}
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/* range not registered yet, check for available space */
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if (new_range->flags == LOGIC_PIO_CPU_MMIO) {
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if (mmio_sz + new_range->size - 1 > MMIO_UPPER_LIMIT) {
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/* if it's too big check if 64K space can be reserved */
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if (mmio_sz + SZ_64K - 1 > MMIO_UPPER_LIMIT) {
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ret = -E2BIG;
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goto end_register;
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}
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new_range->size = SZ_64K;
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pr_warn("Requested IO range too big, new size set to 64K\n");
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}
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new_range->io_start = mmio_sz;
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} else if (new_range->flags == LOGIC_PIO_INDIRECT) {
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if (iio_sz + new_range->size - 1 > IO_SPACE_LIMIT) {
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ret = -E2BIG;
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goto end_register;
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}
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new_range->io_start = iio_sz;
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} else {
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/* invalid flag */
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ret = -EINVAL;
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goto end_register;
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}
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list_add_tail_rcu(&new_range->list, &io_range_list);
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end_register:
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mutex_unlock(&io_range_mutex);
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return ret;
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}
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/**
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* find_io_range_by_fwnode - find logical PIO range for given FW node
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* @fwnode: FW node handle associated with logical PIO range
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*
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* Returns pointer to node on success, NULL otherwise.
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*
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* Traverse the io_range_list to find the registered node for @fwnode.
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*/
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struct logic_pio_hwaddr *find_io_range_by_fwnode(struct fwnode_handle *fwnode)
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{
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struct logic_pio_hwaddr *range;
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list_for_each_entry_rcu(range, &io_range_list, list) {
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if (range->fwnode == fwnode)
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return range;
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}
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return NULL;
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}
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/* Return a registered range given an input PIO token */
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static struct logic_pio_hwaddr *find_io_range(unsigned long pio)
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{
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struct logic_pio_hwaddr *range;
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list_for_each_entry_rcu(range, &io_range_list, list) {
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if (in_range(pio, range->io_start, range->size))
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return range;
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}
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pr_err("PIO entry token %lx invalid\n", pio);
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return NULL;
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}
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/**
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* logic_pio_to_hwaddr - translate logical PIO to HW address
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* @pio: logical PIO value
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*
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* Returns HW address if valid, ~0 otherwise.
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*
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* Translate the input logical PIO to the corresponding hardware address.
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* The input PIO should be unique in the whole logical PIO space.
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*/
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resource_size_t logic_pio_to_hwaddr(unsigned long pio)
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{
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struct logic_pio_hwaddr *range;
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range = find_io_range(pio);
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if (range)
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return range->hw_start + pio - range->io_start;
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return (resource_size_t)~0;
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}
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/**
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* logic_pio_trans_hwaddr - translate HW address to logical PIO
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* @fwnode: FW node reference for the host
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* @addr: Host-relative HW address
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* @size: size to translate
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*
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* Returns Logical PIO value if successful, ~0UL otherwise
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*/
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unsigned long logic_pio_trans_hwaddr(struct fwnode_handle *fwnode,
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resource_size_t addr, resource_size_t size)
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{
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struct logic_pio_hwaddr *range;
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range = find_io_range_by_fwnode(fwnode);
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if (!range || range->flags == LOGIC_PIO_CPU_MMIO) {
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pr_err("IO range not found or invalid\n");
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return ~0UL;
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}
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if (range->size < size) {
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pr_err("resource size %pa cannot fit in IO range size %pa\n",
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&size, &range->size);
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return ~0UL;
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}
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return addr - range->hw_start + range->io_start;
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}
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unsigned long logic_pio_trans_cpuaddr(resource_size_t addr)
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{
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struct logic_pio_hwaddr *range;
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list_for_each_entry_rcu(range, &io_range_list, list) {
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if (range->flags != LOGIC_PIO_CPU_MMIO)
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continue;
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if (in_range(addr, range->hw_start, range->size))
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return addr - range->hw_start + range->io_start;
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}
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pr_err("addr %llx not registered in io_range_list\n",
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(unsigned long long) addr);
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return ~0UL;
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}
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#if defined(CONFIG_INDIRECT_PIO) && defined(PCI_IOBASE)
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#define BUILD_LOGIC_IO(bw, type) \
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type logic_in##bw(unsigned long addr) \
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{ \
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type ret = (type)~0; \
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\
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if (addr < MMIO_UPPER_LIMIT) { \
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ret = read##bw(PCI_IOBASE + addr); \
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} else if (addr >= MMIO_UPPER_LIMIT && addr < IO_SPACE_LIMIT) { \
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struct logic_pio_hwaddr *entry = find_io_range(addr); \
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\
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if (entry && entry->ops) \
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ret = entry->ops->in(entry->hostdata, \
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addr, sizeof(type)); \
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else \
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WARN_ON_ONCE(1); \
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} \
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return ret; \
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} \
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\
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void logic_out##bw(type value, unsigned long addr) \
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{ \
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if (addr < MMIO_UPPER_LIMIT) { \
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write##bw(value, PCI_IOBASE + addr); \
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} else if (addr >= MMIO_UPPER_LIMIT && addr < IO_SPACE_LIMIT) { \
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struct logic_pio_hwaddr *entry = find_io_range(addr); \
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\
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if (entry && entry->ops) \
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entry->ops->out(entry->hostdata, \
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addr, value, sizeof(type)); \
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else \
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WARN_ON_ONCE(1); \
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} \
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} \
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\
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void logic_ins##bw(unsigned long addr, void *buffer, \
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unsigned int count) \
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{ \
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if (addr < MMIO_UPPER_LIMIT) { \
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reads##bw(PCI_IOBASE + addr, buffer, count); \
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} else if (addr >= MMIO_UPPER_LIMIT && addr < IO_SPACE_LIMIT) { \
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struct logic_pio_hwaddr *entry = find_io_range(addr); \
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\
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if (entry && entry->ops) \
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entry->ops->ins(entry->hostdata, \
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addr, buffer, sizeof(type), count); \
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else \
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WARN_ON_ONCE(1); \
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} \
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\
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} \
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\
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void logic_outs##bw(unsigned long addr, const void *buffer, \
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unsigned int count) \
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{ \
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if (addr < MMIO_UPPER_LIMIT) { \
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writes##bw(PCI_IOBASE + addr, buffer, count); \
|
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} else if (addr >= MMIO_UPPER_LIMIT && addr < IO_SPACE_LIMIT) { \
|
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struct logic_pio_hwaddr *entry = find_io_range(addr); \
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\
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if (entry && entry->ops) \
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entry->ops->outs(entry->hostdata, \
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addr, buffer, sizeof(type), count); \
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else \
|
||||
WARN_ON_ONCE(1); \
|
||||
} \
|
||||
}
|
||||
|
||||
BUILD_LOGIC_IO(b, u8)
|
||||
EXPORT_SYMBOL(logic_inb);
|
||||
EXPORT_SYMBOL(logic_insb);
|
||||
EXPORT_SYMBOL(logic_outb);
|
||||
EXPORT_SYMBOL(logic_outsb);
|
||||
|
||||
BUILD_LOGIC_IO(w, u16)
|
||||
EXPORT_SYMBOL(logic_inw);
|
||||
EXPORT_SYMBOL(logic_insw);
|
||||
EXPORT_SYMBOL(logic_outw);
|
||||
EXPORT_SYMBOL(logic_outsw);
|
||||
|
||||
BUILD_LOGIC_IO(l, u32)
|
||||
EXPORT_SYMBOL(logic_inl);
|
||||
EXPORT_SYMBOL(logic_insl);
|
||||
EXPORT_SYMBOL(logic_outl);
|
||||
EXPORT_SYMBOL(logic_outsl);
|
||||
|
||||
#endif /* CONFIG_INDIRECT_PIO && PCI_IOBASE */
|
||||
Loading…
Reference in New Issue