clk: samsung: mark s3c...._clk_sleep_init() as __init

These functions are referencing s3c...._clk_regs[], which are marked as
__initdata. When compiling with CONFIG_DEBUG_SECTION_MISMATCH=y, this
produces warnings like

WARNING: vmlinux.o(.text+0x198350):
Section mismatch in reference from the function s3c2410_clk_sleep_init()
to the (unknown reference) .init.data:(unknown)

Mark the s3c...._clk_sleep_init() functions as __init in
order to fix this.

Fixes: ca2e90ac18 ("clk: samsung: add clock controller driver for s3c2412")
Signed-off-by: Martin Kaiser <martin@kaiser.cx>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
This commit is contained in:
Martin Kaiser 2017-01-25 22:42:25 +01:00 committed by Sylwester Nawrocki
parent 96a8d7536f
commit 02c952c8f9
4 changed files with 8 additions and 8 deletions

View File

@ -76,7 +76,7 @@ static struct syscore_ops s3c2410_clk_syscore_ops = {
.resume = s3c2410_clk_resume,
};
static void s3c2410_clk_sleep_init(void)
static void __init s3c2410_clk_sleep_init(void)
{
s3c2410_save = samsung_clk_alloc_reg_dump(s3c2410_clk_regs,
ARRAY_SIZE(s3c2410_clk_regs));
@ -90,7 +90,7 @@ static void s3c2410_clk_sleep_init(void)
return;
}
#else
static void s3c2410_clk_sleep_init(void) {}
static void __init s3c2410_clk_sleep_init(void) {}
#endif
PNAME(fclk_p) = { "mpll", "div_slow" };

View File

@ -69,7 +69,7 @@ static struct syscore_ops s3c2412_clk_syscore_ops = {
.resume = s3c2412_clk_resume,
};
static void s3c2412_clk_sleep_init(void)
static void __init s3c2412_clk_sleep_init(void)
{
s3c2412_save = samsung_clk_alloc_reg_dump(s3c2412_clk_regs,
ARRAY_SIZE(s3c2412_clk_regs));
@ -83,7 +83,7 @@ static void s3c2412_clk_sleep_init(void)
return;
}
#else
static void s3c2412_clk_sleep_init(void) {}
static void __init s3c2412_clk_sleep_init(void) {}
#endif
static struct clk_div_table divxti_d[] = {

View File

@ -89,7 +89,7 @@ static struct syscore_ops s3c2443_clk_syscore_ops = {
.resume = s3c2443_clk_resume,
};
static void s3c2443_clk_sleep_init(void)
static void __init s3c2443_clk_sleep_init(void)
{
s3c2443_save = samsung_clk_alloc_reg_dump(s3c2443_clk_regs,
ARRAY_SIZE(s3c2443_clk_regs));
@ -103,7 +103,7 @@ static void s3c2443_clk_sleep_init(void)
return;
}
#else
static void s3c2443_clk_sleep_init(void) {}
static void __init s3c2443_clk_sleep_init(void) {}
#endif
PNAME(epllref_p) = { "mpllref", "mpllref", "xti", "ext" };

View File

@ -121,7 +121,7 @@ static struct syscore_ops s3c64xx_clk_syscore_ops = {
.resume = s3c64xx_clk_resume,
};
static void s3c64xx_clk_sleep_init(void)
static void __init s3c64xx_clk_sleep_init(void)
{
s3c64xx_save_common = samsung_clk_alloc_reg_dump(s3c64xx_clk_regs,
ARRAY_SIZE(s3c64xx_clk_regs));
@ -145,7 +145,7 @@ err_warn:
__func__);
}
#else
static void s3c64xx_clk_sleep_init(void) {}
static void __init s3c64xx_clk_sleep_init(void) {}
#endif
/* List of parent clocks common for all S3C64xx SoCs. */