usb: typec: maxim_contaminant: Implement check_contaminant callback
Maxim TCPC has additional ADCs and low current(1ua) current source to measure the impedance of CC and SBU pins. When tcpm invokes the check_contaminant callback, Maxim TCPC measures the impedance of the CC & SBU pins and when the impedance measured is less than 1MOhm, it is assumed that USB-C port is contaminated. CC comparators are also checked to differentiate between presence of sink and contaminant. Once USB-C is deemed to be contaminated, MAXIM TCPC has additional hardware to disable normal DRP toggling cycle and enable 1ua on CC pins once every 2.4secs/4.8secs. Maxim TCPC interrupts AP once the impedance on the CC pin is above the 1MOhm threshold. The Maxim tcpc driver then signals TCPM_PORT_CLEAN to restart toggling. Renaming tcpci_maxim.c to tcpci_maxim_core.c and moving reg read/write helper functions to the tcpci_maxim.h header file. Signed-off-by: Badhri Jagan Sridharan <badhri@google.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Link: https://lore.kernel.org/r/20230114093246.1933321-3-badhri@google.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Badhri Jagan Sridharan
Greg Kroah-Hartman
parent
abc028a270
commit
02b332a063
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@ -8,3 +8,4 @@ obj-$(CONFIG_TYPEC_RT1711H) += tcpci_rt1711h.o
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obj-$(CONFIG_TYPEC_MT6360) += tcpci_mt6360.o
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obj-$(CONFIG_TYPEC_TCPCI_MT6370) += tcpci_mt6370.o
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obj-$(CONFIG_TYPEC_TCPCI_MAXIM) += tcpci_maxim.o
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tcpci_maxim-y += tcpci_maxim_core.o maxim_contaminant.o
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@ -0,0 +1,387 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2022 Google, Inc
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*
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* USB-C module to reduce wakeups due to contaminants.
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*/
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#include <linux/device.h>
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#include <linux/irqreturn.h>
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#include <linux/module.h>
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#include <linux/regmap.h>
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#include <linux/usb/tcpci.h>
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#include <linux/usb/tcpm.h>
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#include <linux/usb/typec.h>
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#include "tcpci_maxim.h"
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enum fladc_select {
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CC1_SCALE1 = 1,
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CC1_SCALE2,
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CC2_SCALE1,
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CC2_SCALE2,
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SBU1,
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SBU2,
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};
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#define FLADC_1uA_LSB_MV 25
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/* High range CC */
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#define FLADC_CC_HIGH_RANGE_LSB_MV 208
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/* Low range CC */
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#define FLADC_CC_LOW_RANGE_LSB_MV 126
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/* 1uA current source */
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#define FLADC_CC_SCALE1 1
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/* 5 uA current source */
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#define FLADC_CC_SCALE2 5
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#define FLADC_1uA_CC_OFFSET_MV 300
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#define FLADC_CC_HIGH_RANGE_OFFSET_MV 624
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#define FLADC_CC_LOW_RANGE_OFFSET_MV 378
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#define CONTAMINANT_THRESHOLD_SBU_K 1000
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#define CONTAMINANT_THRESHOLD_CC_K 1000
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#define READ1_SLEEP_MS 10
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#define READ2_SLEEP_MS 5
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#define STATUS_CHECK(reg, mask, val) (((reg) & (mask)) == (val))
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#define IS_CC_OPEN(cc_status) \
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(STATUS_CHECK((cc_status), TCPC_CC_STATUS_CC1_MASK << TCPC_CC_STATUS_CC1_SHIFT, \
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TCPC_CC_STATE_SRC_OPEN) && STATUS_CHECK((cc_status), \
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TCPC_CC_STATUS_CC2_MASK << \
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TCPC_CC_STATUS_CC2_SHIFT, \
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TCPC_CC_STATE_SRC_OPEN))
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static int max_contaminant_adc_to_mv(struct max_tcpci_chip *chip, enum fladc_select channel,
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bool ua_src, u8 fladc)
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{
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/* SBU channels only have 1 scale with 1uA. */
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if ((ua_src && (channel == CC1_SCALE2 || channel == CC2_SCALE2 || channel == SBU1 ||
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channel == SBU2)))
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/* Mean of range */
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return FLADC_1uA_CC_OFFSET_MV + (fladc * FLADC_1uA_LSB_MV);
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else if (!ua_src && (channel == CC1_SCALE1 || channel == CC2_SCALE1))
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return FLADC_CC_HIGH_RANGE_OFFSET_MV + (fladc * FLADC_CC_HIGH_RANGE_LSB_MV);
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else if (!ua_src && (channel == CC1_SCALE2 || channel == CC2_SCALE2))
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return FLADC_CC_LOW_RANGE_OFFSET_MV + (fladc * FLADC_CC_LOW_RANGE_LSB_MV);
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dev_err_once(chip->dev, "ADC ERROR: SCALE UNKNOWN");
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return -EINVAL;
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}
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static int max_contaminant_read_adc_mv(struct max_tcpci_chip *chip, enum fladc_select channel,
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int sleep_msec, bool raw, bool ua_src)
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{
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struct regmap *regmap = chip->data.regmap;
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u8 fladc;
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int ret;
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/* Channel & scale select */
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ret = regmap_update_bits(regmap, TCPC_VENDOR_ADC_CTRL1, ADCINSEL_MASK,
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channel << ADC_CHANNEL_OFFSET);
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if (ret < 0)
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return ret;
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/* Enable ADC */
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ret = regmap_update_bits(regmap, TCPC_VENDOR_ADC_CTRL1, ADCEN, ADCEN);
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if (ret < 0)
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return ret;
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usleep_range(sleep_msec * 1000, (sleep_msec + 1) * 1000);
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ret = max_tcpci_read8(chip, TCPC_VENDOR_FLADC_STATUS, &fladc);
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if (ret < 0)
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return ret;
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/* Disable ADC */
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ret = regmap_update_bits(regmap, TCPC_VENDOR_ADC_CTRL1, ADCEN, 0);
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if (ret < 0)
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return ret;
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ret = regmap_update_bits(regmap, TCPC_VENDOR_ADC_CTRL1, ADCINSEL_MASK, 0);
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if (ret < 0)
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return ret;
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if (!raw)
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return max_contaminant_adc_to_mv(chip, channel, ua_src, fladc);
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else
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return fladc;
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}
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static int max_contaminant_read_resistance_kohm(struct max_tcpci_chip *chip,
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enum fladc_select channel, int sleep_msec, bool raw)
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{
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struct regmap *regmap = chip->data.regmap;
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int mv;
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int ret;
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if (channel == CC1_SCALE1 || channel == CC2_SCALE1 || channel == CC1_SCALE2 ||
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channel == CC2_SCALE2) {
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/* Enable 1uA current source */
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ret = regmap_update_bits(regmap, TCPC_VENDOR_CC_CTRL2, CCLPMODESEL_MASK,
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ULTRA_LOW_POWER_MODE);
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if (ret < 0)
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return ret;
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/* Enable 1uA current source */
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ret = regmap_update_bits(regmap, TCPC_VENDOR_CC_CTRL2, CCRPCTRL_MASK, UA_1_SRC);
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if (ret < 0)
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return ret;
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/* OVP disable */
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ret = regmap_update_bits(regmap, TCPC_VENDOR_CC_CTRL2, CCOVPDIS, CCOVPDIS);
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if (ret < 0)
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return ret;
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mv = max_contaminant_read_adc_mv(chip, channel, sleep_msec, raw, true);
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if (mv < 0)
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return ret;
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/* OVP enable */
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ret = regmap_update_bits(regmap, TCPC_VENDOR_CC_CTRL2, CCOVPDIS, 0);
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if (ret < 0)
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return ret;
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/* returns KOhm as 1uA source is used. */
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return mv;
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}
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ret = regmap_update_bits(regmap, TCPC_VENDOR_CC_CTRL2, SBUOVPDIS, SBUOVPDIS);
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if (ret < 0)
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return ret;
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/* SBU switches auto configure when channel is selected. */
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/* Enable 1ua current source */
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ret = regmap_update_bits(regmap, TCPC_VENDOR_CC_CTRL2, SBURPCTRL, SBURPCTRL);
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if (ret < 0)
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return ret;
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mv = max_contaminant_read_adc_mv(chip, channel, sleep_msec, raw, true);
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if (mv < 0)
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return ret;
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/* Disable current source */
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ret = regmap_update_bits(regmap, TCPC_VENDOR_CC_CTRL2, SBURPCTRL, 0);
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if (ret < 0)
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return ret;
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/* OVP disable */
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ret = regmap_update_bits(regmap, TCPC_VENDOR_CC_CTRL2, SBUOVPDIS, 0);
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if (ret < 0)
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return ret;
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return mv;
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}
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static int max_contaminant_read_comparators(struct max_tcpci_chip *chip, u8 *vendor_cc_status2_cc1,
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u8 *vendor_cc_status2_cc2)
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{
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struct regmap *regmap = chip->data.regmap;
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int ret;
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/* Enable 80uA source */
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ret = regmap_update_bits(regmap, TCPC_VENDOR_CC_CTRL2, CCRPCTRL_MASK, UA_80_SRC);
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if (ret < 0)
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return ret;
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/* Enable comparators */
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ret = regmap_update_bits(regmap, TCPC_VENDOR_CC_CTRL1, CCCOMPEN, CCCOMPEN);
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if (ret < 0)
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return ret;
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/* Sleep to allow comparators settle */
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usleep_range(5000, 6000);
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ret = regmap_update_bits(regmap, TCPC_TCPC_CTRL, TCPC_TCPC_CTRL_ORIENTATION, PLUG_ORNT_CC1);
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if (ret < 0)
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return ret;
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usleep_range(5000, 6000);
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ret = max_tcpci_read8(chip, VENDOR_CC_STATUS2, vendor_cc_status2_cc1);
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if (ret < 0)
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return ret;
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ret = regmap_update_bits(regmap, TCPC_TCPC_CTRL, TCPC_TCPC_CTRL_ORIENTATION, PLUG_ORNT_CC2);
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if (ret < 0)
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return ret;
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usleep_range(5000, 6000);
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ret = max_tcpci_read8(chip, VENDOR_CC_STATUS2, vendor_cc_status2_cc2);
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if (ret < 0)
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return ret;
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ret = regmap_update_bits(regmap, TCPC_VENDOR_CC_CTRL1, CCCOMPEN, 0);
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if (ret < 0)
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return ret;
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ret = regmap_update_bits(regmap, TCPC_VENDOR_CC_CTRL2, CCRPCTRL_MASK, 0);
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if (ret < 0)
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return ret;
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return 0;
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}
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static int max_contaminant_detect_contaminant(struct max_tcpci_chip *chip)
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{
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int cc1_k, cc2_k, sbu1_k, sbu2_k, ret;
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u8 vendor_cc_status2_cc1 = 0xff, vendor_cc_status2_cc2 = 0xff;
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u8 role_ctrl = 0, role_ctrl_backup = 0;
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int inferred_state = NOT_DETECTED;
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ret = max_tcpci_read8(chip, TCPC_ROLE_CTRL, &role_ctrl);
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if (ret < 0)
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return NOT_DETECTED;
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role_ctrl_backup = role_ctrl;
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role_ctrl = 0x0F;
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ret = max_tcpci_write8(chip, TCPC_ROLE_CTRL, role_ctrl);
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if (ret < 0)
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return NOT_DETECTED;
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cc1_k = max_contaminant_read_resistance_kohm(chip, CC1_SCALE2, READ1_SLEEP_MS, false);
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if (cc1_k < 0)
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goto exit;
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cc2_k = max_contaminant_read_resistance_kohm(chip, CC2_SCALE2, READ2_SLEEP_MS, false);
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if (cc2_k < 0)
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goto exit;
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sbu1_k = max_contaminant_read_resistance_kohm(chip, SBU1, READ1_SLEEP_MS, false);
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if (sbu1_k < 0)
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goto exit;
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sbu2_k = max_contaminant_read_resistance_kohm(chip, SBU2, READ2_SLEEP_MS, false);
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if (sbu2_k < 0)
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goto exit;
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ret = max_contaminant_read_comparators(chip, &vendor_cc_status2_cc1,
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&vendor_cc_status2_cc2);
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if (ret < 0)
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goto exit;
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if ((!(CC1_VUFP_RD0P5 & vendor_cc_status2_cc1) ||
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!(CC2_VUFP_RD0P5 & vendor_cc_status2_cc2)) &&
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!(CC1_VUFP_RD0P5 & vendor_cc_status2_cc1 && CC2_VUFP_RD0P5 & vendor_cc_status2_cc2))
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inferred_state = SINK;
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else if ((cc1_k < CONTAMINANT_THRESHOLD_CC_K || cc2_k < CONTAMINANT_THRESHOLD_CC_K) &&
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(sbu1_k < CONTAMINANT_THRESHOLD_SBU_K || sbu2_k < CONTAMINANT_THRESHOLD_SBU_K))
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inferred_state = DETECTED;
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if (inferred_state == NOT_DETECTED)
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max_tcpci_write8(chip, TCPC_ROLE_CTRL, role_ctrl_backup);
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else
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max_tcpci_write8(chip, TCPC_ROLE_CTRL, (TCPC_ROLE_CTRL_DRP | 0xA));
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return inferred_state;
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exit:
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max_tcpci_write8(chip, TCPC_ROLE_CTRL, role_ctrl_backup);
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return NOT_DETECTED;
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}
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static int max_contaminant_enable_dry_detection(struct max_tcpci_chip *chip)
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{
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struct regmap *regmap = chip->data.regmap;
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u8 temp;
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int ret;
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ret = regmap_update_bits(regmap, TCPC_VENDOR_CC_CTRL3, CCWTRDEB_MASK | CCWTRSEL_MASK
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| WTRCYCLE_MASK, CCWTRDEB_1MS << CCWTRDEB_SHIFT |
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CCWTRSEL_1V << CCWTRSEL_SHIFT | WTRCYCLE_4_8_S <<
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WTRCYCLE_SHIFT);
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if (ret < 0)
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return ret;
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ret = regmap_update_bits(regmap, TCPC_ROLE_CTRL, TCPC_ROLE_CTRL_DRP, TCPC_ROLE_CTRL_DRP);
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if (ret < 0)
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return ret;
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ret = regmap_update_bits(regmap, TCPC_VENDOR_CC_CTRL1, CCCONNDRY, CCCONNDRY);
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if (ret < 0)
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return ret;
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ret = max_tcpci_read8(chip, TCPC_VENDOR_CC_CTRL1, &temp);
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if (ret < 0)
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return ret;
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ret = regmap_update_bits(regmap, TCPC_VENDOR_CC_CTRL2, CCLPMODESEL_MASK,
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ULTRA_LOW_POWER_MODE);
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if (ret < 0)
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return ret;
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ret = max_tcpci_read8(chip, TCPC_VENDOR_CC_CTRL2, &temp);
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if (ret < 0)
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return ret;
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/* Enable Look4Connection before sending the command */
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ret = regmap_update_bits(regmap, TCPC_TCPC_CTRL, TCPC_TCPC_CTRL_EN_LK4CONN_ALRT,
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TCPC_TCPC_CTRL_EN_LK4CONN_ALRT);
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if (ret < 0)
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return ret;
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ret = max_tcpci_write8(chip, TCPC_COMMAND, TCPC_CMD_LOOK4CONNECTION);
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if (ret < 0)
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return ret;
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return 0;
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}
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bool max_contaminant_is_contaminant(struct max_tcpci_chip *chip, bool disconnect_while_debounce)
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{
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u8 cc_status, pwr_cntl;
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int ret;
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ret = max_tcpci_read8(chip, TCPC_CC_STATUS, &cc_status);
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if (ret < 0)
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return false;
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ret = max_tcpci_read8(chip, TCPC_POWER_CTRL, &pwr_cntl);
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if (ret < 0)
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return false;
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if (chip->contaminant_state == NOT_DETECTED || chip->contaminant_state == SINK) {
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if (!disconnect_while_debounce)
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msleep(100);
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ret = max_tcpci_read8(chip, TCPC_CC_STATUS, &cc_status);
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if (ret < 0)
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return false;
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if (IS_CC_OPEN(cc_status)) {
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u8 role_ctrl, role_ctrl_backup;
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ret = max_tcpci_read8(chip, TCPC_ROLE_CTRL, &role_ctrl);
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if (ret < 0)
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return false;
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role_ctrl_backup = role_ctrl;
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role_ctrl |= 0x0F;
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role_ctrl &= ~(TCPC_ROLE_CTRL_DRP);
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ret = max_tcpci_write8(chip, TCPC_ROLE_CTRL, role_ctrl);
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if (ret < 0)
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return false;
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chip->contaminant_state = max_contaminant_detect_contaminant(chip);
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ret = max_tcpci_write8(chip, TCPC_ROLE_CTRL, role_ctrl_backup);
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if (ret < 0)
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return false;
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if (chip->contaminant_state == DETECTED) {
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max_contaminant_enable_dry_detection(chip);
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return true;
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}
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}
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return false;
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} else if (chip->contaminant_state == DETECTED) {
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if (STATUS_CHECK(cc_status, TCPC_CC_STATUS_TOGGLING, 0)) {
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chip->contaminant_state = max_contaminant_detect_contaminant(chip);
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if (chip->contaminant_state == DETECTED) {
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max_contaminant_enable_dry_detection(chip);
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return true;
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}
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}
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}
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return false;
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}
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MODULE_DESCRIPTION("MAXIM TCPC CONTAMINANT Module");
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MODULE_AUTHOR("Badhri Jagan Sridharan <badhri@google.com>");
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MODULE_LICENSE("GPL");
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@ -0,0 +1,89 @@
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2022 Google, Inc
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*
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* MAXIM TCPC header file.
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*/
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#ifndef TCPCI_MAXIM_H_
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#define TCPCI_MAXIM_H_
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#define VENDOR_CC_STATUS2 0x85
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#define CC1_VUFP_RD0P5 BIT(1)
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#define CC2_VUFP_RD0P5 BIT(5)
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#define TCPC_VENDOR_FLADC_STATUS 0x89
|
||||
|
||||
#define TCPC_VENDOR_CC_CTRL1 0x8c
|
||||
#define CCCONNDRY BIT(7)
|
||||
#define CCCOMPEN BIT(5)
|
||||
|
||||
#define TCPC_VENDOR_CC_CTRL2 0x8d
|
||||
#define SBUOVPDIS BIT(7)
|
||||
#define CCOVPDIS BIT(6)
|
||||
#define SBURPCTRL BIT(5)
|
||||
#define CCLPMODESEL_MASK GENMASK(4, 3)
|
||||
#define ULTRA_LOW_POWER_MODE BIT(3)
|
||||
#define CCRPCTRL_MASK GENMASK(2, 0)
|
||||
#define UA_1_SRC 1
|
||||
#define UA_80_SRC 3
|
||||
|
||||
#define TCPC_VENDOR_CC_CTRL3 0x8e
|
||||
#define CCWTRDEB_MASK GENMASK(7, 6)
|
||||
#define CCWTRDEB_SHIFT 6
|
||||
#define CCWTRDEB_1MS 1
|
||||
#define CCWTRSEL_MASK GENMASK(5, 3)
|
||||
#define CCWTRSEL_SHIFT 3
|
||||
#define CCWTRSEL_1V 0x4
|
||||
#define CCLADDERDIS BIT(2)
|
||||
#define WTRCYCLE_MASK BIT(0)
|
||||
#define WTRCYCLE_SHIFT 0
|
||||
#define WTRCYCLE_2_4_S 0
|
||||
#define WTRCYCLE_4_8_S 1
|
||||
|
||||
#define TCPC_VENDOR_ADC_CTRL1 0x91
|
||||
#define ADCINSEL_MASK GENMASK(7, 5)
|
||||
#define ADC_CHANNEL_OFFSET 5
|
||||
#define ADCEN BIT(0)
|
||||
|
||||
enum contamiant_state {
|
||||
NOT_DETECTED,
|
||||
DETECTED,
|
||||
SINK,
|
||||
};
|
||||
|
||||
/*
|
||||
* @potential_contaminant:
|
||||
* Last returned result to tcpm indicating whether the TCPM port
|
||||
* has potential contaminant.
|
||||
*/
|
||||
struct max_tcpci_chip {
|
||||
struct tcpci_data data;
|
||||
struct tcpci *tcpci;
|
||||
struct device *dev;
|
||||
struct i2c_client *client;
|
||||
struct tcpm_port *port;
|
||||
enum contamiant_state contaminant_state;
|
||||
};
|
||||
|
||||
static inline int max_tcpci_read16(struct max_tcpci_chip *chip, unsigned int reg, u16 *val)
|
||||
{
|
||||
return regmap_raw_read(chip->data.regmap, reg, val, sizeof(u16));
|
||||
}
|
||||
|
||||
static inline int max_tcpci_write16(struct max_tcpci_chip *chip, unsigned int reg, u16 val)
|
||||
{
|
||||
return regmap_raw_write(chip->data.regmap, reg, &val, sizeof(u16));
|
||||
}
|
||||
|
||||
static inline int max_tcpci_read8(struct max_tcpci_chip *chip, unsigned int reg, u8 *val)
|
||||
{
|
||||
return regmap_raw_read(chip->data.regmap, reg, val, sizeof(u8));
|
||||
}
|
||||
|
||||
static inline int max_tcpci_write8(struct max_tcpci_chip *chip, unsigned int reg, u8 val)
|
||||
{
|
||||
return regmap_raw_write(chip->data.regmap, reg, &val, sizeof(u8));
|
||||
}
|
||||
|
||||
bool max_contaminant_is_contaminant(struct max_tcpci_chip *chip, bool disconnect_while_debounce);
|
||||
|
||||
#endif // TCPCI_MAXIM_H_
|
||||
|
|
@ -1,6 +1,6 @@
|
|||
// SPDX-License-Identifier: GPL-2.0
|
||||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2020, Google LLC
|
||||
* Copyright (C) 2020 - 2022, Google LLC
|
||||
*
|
||||
* MAXIM TCPCI based TCPC driver
|
||||
*/
|
||||
|
|
@ -15,6 +15,8 @@
|
|||
#include <linux/usb/tcpm.h>
|
||||
#include <linux/usb/typec.h>
|
||||
|
||||
#include "tcpci_maxim.h"
|
||||
|
||||
#define PD_ACTIVITY_TIMEOUT_MS 10000
|
||||
|
||||
#define TCPC_VENDOR_ALERT 0x80
|
||||
|
|
@ -39,14 +41,6 @@
|
|||
#define MAX_BUCK_BOOST_SOURCE 0xa
|
||||
#define MAX_BUCK_BOOST_SINK 0x5
|
||||
|
||||
struct max_tcpci_chip {
|
||||
struct tcpci_data data;
|
||||
struct tcpci *tcpci;
|
||||
struct device *dev;
|
||||
struct i2c_client *client;
|
||||
struct tcpm_port *port;
|
||||
};
|
||||
|
||||
static const struct regmap_range max_tcpci_tcpci_range[] = {
|
||||
regmap_reg_range(0x00, 0x95)
|
||||
};
|
||||
|
|
@ -68,26 +62,6 @@ static struct max_tcpci_chip *tdata_to_max_tcpci(struct tcpci_data *tdata)
|
|||
return container_of(tdata, struct max_tcpci_chip, data);
|
||||
}
|
||||
|
||||
static int max_tcpci_read16(struct max_tcpci_chip *chip, unsigned int reg, u16 *val)
|
||||
{
|
||||
return regmap_raw_read(chip->data.regmap, reg, val, sizeof(u16));
|
||||
}
|
||||
|
||||
static int max_tcpci_write16(struct max_tcpci_chip *chip, unsigned int reg, u16 val)
|
||||
{
|
||||
return regmap_raw_write(chip->data.regmap, reg, &val, sizeof(u16));
|
||||
}
|
||||
|
||||
static int max_tcpci_read8(struct max_tcpci_chip *chip, unsigned int reg, u8 *val)
|
||||
{
|
||||
return regmap_raw_read(chip->data.regmap, reg, val, sizeof(u8));
|
||||
}
|
||||
|
||||
static int max_tcpci_write8(struct max_tcpci_chip *chip, unsigned int reg, u8 val)
|
||||
{
|
||||
return regmap_raw_write(chip->data.regmap, reg, &val, sizeof(u8));
|
||||
}
|
||||
|
||||
static void max_tcpci_init_regs(struct max_tcpci_chip *chip)
|
||||
{
|
||||
u16 alert_mask = 0;
|
||||
|
|
@ -348,8 +322,14 @@ static irqreturn_t _max_tcpci_irq(struct max_tcpci_chip *chip, u16 status)
|
|||
if (status & TCPC_ALERT_VBUS_DISCNCT)
|
||||
tcpm_vbus_change(chip->port);
|
||||
|
||||
if (status & TCPC_ALERT_CC_STATUS)
|
||||
tcpm_cc_change(chip->port);
|
||||
if (status & TCPC_ALERT_CC_STATUS) {
|
||||
if (chip->contaminant_state == DETECTED || tcpm_port_is_toggling(chip->port)) {
|
||||
if (!max_contaminant_is_contaminant(chip, false))
|
||||
tcpm_port_clean(chip->port);
|
||||
} else {
|
||||
tcpm_cc_change(chip->port);
|
||||
}
|
||||
}
|
||||
|
||||
if (status & TCPC_ALERT_POWER_STATUS)
|
||||
process_power_status(chip);
|
||||
|
|
@ -438,6 +418,14 @@ static int tcpci_init(struct tcpci *tcpci, struct tcpci_data *data)
|
|||
return -1;
|
||||
}
|
||||
|
||||
static void max_tcpci_check_contaminant(struct tcpci *tcpci, struct tcpci_data *tdata)
|
||||
{
|
||||
struct max_tcpci_chip *chip = tdata_to_max_tcpci(tdata);
|
||||
|
||||
if (!max_contaminant_is_contaminant(chip, true))
|
||||
tcpm_port_clean(chip->port);
|
||||
}
|
||||
|
||||
static int max_tcpci_probe(struct i2c_client *client)
|
||||
{
|
||||
int ret;
|
||||
|
|
@ -471,6 +459,7 @@ static int max_tcpci_probe(struct i2c_client *client)
|
|||
chip->data.auto_discharge_disconnect = true;
|
||||
chip->data.vbus_vsafe0v = true;
|
||||
chip->data.set_partner_usb_comm_capable = max_tcpci_set_partner_usb_comm_capable;
|
||||
chip->data.check_contaminant = max_tcpci_check_contaminant;
|
||||
|
||||
max_tcpci_init_regs(chip);
|
||||
chip->tcpci = tcpci_register_port(chip->dev, &chip->data);
|
||||
Loading…
Reference in New Issue