x86/speculation: Rework speculative_store_bypass_update()
The upcoming support for the virtual SPEC_CTRL MSR on AMD needs to reuse speculative_store_bypass_update() to avoid code duplication. Add an argument for supplying a thread info (TIF) value and create a wrapper speculative_store_bypass_update_current() which is used at the existing call site. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Borislav Petkov <bp@suse.de> Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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@ -42,6 +42,11 @@ extern void speculative_store_bypass_ht_init(void);
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static inline void speculative_store_bypass_ht_init(void) { }
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#endif
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extern void speculative_store_bypass_update(void);
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extern void speculative_store_bypass_update(unsigned long tif);
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static inline void speculative_store_bypass_update_current(void)
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{
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speculative_store_bypass_update(current_thread_info()->flags);
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}
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#endif
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@ -598,7 +598,7 @@ static int ssb_prctl_set(struct task_struct *task, unsigned long ctrl)
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* mitigation until it is next scheduled.
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*/
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if (task == current && update)
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speculative_store_bypass_update();
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speculative_store_bypass_update_current();
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return 0;
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}
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@ -414,10 +414,10 @@ static __always_inline void __speculative_store_bypass_update(unsigned long tifn
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intel_set_ssb_state(tifn);
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}
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void speculative_store_bypass_update(void)
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void speculative_store_bypass_update(unsigned long tif)
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{
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preempt_disable();
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__speculative_store_bypass_update(current_thread_info()->flags);
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__speculative_store_bypass_update(tif);
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preempt_enable();
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}
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