drm/amdkfd: replace trivial funcs with direct access
These get funcs simply return an adev field. Replace funcs/calls with direct field accesses instead. Signed-off-by: Graham Sider <Graham.Sider@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -521,16 +521,6 @@ uint64_t amdgpu_amdkfd_get_vram_usage(struct amdgpu_device *adev)
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return amdgpu_vram_mgr_usage(vram_man);
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}
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uint64_t amdgpu_amdkfd_get_hive_id(struct amdgpu_device *adev)
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{
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return adev->gmc.xgmi.hive_id;
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}
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uint64_t amdgpu_amdkfd_get_unique_id(struct amdgpu_device *adev)
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{
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return adev->unique_id;
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}
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uint8_t amdgpu_amdkfd_get_xgmi_hops_count(struct amdgpu_device *dst,
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struct amdgpu_device *src)
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{
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@ -630,26 +620,6 @@ int amdgpu_amdkfd_get_pcie_bandwidth_mbytes(struct amdgpu_device *adev, bool is_
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return (num_lanes_factor * gen_speed_mbits_factor)/BITS_PER_BYTE;
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}
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uint64_t amdgpu_amdkfd_get_mmio_remap_phys_addr(struct amdgpu_device *adev)
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{
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return adev->rmmio_remap.bus_addr;
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}
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uint32_t amdgpu_amdkfd_get_num_gws(struct amdgpu_device *adev)
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{
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return adev->gds.gws_size;
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}
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uint32_t amdgpu_amdkfd_get_asic_rev_id(struct amdgpu_device *adev)
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{
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return adev->rev_id;
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}
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int amdgpu_amdkfd_get_noretry(struct amdgpu_device *adev)
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{
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return adev->gmc.noretry;
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}
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int amdgpu_amdkfd_submit_ib(struct amdgpu_device *adev,
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enum kgd_engine_type engine,
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uint32_t vmid, uint64_t gpu_addr,
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@ -224,12 +224,6 @@ int amdgpu_amdkfd_get_dmabuf_info(struct amdgpu_device *adev, int dma_buf_fd,
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size_t buffer_size, uint32_t *metadata_size,
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uint32_t *flags);
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uint64_t amdgpu_amdkfd_get_vram_usage(struct amdgpu_device *adev);
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uint64_t amdgpu_amdkfd_get_hive_id(struct amdgpu_device *adev);
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uint64_t amdgpu_amdkfd_get_unique_id(struct amdgpu_device *adev);
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uint64_t amdgpu_amdkfd_get_mmio_remap_phys_addr(struct amdgpu_device *adev);
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uint32_t amdgpu_amdkfd_get_num_gws(struct amdgpu_device *adev);
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uint32_t amdgpu_amdkfd_get_asic_rev_id(struct amdgpu_device *adev);
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int amdgpu_amdkfd_get_noretry(struct amdgpu_device *adev);
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uint8_t amdgpu_amdkfd_get_xgmi_hops_count(struct amdgpu_device *dst,
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struct amdgpu_device *src);
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int amdgpu_amdkfd_get_xgmi_bandwidth_mbytes(struct amdgpu_device *dst,
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@ -1313,7 +1313,7 @@ static int kfd_ioctl_alloc_memory_of_gpu(struct file *filep,
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err = -EINVAL;
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goto err_unlock;
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}
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offset = amdgpu_amdkfd_get_mmio_remap_phys_addr(dev->adev);
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offset = dev->adev->rmmio_remap.bus_addr;
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if (!offset) {
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err = -ENOMEM;
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goto err_unlock;
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@ -2066,7 +2066,7 @@ static int kfd_mmio_mmap(struct kfd_dev *dev, struct kfd_process *process,
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if (vma->vm_end - vma->vm_start != PAGE_SIZE)
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return -EINVAL;
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address = amdgpu_amdkfd_get_mmio_remap_phys_addr(dev->adev);
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address = dev->adev->rmmio_remap.bus_addr;
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vma->vm_flags |= VM_IO | VM_DONTCOPY | VM_DONTEXPAND | VM_NORESERVE |
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VM_DONTDUMP | VM_PFNMAP;
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@ -892,7 +892,7 @@ static int kfd_gws_init(struct kfd_dev *kfd)
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|| (kfd->device_info->asic_family == CHIP_ALDEBARAN
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&& kfd->mec2_fw_version >= 0x28))
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ret = amdgpu_amdkfd_alloc_gws(kfd->adev,
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amdgpu_amdkfd_get_num_gws(kfd->adev), &kfd->gws);
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kfd->adev->gds.gws_size, &kfd->gws);
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return ret;
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}
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@ -994,9 +994,9 @@ bool kgd2kfd_device_init(struct kfd_dev *kfd,
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goto kfd_doorbell_error;
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}
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kfd->hive_id = amdgpu_amdkfd_get_hive_id(kfd->adev);
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kfd->hive_id = kfd->adev->gmc.xgmi.hive_id;
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kfd->noretry = amdgpu_amdkfd_get_noretry(kfd->adev);
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kfd->noretry = kfd->adev->gmc.noretry;
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if (kfd_interrupt_init(kfd)) {
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dev_err(kfd_device, "Error initializing interrupts\n");
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@ -1014,7 +1014,7 @@ bool kgd2kfd_device_init(struct kfd_dev *kfd,
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*/
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if (kfd_gws_init(kfd)) {
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dev_err(kfd_device, "Could not allocate %d gws\n",
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amdgpu_amdkfd_get_num_gws(kfd->adev));
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kfd->adev->gds.gws_size);
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goto gws_error;
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}
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@ -118,7 +118,7 @@ int pqm_set_gws(struct process_queue_manager *pqm, unsigned int qid,
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return ret;
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pqn->q->gws = mem;
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pdd->qpd.num_gws = gws ? amdgpu_amdkfd_get_num_gws(dev->adev) : 0;
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pdd->qpd.num_gws = gws ? dev->adev->gds.gws_size : 0;
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return pqn->q->device->dqm->ops.update_queue(pqn->q->device->dqm,
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pqn->q, NULL);
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@ -531,7 +531,7 @@ static ssize_t node_show(struct kobject *kobj, struct attribute *attr,
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sysfs_show_32bit_prop(buffer, offs, "sdma_fw_version",
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dev->gpu->sdma_fw_version);
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sysfs_show_64bit_prop(buffer, offs, "unique_id",
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amdgpu_amdkfd_get_unique_id(dev->gpu->adev));
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dev->gpu->adev->unique_id);
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}
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@ -1381,8 +1381,7 @@ int kfd_topology_add_device(struct kfd_dev *gpu)
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dev->node_props.vendor_id = gpu->pdev->vendor;
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dev->node_props.device_id = gpu->pdev->device;
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dev->node_props.capability |=
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((amdgpu_amdkfd_get_asic_rev_id(dev->gpu->adev) <<
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HSA_CAP_ASIC_REVISION_SHIFT) &
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((dev->gpu->adev->rev_id << HSA_CAP_ASIC_REVISION_SHIFT) &
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HSA_CAP_ASIC_REVISION_MASK);
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dev->node_props.location_id = pci_dev_id(gpu->pdev);
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dev->node_props.domain = pci_domain_nr(gpu->pdev->bus);
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@ -1401,7 +1400,7 @@ int kfd_topology_add_device(struct kfd_dev *gpu)
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gpu->device_info->num_sdma_queues_per_engine;
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dev->node_props.num_gws = (dev->gpu->gws &&
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dev->gpu->dqm->sched_policy != KFD_SCHED_POLICY_NO_HWS) ?
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amdgpu_amdkfd_get_num_gws(dev->gpu->adev) : 0;
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dev->gpu->adev->gds.gws_size : 0;
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dev->node_props.num_cp_queues = get_cp_queues_num(dev->gpu->dqm);
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kfd_fill_mem_clk_max_info(dev);
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