iommu/amd: Add support for IOMMU default DMA mode build options
Make IOMMU_DEFAULT_LAZY default for when AMD_IOMMU config is set, which matches current behaviour. For "fullflush" param, just call iommu_set_dma_strict(true) directly. Since we get a strict vs lazy mode print already in iommu_subsys_init(), and maintain a deprecation print when "fullflush" param is passed, drop the prints in amd_iommu_init_dma_ops(). Finally drop global flag amd_iommu_unmap_flush, as it has no longer has any purpose. [jpg: Rebase for relocated file and drop amd_iommu_unmap_flush] Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> Signed-off-by: John Garry <john.garry@huawei.com> Link: https://lore.kernel.org/r/1626088340-5838-6-git-send-email-john.garry@huawei.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
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@ -94,7 +94,7 @@ choice
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prompt "IOMMU default DMA IOTLB invalidation mode"
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prompt "IOMMU default DMA IOTLB invalidation mode"
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depends on IOMMU_DMA
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depends on IOMMU_DMA
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default IOMMU_DEFAULT_LAZY if INTEL_IOMMU
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default IOMMU_DEFAULT_LAZY if (AMD_IOMMU || INTEL_IOMMU)
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default IOMMU_DEFAULT_STRICT
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default IOMMU_DEFAULT_STRICT
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help
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help
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This option allows an IOMMU DMA IOTLB invalidation mode to be
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This option allows an IOMMU DMA IOTLB invalidation mode to be
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@ -779,12 +779,6 @@ extern u16 amd_iommu_last_bdf;
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/* allocation bitmap for domain ids */
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/* allocation bitmap for domain ids */
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extern unsigned long *amd_iommu_pd_alloc_bitmap;
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extern unsigned long *amd_iommu_pd_alloc_bitmap;
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/*
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* If true, the addresses will be flushed on unmap time, not when
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* they are reused
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*/
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extern bool amd_iommu_unmap_flush;
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/* Smallest max PASID supported by any IOMMU in the system */
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/* Smallest max PASID supported by any IOMMU in the system */
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extern u32 amd_iommu_max_pasid;
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extern u32 amd_iommu_max_pasid;
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@ -161,7 +161,6 @@ u16 amd_iommu_last_bdf; /* largest PCI device id we have
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to handle */
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to handle */
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LIST_HEAD(amd_iommu_unity_map); /* a list of required unity mappings
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LIST_HEAD(amd_iommu_unity_map); /* a list of required unity mappings
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we find in ACPI */
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we find in ACPI */
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bool amd_iommu_unmap_flush; /* if true, flush on every unmap */
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LIST_HEAD(amd_iommu_list); /* list of all AMD IOMMUs in the
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LIST_HEAD(amd_iommu_list); /* list of all AMD IOMMUs in the
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system */
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system */
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@ -3100,7 +3099,7 @@ static int __init parse_amd_iommu_options(char *str)
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for (; *str; ++str) {
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for (; *str; ++str) {
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if (strncmp(str, "fullflush", 9) == 0) {
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if (strncmp(str, "fullflush", 9) == 0) {
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pr_warn("amd_iommu=fullflush deprecated; use iommu.strict=1 instead\n");
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pr_warn("amd_iommu=fullflush deprecated; use iommu.strict=1 instead\n");
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amd_iommu_unmap_flush = true;
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iommu_set_dma_strict(true);
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}
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}
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if (strncmp(str, "force_enable", 12) == 0)
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if (strncmp(str, "force_enable", 12) == 0)
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amd_iommu_force_enable = true;
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amd_iommu_force_enable = true;
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@ -1775,12 +1775,6 @@ void amd_iommu_domain_update(struct protection_domain *domain)
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static void __init amd_iommu_init_dma_ops(void)
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static void __init amd_iommu_init_dma_ops(void)
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{
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{
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swiotlb = (iommu_default_passthrough() || sme_me_mask) ? 1 : 0;
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swiotlb = (iommu_default_passthrough() || sme_me_mask) ? 1 : 0;
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if (amd_iommu_unmap_flush)
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pr_info("IO/TLB flush on unmap enabled\n");
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else
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pr_info("Lazy IO/TLB flushing enabled\n");
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iommu_set_dma_strict(amd_iommu_unmap_flush);
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}
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}
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int __init amd_iommu_init_api(void)
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int __init amd_iommu_init_api(void)
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