can: flexcan: allow to change quirks at runtime
This is a preparation patch for the upcoming support to change the rx-rtr capability via the ethtool API. Link: https://lore.kernel.org/all/20220107193105.1699523-3-mkl@pengutronix.de Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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@ -369,7 +369,7 @@ struct flexcan_priv {
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struct clk *clk_ipg;
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struct clk *clk_per;
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const struct flexcan_devtype_data *devtype_data;
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struct flexcan_devtype_data devtype_data;
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struct regulator *reg_xceiver;
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struct flexcan_stop_mode stm;
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@ -600,7 +600,7 @@ static inline int flexcan_enter_stop_mode(struct flexcan_priv *priv)
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priv->write(reg_mcr, ®s->mcr);
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/* enable stop request */
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if (priv->devtype_data->quirks & FLEXCAN_QUIRK_SETUP_STOP_MODE_SCFW) {
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if (priv->devtype_data.quirks & FLEXCAN_QUIRK_SETUP_STOP_MODE_SCFW) {
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ret = flexcan_stop_mode_enable_scfw(priv, true);
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if (ret < 0)
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return ret;
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@ -619,7 +619,7 @@ static inline int flexcan_exit_stop_mode(struct flexcan_priv *priv)
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int ret;
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/* remove stop request */
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if (priv->devtype_data->quirks & FLEXCAN_QUIRK_SETUP_STOP_MODE_SCFW) {
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if (priv->devtype_data.quirks & FLEXCAN_QUIRK_SETUP_STOP_MODE_SCFW) {
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ret = flexcan_stop_mode_enable_scfw(priv, false);
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if (ret < 0)
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return ret;
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@ -1022,7 +1022,7 @@ static struct sk_buff *flexcan_mailbox_read(struct can_rx_offload *offload,
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mb = flexcan_get_mb(priv, n);
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if (priv->devtype_data->quirks & FLEXCAN_QUIRK_USE_OFF_TIMESTAMP) {
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if (priv->devtype_data.quirks & FLEXCAN_QUIRK_USE_OFF_TIMESTAMP) {
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u32 code;
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do {
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@ -1087,7 +1087,7 @@ static struct sk_buff *flexcan_mailbox_read(struct can_rx_offload *offload,
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}
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mark_as_read:
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if (priv->devtype_data->quirks & FLEXCAN_QUIRK_USE_OFF_TIMESTAMP)
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if (priv->devtype_data.quirks & FLEXCAN_QUIRK_USE_OFF_TIMESTAMP)
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flexcan_write64(priv, FLEXCAN_IFLAG_MB(n), ®s->iflag1);
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else
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priv->write(FLEXCAN_IFLAG_RX_FIFO_AVAILABLE, ®s->iflag1);
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@ -1113,7 +1113,7 @@ static irqreturn_t flexcan_irq(int irq, void *dev_id)
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enum can_state last_state = priv->can.state;
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/* reception interrupt */
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if (priv->devtype_data->quirks & FLEXCAN_QUIRK_USE_OFF_TIMESTAMP) {
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if (priv->devtype_data.quirks & FLEXCAN_QUIRK_USE_OFF_TIMESTAMP) {
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u64 reg_iflag_rx;
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int ret;
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@ -1173,7 +1173,7 @@ static irqreturn_t flexcan_irq(int irq, void *dev_id)
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/* state change interrupt or broken error state quirk fix is enabled */
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if ((reg_esr & FLEXCAN_ESR_ERR_STATE) ||
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(priv->devtype_data->quirks & (FLEXCAN_QUIRK_BROKEN_WERR_STATE |
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(priv->devtype_data.quirks & (FLEXCAN_QUIRK_BROKEN_WERR_STATE |
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FLEXCAN_QUIRK_BROKEN_PERR_STATE)))
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flexcan_irq_state(dev, reg_esr);
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@ -1195,11 +1195,11 @@ static irqreturn_t flexcan_irq(int irq, void *dev_id)
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* (1): enabled if FLEXCAN_QUIRK_BROKEN_WERR_STATE is enabled
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*/
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if ((last_state != priv->can.state) &&
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(priv->devtype_data->quirks & FLEXCAN_QUIRK_BROKEN_PERR_STATE) &&
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(priv->devtype_data.quirks & FLEXCAN_QUIRK_BROKEN_PERR_STATE) &&
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!(priv->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING)) {
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switch (priv->can.state) {
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case CAN_STATE_ERROR_ACTIVE:
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if (priv->devtype_data->quirks &
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if (priv->devtype_data.quirks &
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FLEXCAN_QUIRK_BROKEN_WERR_STATE)
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flexcan_error_irq_enable(priv);
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else
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@ -1423,13 +1423,13 @@ static int flexcan_rx_offload_setup(struct net_device *dev)
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else
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priv->mb_size = sizeof(struct flexcan_mb) + CAN_MAX_DLEN;
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if (priv->devtype_data->quirks & FLEXCAN_QUIRK_NR_MB_16)
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if (priv->devtype_data.quirks & FLEXCAN_QUIRK_NR_MB_16)
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priv->mb_count = 16;
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else
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priv->mb_count = (sizeof(priv->regs->mb[0]) / priv->mb_size) +
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(sizeof(priv->regs->mb[1]) / priv->mb_size);
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if (priv->devtype_data->quirks & FLEXCAN_QUIRK_USE_OFF_TIMESTAMP)
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if (priv->devtype_data.quirks & FLEXCAN_QUIRK_USE_OFF_TIMESTAMP)
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priv->tx_mb_reserved =
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flexcan_get_mb(priv, FLEXCAN_TX_MB_RESERVED_OFF_TIMESTAMP);
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else
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@ -1441,7 +1441,7 @@ static int flexcan_rx_offload_setup(struct net_device *dev)
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priv->offload.mailbox_read = flexcan_mailbox_read;
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if (priv->devtype_data->quirks & FLEXCAN_QUIRK_USE_OFF_TIMESTAMP) {
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if (priv->devtype_data.quirks & FLEXCAN_QUIRK_USE_OFF_TIMESTAMP) {
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priv->offload.mb_first = FLEXCAN_RX_MB_OFF_TIMESTAMP_FIRST;
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priv->offload.mb_last = priv->mb_count - 2;
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@ -1506,7 +1506,7 @@ static int flexcan_chip_start(struct net_device *dev)
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if (err)
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goto out_chip_disable;
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if (priv->devtype_data->quirks & FLEXCAN_QUIRK_SUPPORT_ECC)
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if (priv->devtype_data.quirks & FLEXCAN_QUIRK_SUPPORT_ECC)
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flexcan_ram_init(dev);
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flexcan_set_bittiming(dev);
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@ -1535,7 +1535,7 @@ static int flexcan_chip_start(struct net_device *dev)
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* - disable for timestamp mode
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* - enable for FIFO mode
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*/
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if (priv->devtype_data->quirks & FLEXCAN_QUIRK_USE_OFF_TIMESTAMP)
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if (priv->devtype_data.quirks & FLEXCAN_QUIRK_USE_OFF_TIMESTAMP)
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reg_mcr &= ~FLEXCAN_MCR_FEN;
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else
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reg_mcr |= FLEXCAN_MCR_FEN;
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@ -1586,7 +1586,7 @@ static int flexcan_chip_start(struct net_device *dev)
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* on most Flexcan cores, too. Otherwise we don't get
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* any error warning or passive interrupts.
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*/
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if (priv->devtype_data->quirks & FLEXCAN_QUIRK_BROKEN_WERR_STATE ||
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if (priv->devtype_data.quirks & FLEXCAN_QUIRK_BROKEN_WERR_STATE ||
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priv->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING)
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reg_ctrl |= FLEXCAN_CTRL_ERR_MSK;
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else
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@ -1599,7 +1599,7 @@ static int flexcan_chip_start(struct net_device *dev)
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netdev_dbg(dev, "%s: writing ctrl=0x%08x", __func__, reg_ctrl);
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priv->write(reg_ctrl, ®s->ctrl);
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if ((priv->devtype_data->quirks & FLEXCAN_QUIRK_ENABLE_EACEN_RRS)) {
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if ((priv->devtype_data.quirks & FLEXCAN_QUIRK_ENABLE_EACEN_RRS)) {
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reg_ctrl2 = priv->read(®s->ctrl2);
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reg_ctrl2 |= FLEXCAN_CTRL2_EACEN | FLEXCAN_CTRL2_RRS;
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priv->write(reg_ctrl2, ®s->ctrl2);
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@ -1631,7 +1631,7 @@ static int flexcan_chip_start(struct net_device *dev)
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priv->write(reg_fdctrl, ®s->fdctrl);
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}
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if (priv->devtype_data->quirks & FLEXCAN_QUIRK_USE_OFF_TIMESTAMP) {
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if (priv->devtype_data.quirks & FLEXCAN_QUIRK_USE_OFF_TIMESTAMP) {
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for (i = priv->offload.mb_first; i <= priv->offload.mb_last; i++) {
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mb = flexcan_get_mb(priv, i);
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priv->write(FLEXCAN_MB_CODE_RX_EMPTY,
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@ -1659,7 +1659,7 @@ static int flexcan_chip_start(struct net_device *dev)
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priv->write(0x0, ®s->rx14mask);
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priv->write(0x0, ®s->rx15mask);
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if (priv->devtype_data->quirks & FLEXCAN_QUIRK_DISABLE_RXFG)
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if (priv->devtype_data.quirks & FLEXCAN_QUIRK_DISABLE_RXFG)
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priv->write(0x0, ®s->rxfgmask);
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/* clear acceptance filters */
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@ -1673,7 +1673,7 @@ static int flexcan_chip_start(struct net_device *dev)
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* This also works around errata e5295 which generates false
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* positive memory errors and put the device in freeze mode.
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*/
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if (priv->devtype_data->quirks & FLEXCAN_QUIRK_DISABLE_MECR) {
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if (priv->devtype_data.quirks & FLEXCAN_QUIRK_DISABLE_MECR) {
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/* Follow the protocol as described in "Detection
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* and Correction of Memory Errors" to write to
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* MECR register (step 1 - 5)
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@ -1799,7 +1799,7 @@ static int flexcan_open(struct net_device *dev)
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if (err)
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goto out_can_rx_offload_disable;
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if (priv->devtype_data->quirks & FLEXCAN_QUIRK_NR_IRQ_3) {
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if (priv->devtype_data.quirks & FLEXCAN_QUIRK_NR_IRQ_3) {
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err = request_irq(priv->irq_boff,
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flexcan_irq, IRQF_SHARED, dev->name, dev);
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if (err)
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@ -1845,7 +1845,7 @@ static int flexcan_close(struct net_device *dev)
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netif_stop_queue(dev);
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flexcan_chip_interrupts_disable(dev);
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if (priv->devtype_data->quirks & FLEXCAN_QUIRK_NR_IRQ_3) {
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if (priv->devtype_data.quirks & FLEXCAN_QUIRK_NR_IRQ_3) {
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free_irq(priv->irq_err, dev);
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free_irq(priv->irq_boff, dev);
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}
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@ -2051,9 +2051,9 @@ static int flexcan_setup_stop_mode(struct platform_device *pdev)
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priv = netdev_priv(dev);
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if (priv->devtype_data->quirks & FLEXCAN_QUIRK_SETUP_STOP_MODE_SCFW)
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if (priv->devtype_data.quirks & FLEXCAN_QUIRK_SETUP_STOP_MODE_SCFW)
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ret = flexcan_setup_stop_mode_scfw(pdev);
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else if (priv->devtype_data->quirks & FLEXCAN_QUIRK_SETUP_STOP_MODE_GPR)
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else if (priv->devtype_data.quirks & FLEXCAN_QUIRK_SETUP_STOP_MODE_GPR)
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ret = flexcan_setup_stop_mode_gpr(pdev);
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else
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/* return 0 directly if doesn't support stop mode feature */
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@ -2181,9 +2181,10 @@ static int flexcan_probe(struct platform_device *pdev)
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dev->flags |= IFF_ECHO;
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priv = netdev_priv(dev);
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priv->devtype_data = *devtype_data;
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if (of_property_read_bool(pdev->dev.of_node, "big-endian") ||
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devtype_data->quirks & FLEXCAN_QUIRK_DEFAULT_BIG_ENDIAN) {
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priv->devtype_data.quirks & FLEXCAN_QUIRK_DEFAULT_BIG_ENDIAN) {
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priv->read = flexcan_read_be;
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priv->write = flexcan_write_be;
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} else {
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@ -2202,10 +2203,9 @@ static int flexcan_probe(struct platform_device *pdev)
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priv->clk_ipg = clk_ipg;
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priv->clk_per = clk_per;
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priv->clk_src = clk_src;
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priv->devtype_data = devtype_data;
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priv->reg_xceiver = reg_xceiver;
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if (devtype_data->quirks & FLEXCAN_QUIRK_NR_IRQ_3) {
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if (priv->devtype_data.quirks & FLEXCAN_QUIRK_NR_IRQ_3) {
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priv->irq_boff = platform_get_irq(pdev, 1);
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if (priv->irq_boff <= 0) {
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err = -ENODEV;
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@ -2218,7 +2218,7 @@ static int flexcan_probe(struct platform_device *pdev)
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}
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}
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if (priv->devtype_data->quirks & FLEXCAN_QUIRK_SUPPORT_FD) {
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if (priv->devtype_data.quirks & FLEXCAN_QUIRK_SUPPORT_FD) {
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priv->can.ctrlmode_supported |= CAN_CTRLMODE_FD |
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CAN_CTRLMODE_FD_NON_ISO;
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priv->can.bittiming_const = &flexcan_fd_bittiming_const;
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