powerpc: Use RCU based pte freeing mechanism for all powerpc
Refactor the RCU based pte free code that was used on ppc64 to be used on all powerpc. Additionally refactor pte_free() & pte_free_kernel() into common code between ppc32 & ppc64. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
This commit is contained in:
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df3b861155
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0186f47e70
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@ -3,6 +3,8 @@
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#include <linux/threads.h>
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#define PTE_NONCACHE_NUM 0 /* dummy for now to share code w/ppc64 */
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extern void __bad_pte(pmd_t *pmd);
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extern pgd_t *pgd_alloc(struct mm_struct *mm);
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@ -33,10 +35,13 @@ extern void pgd_free(struct mm_struct *mm, pgd_t *pgd);
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extern pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long addr);
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extern pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long addr);
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extern void pte_free_kernel(struct mm_struct *mm, pte_t *pte);
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extern void pte_free(struct mm_struct *mm, pgtable_t pte);
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#define __pte_free_tlb(tlb, pte) pte_free((tlb)->mm, (pte))
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static inline void pgtable_free(pgtable_free_t pgf)
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{
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void *p = (void *)(pgf.val & ~PGF_CACHENUM_MASK);
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free_page((unsigned long)p);
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}
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#define check_pgt_cache() do { } while (0)
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@ -7,7 +7,6 @@
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/mm.h>
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#include <linux/slab.h>
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#include <linux/cpumask.h>
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#include <linux/percpu.h>
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@ -108,31 +107,6 @@ static inline pgtable_t pte_alloc_one(struct mm_struct *mm,
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return page;
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}
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static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
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{
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free_page((unsigned long)pte);
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}
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static inline void pte_free(struct mm_struct *mm, pgtable_t ptepage)
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{
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pgtable_page_dtor(ptepage);
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__free_page(ptepage);
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}
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#define PGF_CACHENUM_MASK 0x7
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typedef struct pgtable_free {
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unsigned long val;
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} pgtable_free_t;
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static inline pgtable_free_t pgtable_free_cache(void *p, int cachenum,
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unsigned long mask)
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{
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BUG_ON(cachenum > PGF_CACHENUM_MASK);
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return (pgtable_free_t){.val = ((unsigned long) p & ~mask) | cachenum};
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}
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static inline void pgtable_free(pgtable_free_t pgf)
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{
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void *p = (void *)(pgf.val & ~PGF_CACHENUM_MASK);
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@ -144,14 +118,6 @@ static inline void pgtable_free(pgtable_free_t pgf)
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kmem_cache_free(pgtable_cache[cachenum], p);
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}
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extern void pgtable_free_tlb(struct mmu_gather *tlb, pgtable_free_t pgf);
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#define __pte_free_tlb(tlb,ptepage) \
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do { \
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pgtable_page_dtor(ptepage); \
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pgtable_free_tlb(tlb, pgtable_free_cache(page_address(ptepage), \
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PTE_NONCACHE_NUM, PTE_TABLE_SIZE-1)); \
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} while (0)
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#define __pmd_free_tlb(tlb, pmd) \
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pgtable_free_tlb(tlb, pgtable_free_cache(pmd, \
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PMD_CACHE_NUM, PMD_TABLE_SIZE-1))
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@ -2,11 +2,52 @@
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#define _ASM_POWERPC_PGALLOC_H
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#ifdef __KERNEL__
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#include <linux/mm.h>
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static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
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{
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free_page((unsigned long)pte);
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}
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static inline void pte_free(struct mm_struct *mm, pgtable_t ptepage)
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{
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pgtable_page_dtor(ptepage);
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__free_page(ptepage);
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}
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typedef struct pgtable_free {
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unsigned long val;
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} pgtable_free_t;
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#define PGF_CACHENUM_MASK 0x7
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static inline pgtable_free_t pgtable_free_cache(void *p, int cachenum,
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unsigned long mask)
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{
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BUG_ON(cachenum > PGF_CACHENUM_MASK);
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return (pgtable_free_t){.val = ((unsigned long) p & ~mask) | cachenum};
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}
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#ifdef CONFIG_PPC64
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#include <asm/pgalloc-64.h>
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#else
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#include <asm/pgalloc-32.h>
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#endif
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extern void pgtable_free_tlb(struct mmu_gather *tlb, pgtable_free_t pgf);
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#ifdef CONFIG_SMP
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#define __pte_free_tlb(tlb,ptepage) \
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do { \
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pgtable_page_dtor(ptepage); \
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pgtable_free_tlb(tlb, pgtable_free_cache(page_address(ptepage), \
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PTE_NONCACHE_NUM, PTE_TABLE_SIZE-1)); \
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} while (0)
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#else
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#define __pte_free_tlb(tlb, pte) pte_free((tlb)->mm, (pte))
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#endif
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#endif /* __KERNEL__ */
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#endif /* _ASM_POWERPC_PGALLOC_H */
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@ -6,7 +6,7 @@ ifeq ($(CONFIG_PPC64),y)
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EXTRA_CFLAGS += -mno-minimal-toc
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endif
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obj-y := fault.o mem.o \
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obj-y := fault.o mem.o pgtable.o \
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init_$(CONFIG_WORD_SIZE).o \
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pgtable_$(CONFIG_WORD_SIZE).o \
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mmu_context_$(CONFIG_WORD_SIZE).o
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@ -35,36 +35,6 @@ mmu_hash_lock:
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.space 4
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#endif /* CONFIG_SMP */
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/*
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* Sync CPUs with hash_page taking & releasing the hash
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* table lock
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*/
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#ifdef CONFIG_SMP
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.text
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_GLOBAL(hash_page_sync)
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mfmsr r10
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rlwinm r0,r10,0,17,15 /* clear bit 16 (MSR_EE) */
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mtmsr r0
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lis r8,mmu_hash_lock@h
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ori r8,r8,mmu_hash_lock@l
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lis r0,0x0fff
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b 10f
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11: lwz r6,0(r8)
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cmpwi 0,r6,0
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bne 11b
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10: lwarx r6,0,r8
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cmpwi 0,r6,0
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bne- 11b
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stwcx. r0,0,r8
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bne- 10b
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isync
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eieio
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li r0,0
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stw r0,0(r8)
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mtmsr r10
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blr
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#endif /* CONFIG_SMP */
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/*
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* Load a PTE into the hash table, if possible.
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* The address is in r4, and r3 contains an access flag:
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@ -0,0 +1,117 @@
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/*
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* This file contains common routines for dealing with free of page tables
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*
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* Derived from arch/powerpc/mm/tlb_64.c:
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* Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
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*
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* Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
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* and Cort Dougan (PReP) (cort@cs.nmt.edu)
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* Copyright (C) 1996 Paul Mackerras
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*
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* Derived from "arch/i386/mm/init.c"
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* Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
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*
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* Dave Engebretsen <engebret@us.ibm.com>
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* Rework for PPC64 port.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/init.h>
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#include <linux/percpu.h>
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#include <linux/hardirq.h>
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#include <asm/pgalloc.h>
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#include <asm/tlbflush.h>
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#include <asm/tlb.h>
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static DEFINE_PER_CPU(struct pte_freelist_batch *, pte_freelist_cur);
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static unsigned long pte_freelist_forced_free;
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struct pte_freelist_batch
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{
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struct rcu_head rcu;
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unsigned int index;
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pgtable_free_t tables[0];
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};
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#define PTE_FREELIST_SIZE \
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((PAGE_SIZE - sizeof(struct pte_freelist_batch)) \
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/ sizeof(pgtable_free_t))
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static void pte_free_smp_sync(void *arg)
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{
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/* Do nothing, just ensure we sync with all CPUs */
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}
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/* This is only called when we are critically out of memory
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* (and fail to get a page in pte_free_tlb).
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*/
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static void pgtable_free_now(pgtable_free_t pgf)
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{
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pte_freelist_forced_free++;
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smp_call_function(pte_free_smp_sync, NULL, 1);
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pgtable_free(pgf);
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}
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static void pte_free_rcu_callback(struct rcu_head *head)
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{
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struct pte_freelist_batch *batch =
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container_of(head, struct pte_freelist_batch, rcu);
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unsigned int i;
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for (i = 0; i < batch->index; i++)
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pgtable_free(batch->tables[i]);
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free_page((unsigned long)batch);
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}
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static void pte_free_submit(struct pte_freelist_batch *batch)
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{
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INIT_RCU_HEAD(&batch->rcu);
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call_rcu(&batch->rcu, pte_free_rcu_callback);
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}
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void pgtable_free_tlb(struct mmu_gather *tlb, pgtable_free_t pgf)
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{
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/* This is safe since tlb_gather_mmu has disabled preemption */
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cpumask_t local_cpumask = cpumask_of_cpu(smp_processor_id());
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struct pte_freelist_batch **batchp = &__get_cpu_var(pte_freelist_cur);
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if (atomic_read(&tlb->mm->mm_users) < 2 ||
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cpus_equal(tlb->mm->cpu_vm_mask, local_cpumask)) {
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pgtable_free(pgf);
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return;
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}
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if (*batchp == NULL) {
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*batchp = (struct pte_freelist_batch *)__get_free_page(GFP_ATOMIC);
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if (*batchp == NULL) {
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pgtable_free_now(pgf);
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return;
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}
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(*batchp)->index = 0;
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}
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(*batchp)->tables[(*batchp)->index++] = pgf;
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if ((*batchp)->index == PTE_FREELIST_SIZE) {
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pte_free_submit(*batchp);
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*batchp = NULL;
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}
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}
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void pte_free_finish(void)
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{
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/* This is safe since tlb_gather_mmu has disabled preemption */
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struct pte_freelist_batch **batchp = &__get_cpu_var(pte_freelist_cur);
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if (*batchp == NULL)
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return;
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pte_free_submit(*batchp);
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*batchp = NULL;
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}
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@ -48,10 +48,6 @@ EXPORT_SYMBOL(ioremap_bot); /* aka VMALLOC_END */
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extern char etext[], _stext[];
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#if defined(CONFIG_SMP) && defined(CONFIG_PPC_STD_MMU_32)
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extern void hash_page_sync(void);
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#endif
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#ifdef HAVE_BATS
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extern phys_addr_t v_mapped_by_bats(unsigned long va);
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extern unsigned long p_mapped_by_bats(phys_addr_t pa);
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@ -125,23 +121,6 @@ pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long address)
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return ptepage;
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}
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void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
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{
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#if defined(CONFIG_SMP) && defined(CONFIG_PPC_STD_MMU_32)
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hash_page_sync();
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#endif
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free_page((unsigned long)pte);
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}
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void pte_free(struct mm_struct *mm, pgtable_t ptepage)
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{
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#if defined(CONFIG_SMP) && defined(CONFIG_PPC_STD_MMU_32)
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hash_page_sync();
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#endif
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pgtable_page_dtor(ptepage);
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__free_page(ptepage);
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}
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void __iomem *
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ioremap(phys_addr_t addr, unsigned long size)
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{
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@ -37,81 +37,6 @@ DEFINE_PER_CPU(struct ppc64_tlb_batch, ppc64_tlb_batch);
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* arch/powerpc/include/asm/tlb.h file -- tgall
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*/
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DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
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static DEFINE_PER_CPU(struct pte_freelist_batch *, pte_freelist_cur);
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static unsigned long pte_freelist_forced_free;
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struct pte_freelist_batch
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{
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struct rcu_head rcu;
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unsigned int index;
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pgtable_free_t tables[0];
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};
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#define PTE_FREELIST_SIZE \
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((PAGE_SIZE - sizeof(struct pte_freelist_batch)) \
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/ sizeof(pgtable_free_t))
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static void pte_free_smp_sync(void *arg)
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{
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/* Do nothing, just ensure we sync with all CPUs */
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}
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/* This is only called when we are critically out of memory
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* (and fail to get a page in pte_free_tlb).
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*/
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static void pgtable_free_now(pgtable_free_t pgf)
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{
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pte_freelist_forced_free++;
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smp_call_function(pte_free_smp_sync, NULL, 1);
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pgtable_free(pgf);
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}
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static void pte_free_rcu_callback(struct rcu_head *head)
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{
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struct pte_freelist_batch *batch =
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container_of(head, struct pte_freelist_batch, rcu);
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unsigned int i;
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for (i = 0; i < batch->index; i++)
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pgtable_free(batch->tables[i]);
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free_page((unsigned long)batch);
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}
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static void pte_free_submit(struct pte_freelist_batch *batch)
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{
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INIT_RCU_HEAD(&batch->rcu);
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call_rcu(&batch->rcu, pte_free_rcu_callback);
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}
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void pgtable_free_tlb(struct mmu_gather *tlb, pgtable_free_t pgf)
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{
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/* This is safe since tlb_gather_mmu has disabled preemption */
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cpumask_t local_cpumask = cpumask_of_cpu(smp_processor_id());
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struct pte_freelist_batch **batchp = &__get_cpu_var(pte_freelist_cur);
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if (atomic_read(&tlb->mm->mm_users) < 2 ||
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cpus_equal(tlb->mm->cpu_vm_mask, local_cpumask)) {
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pgtable_free(pgf);
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return;
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}
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if (*batchp == NULL) {
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*batchp = (struct pte_freelist_batch *)__get_free_page(GFP_ATOMIC);
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if (*batchp == NULL) {
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pgtable_free_now(pgf);
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return;
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}
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(*batchp)->index = 0;
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}
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(*batchp)->tables[(*batchp)->index++] = pgf;
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if ((*batchp)->index == PTE_FREELIST_SIZE) {
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pte_free_submit(*batchp);
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*batchp = NULL;
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}
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}
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/*
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* A linux PTE was changed and the corresponding hash table entry
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batch->index = 0;
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}
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void pte_free_finish(void)
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{
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/* This is safe since tlb_gather_mmu has disabled preemption */
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struct pte_freelist_batch **batchp = &__get_cpu_var(pte_freelist_cur);
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if (*batchp == NULL)
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return;
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pte_free_submit(*batchp);
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*batchp = NULL;
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}
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/**
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* __flush_hash_table_range - Flush all HPTEs for a given address range
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* from the hash table (and the TLB). But keeps
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