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drm/amd/display: Use pipe_count for num of opps 

[Why]
There is one opp per pipe. For certain RN parts, the fourth pipe is disabled, so there is no opp for it.
res_cap->num_opp is hardcoded to 4, so if we use that to iterate over opps we will crash.

[How]
Use the pipe_count value instead, which is not hardcoded and so will have the correct number.

Signed-off-by: Noah Abradjian <noah.abradjian@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Noah Abradjian 2019-11-22 11:47:52 -05:00 committed by Alex Deucher
parent ded6119e82
commit 0120e8b845
1 changed files with 1 additions and 1 deletions
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2
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
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@ -1357,7 +1357,7 @@ static void dcn20_update_dchubp_dpp(
// MPCC inst is equal to pipe index in practice
int mpcc_inst = pipe_ctx->pipe_idx;
int opp_inst;
int opp_count = dc->res_pool->res_cap->num_opp;
int opp_count = dc->res_pool->pipe_count;
for (opp_inst = 0; opp_inst < opp_count; opp_inst++) {
if (dc->res_pool->opps[opp_inst]->mpcc_disconnect_pending[mpcc_inst]) {