i2c: riic: Add RZ/G2L support
RZ/G2L i2c controller is compatible with RZ/A i2c controller. By default IP is in reset state, so need to perform release reset before accessing any register. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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@ -42,8 +42,10 @@
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/reset.h>
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#define RIIC_ICCR1 0x00
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#define RIIC_ICCR2 0x04
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@ -86,6 +88,11 @@
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#define RIIC_INIT_MSG -1
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enum riic_type {
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RIIC_RZ_A,
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RIIC_RZ_G2L,
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};
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struct riic_dev {
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void __iomem *base;
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u8 *buf;
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@ -395,7 +402,9 @@ static int riic_i2c_probe(struct platform_device *pdev)
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struct i2c_adapter *adap;
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struct resource *res;
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struct i2c_timings i2c_t;
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struct reset_control *rstc;
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int i, ret;
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enum riic_type type;
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riic = devm_kzalloc(&pdev->dev, sizeof(*riic), GFP_KERNEL);
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if (!riic)
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@ -412,6 +421,17 @@ static int riic_i2c_probe(struct platform_device *pdev)
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return PTR_ERR(riic->clk);
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}
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type = (enum riic_type)of_device_get_match_data(&pdev->dev);
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if (type == RIIC_RZ_G2L) {
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rstc = devm_reset_control_get_exclusive(&pdev->dev, NULL);
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if (IS_ERR(rstc)) {
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dev_err(&pdev->dev, "Error: missing reset ctrl\n");
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return PTR_ERR(rstc);
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}
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reset_control_deassert(rstc);
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}
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for (i = 0; i < ARRAY_SIZE(riic_irqs); i++) {
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res = platform_get_resource(pdev, IORESOURCE_IRQ, riic_irqs[i].res_num);
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if (!res)
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@ -472,7 +492,8 @@ static int riic_i2c_remove(struct platform_device *pdev)
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}
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static const struct of_device_id riic_i2c_dt_ids[] = {
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{ .compatible = "renesas,riic-rz" },
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{ .compatible = "renesas,riic-r9a07g044", .data = (void *)RIIC_RZ_G2L },
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{ .compatible = "renesas,riic-rz", .data = (void *)RIIC_RZ_A },
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{ /* Sentinel */ },
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};
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