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drm/amdgpu: Skip halting RLC on GFX v9.4.3 

RLC-PMFW handshake happens periodically when GFXCLK DPM is enabled and
halting RLC may cause unexpected results. Avoid halting RLC from driver
side.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Le Ma <le.ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Lijo Lazar 2023-03-24 15:21:30 +05:30 committed by Alex Deucher
parent 1e91a5f791
commit 00e1ab02c2
1 changed files with 7 additions and 16 deletions
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23
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
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@ -1256,21 +1256,20 @@ static int gfx_v9_4_3_xcc_rlc_resume(struct amdgpu_device *adev, int xcc_id)
{
int r;
gfx_v9_4_3_xcc_rlc_stop(adev, xcc_id);
/* disable CG */
WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_CGCG_CGLS_CTRL, 0);
gfx_v9_4_3_xcc_init_pg(adev, xcc_id);
if (adev->firmware.load_type != AMDGPU_FW_LOAD_PSP) {
gfx_v9_4_3_xcc_rlc_stop(adev, xcc_id);
/* legacy rlc firmware loading */
r = gfx_v9_4_3_xcc_rlc_load_microcode(adev, xcc_id);
if (r)
return r;
gfx_v9_4_3_xcc_rlc_start(adev, xcc_id);
}
gfx_v9_4_3_xcc_rlc_start(adev, xcc_id);
amdgpu_gfx_rlc_enter_safe_mode(adev, xcc_id);
/* disable CG */
WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_CGCG_CGLS_CTRL, 0);
gfx_v9_4_3_xcc_init_pg(adev, xcc_id);
amdgpu_gfx_rlc_exit_safe_mode(adev, xcc_id);
return 0;
}
@ -1967,14 +1966,6 @@ static void gfx_v9_4_3_xcc_fini(struct amdgpu_device *adev, int xcc_id)
gfx_v9_4_3_xcc_kcq_fini_register(adev, xcc_id);
gfx_v9_4_3_xcc_cp_enable(adev, false, xcc_id);
/* Skip suspend with A+A reset */
if (adev->gmc.xgmi.connected_to_cpu && amdgpu_in_reset(adev)) {
dev_dbg(adev->dev, "Device in reset. Skipping RLC halt\n");
return;
}
gfx_v9_4_3_xcc_rlc_stop(adev, xcc_id);
}
static int gfx_v9_4_3_hw_init(void *handle)