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drm/amd/powerplay: move smu related variable definitions to smumgr. 

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Rex Zhu 2016-08-11 19:36:54 +08:00 committed by Alex Deucher
parent 026c881046
commit 00d57e6d6c
3 changed files with 21 additions and 17 deletions
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5
drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.h
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@ -30,6 +30,7 @@
#include "ppatomctrl.h"
#include "polaris10_ppsmc.h"
#include "polaris10_powertune.h"
#include "polaris10_smumgr.h"
#define POLARIS10_MAX_HARDWARE_POWERLEVELS 2
@ -165,10 +166,6 @@ struct polaris10_pcie_perf_range {
uint16_t max;
uint16_t min;
};
struct polaris10_range_table {
uint32_t trans_lower_frequency; /* in 10khz */
uint32_t trans_upper_frequency;
};
struct polaris10_hwmgr {
struct polaris10_dpm_table dpm_table;

13
drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_powertune.h
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@ -66,19 +66,6 @@ struct polaris10_pt_config_reg {
enum polaris10_pt_config_reg_type type;
};
struct polaris10_pt_defaults {
uint8_t SviLoadLineEn;
uint8_t SviLoadLineVddC;
uint8_t TDC_VDDC_ThrottleReleaseLimitPerc;
uint8_t TDC_MAWt;
uint8_t TdcWaterfallCtl;
uint8_t DTEAmbientTempBase;
uint32_t DisplayCac;
uint32_t BAPM_TEMP_GRADIENT;
uint16_t BAPMTI_R[SMU74_DTE_ITERATIONS * SMU74_DTE_SOURCES * SMU74_DTE_SINKS];
uint16_t BAPMTI_RC[SMU74_DTE_ITERATIONS * SMU74_DTE_SOURCES * SMU74_DTE_SINKS];
};
void polaris10_initialize_power_tune_defaults(struct pp_hwmgr *hwmgr);
int polaris10_populate_bapm_parameters_in_dpm_table(struct pp_hwmgr *hwmgr);

20
drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.h
View File

@ -26,12 +26,27 @@
#include <polaris10_ppsmc.h>
#include <pp_endian.h>
#include "smu74.h"
struct polaris10_avfs {
enum AVFS_BTC_STATUS avfs_btc_status;
uint32_t avfs_btc_param;
};
struct polaris10_pt_defaults {
uint8_t SviLoadLineEn;
uint8_t SviLoadLineVddC;
uint8_t TDC_VDDC_ThrottleReleaseLimitPerc;
uint8_t TDC_MAWt;
uint8_t TdcWaterfallCtl;
uint8_t DTEAmbientTempBase;
uint32_t DisplayCac;
uint32_t BAPM_TEMP_GRADIENT;
uint16_t BAPMTI_R[SMU74_DTE_ITERATIONS * SMU74_DTE_SOURCES * SMU74_DTE_SINKS];
uint16_t BAPMTI_RC[SMU74_DTE_ITERATIONS * SMU74_DTE_SOURCES * SMU74_DTE_SINKS];
};
struct polaris10_buffer_entry {
uint32_t data_size;
uint32_t mc_addr_low;
@ -40,6 +55,11 @@ struct polaris10_buffer_entry {
unsigned long handle;
};
struct polaris10_range_table {
uint32_t trans_lower_frequency; /* in 10khz */
uint32_t trans_upper_frequency;
};
struct polaris10_smumgr {
uint8_t *header;
uint8_t *mec_image;