perf vendor events: Update JSON metrics for Broadwell
Signed-off-by: Andi Kleen <ak@linux.intel.com> Link: http://lkml.kernel.org/r/20170914200748.GA13837@tassilo.jf.intel.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
This commit is contained in:
parent
8776fe75dc
commit
008de6c69c
|
@ -13,7 +13,7 @@
|
|||
},
|
||||
{
|
||||
"BriefDescription": "Rough Estimation of fraction of fetched lines bytes that were likely consumed by program instructions",
|
||||
"MetricExpr": "min( 1 , IDQ.MITE_UOPS / ( UOPS_RETIRED.RETIRE_SLOTS / INST_RETIRED.ANY * 16 * ( ICACHE.HIT + ICACHE.MISSES ) / 4.0 ) )",
|
||||
"MetricExpr": "min( 1 , IDQ.MITE_UOPS / ( (UOPS_RETIRED.RETIRE_SLOTS / INST_RETIRED.ANY) * 16 * ( ICACHE.HIT + ICACHE.MISSES ) / 4.0 ) )",
|
||||
"MetricGroup": "Frontend",
|
||||
"MetricName": "IFetch_Line_Utilization"
|
||||
},
|
||||
|
@ -25,7 +25,7 @@
|
|||
},
|
||||
{
|
||||
"BriefDescription": "Cycles Per Instruction (threaded)",
|
||||
"MetricExpr": "1 / INST_RETIRED.ANY / cycles",
|
||||
"MetricExpr": "1 / (INST_RETIRED.ANY / cycles)",
|
||||
"MetricGroup": "Pipeline;Summary",
|
||||
"MetricName": "CPI"
|
||||
},
|
||||
|
@ -37,7 +37,7 @@
|
|||
},
|
||||
{
|
||||
"BriefDescription": "Total issue-pipeline slots",
|
||||
"MetricExpr": "4*( CPU_CLK_UNHALTED.THREAD_ANY / 2 ) if #SMT_on else cycles",
|
||||
"MetricExpr": "4*(( CPU_CLK_UNHALTED.THREAD_ANY / 2 ) if #SMT_on else cycles)",
|
||||
"MetricGroup": "TopDownL1",
|
||||
"MetricName": "SLOTS"
|
||||
},
|
||||
|
@ -49,19 +49,19 @@
|
|||
},
|
||||
{
|
||||
"BriefDescription": "Instructions Per Cycle (per physical core)",
|
||||
"MetricExpr": "INST_RETIRED.ANY / ( CPU_CLK_UNHALTED.THREAD_ANY / 2 ) if #SMT_on else cycles",
|
||||
"MetricExpr": "INST_RETIRED.ANY / (( CPU_CLK_UNHALTED.THREAD_ANY / 2 ) if #SMT_on else cycles)",
|
||||
"MetricGroup": "SMT",
|
||||
"MetricName": "CoreIPC"
|
||||
},
|
||||
{
|
||||
"BriefDescription": "Instruction-Level-Parallelism (average number of uops executed when there is at least 1 uop executed)",
|
||||
"MetricExpr": "UOPS_EXECUTED.THREAD / ( cpu@uops_executed.core\\,cmask\\=1@ / 2) if #SMT_on else UOPS_EXECUTED.CYCLES_GE_1_UOP_EXEC",
|
||||
"MetricExpr": "UOPS_EXECUTED.THREAD / (( cpu@UOPS_EXECUTED.CORE\\,cmask\\=1@ / 2) if #SMT_on else UOPS_EXECUTED.CYCLES_GE_1_UOP_EXEC)",
|
||||
"MetricGroup": "Pipeline;Ports_Utilization",
|
||||
"MetricName": "ILP"
|
||||
},
|
||||
{
|
||||
"BriefDescription": "Average Branch Address Clear Cost (fraction of cycles)",
|
||||
"MetricExpr": "2* ( RS_EVENTS.EMPTY_CYCLES - ICACHE.IFDATA_STALL - ( 14 * ITLB_MISSES.STLB_HIT + cpu@ITLB_MISSES.WALK_DURATION\\,cmask\\=1@ + 7* ITLB_MISSES.WALK_COMPLETED ) ) / RS_EVENTS.EMPTY_END",
|
||||
"MetricExpr": "2* (( RS_EVENTS.EMPTY_CYCLES - ICACHE.IFDATA_STALL - (( 14 * ITLB_MISSES.STLB_HIT + ITLB_MISSES.WALK_DURATION:c1 + 7* ITLB_MISSES.WALK_COMPLETED )) ) / RS_EVENTS.EMPTY_END)",
|
||||
"MetricGroup": "Unknown_Branches",
|
||||
"MetricName": "BAClear_Cost"
|
||||
},
|
||||
|
@ -79,13 +79,13 @@
|
|||
},
|
||||
{
|
||||
"BriefDescription": "Memory-Level-Parallelism (average number of L1 miss demand load when there is at least 1 such miss)",
|
||||
"MetricExpr": "L1D_PEND_MISS.PENDING / ( cpu@l1d_pend_miss.pending_cycles\\,any\\=1@ / 2) if #SMT_on else L1D_PEND_MISS.PENDING_CYCLES",
|
||||
"MetricExpr": "L1D_PEND_MISS.PENDING / (( cpu@l1d_pend_miss.pending_cycles\\,any\\=1@ / 2) if #SMT_on else L1D_PEND_MISS.PENDING_CYCLES)",
|
||||
"MetricGroup": "Memory_Bound;Memory_BW",
|
||||
"MetricName": "MLP"
|
||||
},
|
||||
{
|
||||
"BriefDescription": "Utilization of the core's Page Walker(s) serving STLB misses triggered by instruction/Load/Store accesses",
|
||||
"MetricExpr": "( cpu@ITLB_MISSES.WALK_DURATION\\,cmask\\=1@ + cpu@DTLB_LOAD_MISSES.WALK_DURATION\\,cmask\\=1@ + cpu@DTLB_STORE_MISSES.WALK_DURATION\\,cmask\\=1@ + 7*(DTLB_STORE_MISSES.WALK_COMPLETED+DTLB_LOAD_MISSES.WALK_COMPLETED+ITLB_MISSES.WALK_COMPLETED)) / ( CPU_CLK_UNHALTED.THREAD_ANY / 2 ) if #SMT_on else cycles",
|
||||
"MetricExpr": "( ITLB_MISSES.WALK_DURATION:c1 + DTLB_LOAD_MISSES.WALK_DURATION:c1 + DTLB_STORE_MISSES.WALK_DURATION:c1 + 7*(DTLB_STORE_MISSES.WALK_COMPLETED+DTLB_LOAD_MISSES.WALK_COMPLETED+ITLB_MISSES.WALK_COMPLETED)) / (( CPU_CLK_UNHALTED.THREAD_ANY / 2 ) if #SMT_on else cycles)",
|
||||
"MetricGroup": "TLB",
|
||||
"MetricName": "Page_Walks_Utilization"
|
||||
},
|
||||
|
@ -97,7 +97,7 @@
|
|||
},
|
||||
{
|
||||
"BriefDescription": "Giga Floating Point Operations Per Second",
|
||||
"MetricExpr": "( 1*( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2* FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4*( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8* FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE ) / 1000000000 / duration_time",
|
||||
"MetricExpr": "(( 1*( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2* FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4*( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8* FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE )) / 1000000000 / duration_time",
|
||||
"MetricGroup": "FLOPS;Summary",
|
||||
"MetricName": "GFLOPs"
|
||||
},
|
||||
|
|
Loading…
Reference in New Issue