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drm/i915: Replace dig_port->port with encoder port for BXT DPLL selection 

Replace dig_port->port with encoder->port in the BXT DPLL selection.
We can do this because both the master encoder and the fake MST encoders
have the same encoder->port value, whereas using dig_port->port only
worked for the master encoder since the fake encoders were't derived
from intel_digital_port. This eliminates the DP MST special case.

Do this by hand because spatch is having problems with the control
flow due to the dig_port assignment happening in two different
branches.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20171031205123.13123-8-ville.syrjala@linux.intel.com
Acked-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
This commit is contained in:
Ville Syrjälä 2017-10-31 22:51:20 +02:00
parent c249f1f423
commit 005b5bc694
1 changed files with 1 additions and 9 deletions
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10
drivers/gpu/drm/i915/intel_dpll_mgr.c
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@ -1802,7 +1802,6 @@ bxt_get_dpll(struct intel_crtc *crtc,
{
struct intel_dpll_hw_state dpll_hw_state = { };
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
struct intel_digital_port *intel_dig_port;
struct intel_shared_dpll *pll;
int i, clock = crtc_state->port_clock;
@ -1820,15 +1819,8 @@ bxt_get_dpll(struct intel_crtc *crtc,
crtc_state->dpll_hw_state = dpll_hw_state;
if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST)) {
struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
intel_dig_port = intel_mst->primary;
} else
intel_dig_port = enc_to_dig_port(&encoder->base);
/* 1:1 mapping between ports and PLLs */
i = (enum intel_dpll_id) intel_dig_port->port;
i = (enum intel_dpll_id) encoder->port;
pll = intel_get_shared_dpll_by_id(dev_priv, i);
DRM_DEBUG_KMS("[CRTC:%d:%s] using pre-allocated %s\n",