Staging: comedi: fix bracing coding style and 80 character issues in ni_660x.c
This is a patch to the ni_660x.c file that fixes up the brace and 80 character issues found by the checkpatch tool Signed-off-by: Graham M Howe <gmhowe@btopenworld.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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0054a361e4
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@ -52,7 +52,8 @@ enum ni_660x_constants {
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};
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};
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#define NUM_PFI_CHANNELS 40
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#define NUM_PFI_CHANNELS 40
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/* really there are only up to 3 dma channels, but the register layout allows for 4 */
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/* really there are only up to 3 dma channels, but the register layout allows
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for 4 */
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#define MAX_DMA_CHANNEL 4
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#define MAX_DMA_CHANNEL 4
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/* See Register-Level Programmer Manual page 3.1 */
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/* See Register-Level Programmer Manual page 3.1 */
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@ -198,7 +199,7 @@ struct NI_660xRegisterData {
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const char *name; /* Register Name */
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const char *name; /* Register Name */
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int offset; /* Offset from base address from GPCT chip */
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int offset; /* Offset from base address from GPCT chip */
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enum ni_660x_register_direction direction;
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enum ni_660x_register_direction direction;
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enum ni_660x_register_width size; /* 1 byte, 2 bytes, or 4 bytes */
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enum ni_660x_register_width size; /*1 byte, 2 bytes, or 4 bytes*/
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};
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};
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static const struct NI_660xRegisterData registerData[NumRegisters] = {
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static const struct NI_660xRegisterData registerData[NumRegisters] = {
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@ -382,8 +383,8 @@ enum global_interrupt_config_register_bits {
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};
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};
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/* Offset of the GPCT chips from the base-adress of the card */
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/* Offset of the GPCT chips from the base-adress of the card */
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static const unsigned GPCT_OFFSET[2] = { 0x0, 0x800 }; /* First chip is at base-address +
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/* First chip is at base-address + 0x00, etc. */
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0x00, etc. */
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static const unsigned GPCT_OFFSET[2] = { 0x0, 0x800 };
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/* Board description*/
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/* Board description*/
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struct ni_660x_board {
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struct ni_660x_board {
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@ -993,9 +994,9 @@ static int ni_660x_allocate_private(struct comedi_device *dev)
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spin_lock_init(&private(dev)->mite_channel_lock);
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spin_lock_init(&private(dev)->mite_channel_lock);
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spin_lock_init(&private(dev)->interrupt_lock);
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spin_lock_init(&private(dev)->interrupt_lock);
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spin_lock_init(&private(dev)->soft_reg_copy_lock);
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spin_lock_init(&private(dev)->soft_reg_copy_lock);
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for (i = 0; i < NUM_PFI_CHANNELS; ++i) {
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for (i = 0; i < NUM_PFI_CHANNELS; ++i)
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private(dev)->pfi_output_selects[i] = pfi_output_select_counter;
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private(dev)->pfi_output_selects[i] = pfi_output_select_counter;
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}
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return 0;
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return 0;
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}
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}
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@ -1008,9 +1009,8 @@ static int ni_660x_alloc_mite_rings(struct comedi_device *dev)
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for (j = 0; j < counters_per_chip; ++j) {
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for (j = 0; j < counters_per_chip; ++j) {
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private(dev)->mite_rings[i][j] =
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private(dev)->mite_rings[i][j] =
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mite_alloc_ring(private(dev)->mite);
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mite_alloc_ring(private(dev)->mite);
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if (private(dev)->mite_rings[i][j] == NULL) {
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if (private(dev)->mite_rings[i][j] == NULL)
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return -ENOMEM;
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return -ENOMEM;
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}
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}
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}
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}
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}
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return 0;
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return 0;
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@ -1022,9 +1022,8 @@ static void ni_660x_free_mite_rings(struct comedi_device *dev)
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unsigned j;
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unsigned j;
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for (i = 0; i < board(dev)->n_chips; ++i) {
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for (i = 0; i < board(dev)->n_chips; ++i) {
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for (j = 0; j < counters_per_chip; ++j) {
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for (j = 0; j < counters_per_chip; ++j)
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mite_free_ring(private(dev)->mite_rings[i][j]);
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mite_free_ring(private(dev)->mite_rings[i][j]);
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}
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}
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}
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}
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}
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@ -1078,15 +1077,16 @@ static int ni_660x_attach(struct comedi_device *dev,
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s->insn_bits = ni_660x_dio_insn_bits;
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s->insn_bits = ni_660x_dio_insn_bits;
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s->insn_config = ni_660x_dio_insn_config;
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s->insn_config = ni_660x_dio_insn_config;
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s->io_bits = 0; /* all bits default to input */
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s->io_bits = 0; /* all bits default to input */
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/* we use the ioconfig registers to control dio direction, so zero output enables in stc dio control reg */
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/* we use the ioconfig registers to control dio direction, so zero
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output enables in stc dio control reg */
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ni_660x_write_register(dev, 0, 0, STCDIOControl);
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ni_660x_write_register(dev, 0, 0, STCDIOControl);
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private(dev)->counter_dev = ni_gpct_device_construct(dev,
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private(dev)->counter_dev = ni_gpct_device_construct(dev,
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&ni_gpct_write_register,
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&ni_gpct_write_register,
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&ni_gpct_read_register,
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&ni_gpct_read_register,
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ni_gpct_variant_660x,
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ni_gpct_variant_660x,
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ni_660x_num_counters
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ni_660x_num_counters
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(dev));
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(dev));
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if (private(dev)->counter_dev == NULL)
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if (private(dev)->counter_dev == NULL)
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return -ENOMEM;
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return -ENOMEM;
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for (i = 0; i < NI_660X_MAX_NUM_COUNTERS; ++i) {
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for (i = 0; i < NI_660X_MAX_NUM_COUNTERS; ++i) {
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@ -1118,12 +1118,12 @@ static int ni_660x_attach(struct comedi_device *dev,
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s->type = COMEDI_SUBD_UNUSED;
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s->type = COMEDI_SUBD_UNUSED;
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}
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}
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}
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}
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for (i = 0; i < board(dev)->n_chips; ++i) {
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for (i = 0; i < board(dev)->n_chips; ++i)
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init_tio_chip(dev, i);
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init_tio_chip(dev, i);
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}
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for (i = 0; i < ni_660x_num_counters(dev); ++i) {
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for (i = 0; i < ni_660x_num_counters(dev); ++i)
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ni_tio_init_counter(&private(dev)->counter_dev->counters[i]);
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ni_tio_init_counter(&private(dev)->counter_dev->counters[i]);
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}
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for (i = 0; i < NUM_PFI_CHANNELS; ++i) {
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for (i = 0; i < NUM_PFI_CHANNELS; ++i) {
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if (i < min_counter_pfi_chan)
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if (i < min_counter_pfi_chan)
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ni_660x_set_pfi_routing(dev, i, pfi_output_select_do);
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ni_660x_set_pfi_routing(dev, i, pfi_output_select_do);
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@ -1134,9 +1134,9 @@ static int ni_660x_attach(struct comedi_device *dev,
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}
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}
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/* to be safe, set counterswap bits on tio chips after all the counter
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/* to be safe, set counterswap bits on tio chips after all the counter
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outputs have been set to high impedance mode */
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outputs have been set to high impedance mode */
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for (i = 0; i < board(dev)->n_chips; ++i) {
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for (i = 0; i < board(dev)->n_chips; ++i)
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set_tio_counterswap(dev, i);
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set_tio_counterswap(dev, i);
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}
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ret = request_irq(mite_irq(private(dev)->mite), ni_660x_interrupt,
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ret = request_irq(mite_irq(private(dev)->mite), ni_660x_interrupt,
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IRQF_SHARED, "ni_660x", dev);
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IRQF_SHARED, "ni_660x", dev);
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if (ret < 0) {
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if (ret < 0) {
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@ -1193,9 +1193,9 @@ static void init_tio_chip(struct comedi_device *dev, int chipset)
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private(dev)->
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private(dev)->
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dma_configuration_soft_copies[chipset],
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dma_configuration_soft_copies[chipset],
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DMAConfigRegister);
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DMAConfigRegister);
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for (i = 0; i < NUM_PFI_CHANNELS; ++i) {
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for (i = 0; i < NUM_PFI_CHANNELS; ++i)
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ni_660x_write_register(dev, chipset, 0, IOConfigReg(i));
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ni_660x_write_register(dev, chipset, 0, IOConfigReg(i));
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}
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}
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}
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static int
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static int
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