clk: imx: Rework all clk_hw_register_mux wrappers
Instead of having multiple inline functions that were calling clk_hw_register_mux, implement a generic low-level __imx_clk_hw_mux and implement the rest as macros that pass on as arguments whatever is needed in each case. Signed-off-by: Abel Vesa <abel.vesa@nxp.com> Link: https://lore.kernel.org/r/1631521490-17171-6-git-send-email-abel.vesa@nxp.com Reviewed-by: Stephen Boyd <sboyd@kernel.org>
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@ -121,6 +121,9 @@ extern struct imx_pll14xx_clk imx_1443x_dram_pll;
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#define imx_clk_pllv2(name, parent, base) \
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to_clk(imx_clk_hw_pllv2(name, parent, base))
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#define imx_clk_mux_flags(name, reg, shift, width, parents, num_parents, flags) \
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to_clk(imx_clk_hw_mux_flags(name, reg, shift, width, parents, num_parents, flags))
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#define imx_clk_hw_gate(name, parent, reg, shift) \
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imx_clk_hw_gate_flags(name, parent, reg, shift, 0)
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@ -157,6 +160,21 @@ extern struct imx_pll14xx_clk imx_1443x_dram_pll;
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#define imx_clk_hw_gate4_flags(name, parent, reg, shift, flags) \
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imx_clk_hw_gate2_flags(name, parent, reg, shift, flags | CLK_OPS_PARENT_ENABLE)
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#define imx_clk_hw_mux2(name, reg, shift, width, parents, num_parents) \
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imx_clk_hw_mux2_flags(name, reg, shift, width, parents, num_parents, 0)
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#define imx_clk_hw_mux(name, reg, shift, width, parents, num_parents) \
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__imx_clk_hw_mux(name, reg, shift, width, parents, num_parents, 0, 0)
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#define imx_clk_hw_mux_flags(name, reg, shift, width, parents, num_parents, flags) \
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__imx_clk_hw_mux(name, reg, shift, width, parents, num_parents, flags, 0)
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#define imx_clk_hw_mux_ldb(name, reg, shift, width, parents, num_parents) \
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__imx_clk_hw_mux(name, reg, shift, width, parents, num_parents, CLK_SET_RATE_PARENT, CLK_MUX_READ_ONLY)
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#define imx_clk_hw_mux2_flags(name, reg, shift, width, parents, num_parents, flags) \
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__imx_clk_hw_mux(name, reg, shift, width, parents, num_parents, flags | CLK_OPS_PARENT_ENABLE, 0)
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struct clk_hw *imx_dev_clk_hw_pll14xx(struct device *dev, const char *name,
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const char *parent_name, void __iomem *base,
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const struct imx_pll14xx_clk *pll_clk);
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@ -278,15 +296,6 @@ static inline struct clk_hw *imx_clk_hw_fixed(const char *name, int rate)
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return clk_hw_register_fixed_rate(NULL, name, NULL, 0, rate);
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}
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static inline struct clk_hw *imx_clk_hw_mux_ldb(const char *name, void __iomem *reg,
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u8 shift, u8 width, const char * const *parents,
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int num_parents)
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{
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return clk_hw_register_mux(NULL, name, parents, num_parents,
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CLK_SET_RATE_NO_REPARENT | CLK_SET_RATE_PARENT, reg,
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shift, width, CLK_MUX_READ_ONLY, &imx_ccm_lock);
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}
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static inline struct clk_hw *imx_clk_hw_fixed_factor(const char *name,
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const char *parent, unsigned int mult, unsigned int div)
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{
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@ -338,46 +347,13 @@ static inline struct clk_hw *__imx_clk_hw_gate2(const char *name, const char *pa
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shift, cgr_val, 0x3, 0, &imx_ccm_lock, share_count);
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}
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static inline struct clk_hw *imx_clk_hw_mux(const char *name, void __iomem *reg,
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static inline struct clk_hw *__imx_clk_hw_mux(const char *name, void __iomem *reg,
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u8 shift, u8 width, const char * const *parents,
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int num_parents)
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int num_parents, unsigned long flags, unsigned long clk_mux_flags)
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{
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return clk_hw_register_mux(NULL, name, parents, num_parents,
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CLK_SET_RATE_NO_REPARENT, reg, shift,
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width, 0, &imx_ccm_lock);
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}
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static inline struct clk_hw *imx_clk_hw_mux2(const char *name, void __iomem *reg,
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u8 shift, u8 width,
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const char * const *parents,
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int num_parents)
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{
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return clk_hw_register_mux(NULL, name, parents, num_parents,
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CLK_SET_RATE_NO_REPARENT |
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CLK_OPS_PARENT_ENABLE,
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reg, shift, width, 0, &imx_ccm_lock);
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}
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static inline struct clk_hw *imx_clk_hw_mux2_flags(const char *name,
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void __iomem *reg, u8 shift, u8 width,
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const char * const *parents,
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int num_parents, unsigned long flags)
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{
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return clk_hw_register_mux(NULL, name, parents, num_parents,
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flags | CLK_SET_RATE_NO_REPARENT | CLK_OPS_PARENT_ENABLE,
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reg, shift, width, 0, &imx_ccm_lock);
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}
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static inline struct clk_hw *imx_clk_hw_mux_flags(const char *name,
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void __iomem *reg, u8 shift,
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u8 width,
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const char * const *parents,
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int num_parents,
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unsigned long flags)
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{
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return clk_hw_register_mux(NULL, name, parents, num_parents,
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flags | CLK_SET_RATE_NO_REPARENT,
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reg, shift, width, 0, &imx_ccm_lock);
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flags | CLK_SET_RATE_NO_REPARENT, reg, shift,
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width, clk_mux_flags, &imx_ccm_lock);
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}
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struct clk_hw *imx_clk_hw_cpu(const char *name, const char *parent_name,
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