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drm/i915/mtl: Wa_22011802037: don't complain about missing regs on MTL 

Wa_22011802037 requires waiting for an engine-specific register to
clear. A missing entry for GSC engine in the register table is flagged
as a drm_err. The drm_err was originally intended to catch missing
register entries for newer engines, however, it was later found that the
WA is only required for 'legacy' engines. So just drop the drm_err.

Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com>
Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230124231111.1786429-1-umesh.nerlige.ramappa@intel.com
This commit is contained in:
John Harrison 2023-01-24 15:11:11 -08:00 committed by Umesh Nerlige Ramappa
parent 2f8c06cb66
commit 003e11ed2e
1 changed files with 1 additions and 4 deletions
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5
drivers/gpu/drm/i915/gt/intel_engine_cs.c
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@ -1584,11 +1584,8 @@ static u32 __cs_pending_mi_force_wakes(struct intel_engine_cs *engine)
};
u32 val;
if (!_reg[engine->id].reg) {
drm_err(&engine->i915->drm,
"MSG IDLE undefined for engine id %u\n", engine->id);
if (!_reg[engine->id].reg)
return 0;
}
val = intel_uncore_read(engine->uncore, _reg[engine->id]);