ath9k: cleanup slot time and ack/cts timeout handling
Previously ath9k left the initialization of slot timing and ACK/CTS timeout to the mode specific initvals. This does not handle short vs long slot in 2.4 GHz and uses a rather strange value for the 2.4 GHz ACK timeout (64 usec). This patch uses the proper ath9k_hw functions for setting slot time and timeouts and also implements the switch between short and long slot time in 2.4 GHz Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
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145b6d1a56
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0005baf4a3
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@ -480,7 +480,8 @@ void ath_beacon_tasklet(unsigned long data)
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sc->beacon.updateslot = COMMIT; /* commit next beacon */
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sc->beacon.slotupdate = slot;
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} else if (sc->beacon.updateslot == COMMIT && sc->beacon.slotupdate == slot) {
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ath9k_hw_setslottime(sc->sc_ah, sc->beacon.slottime);
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ah->slottime = sc->beacon.slottime;
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ath9k_hw_init_global_settings(ah);
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sc->beacon.updateslot = OK;
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}
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if (bfaddr != 0) {
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@ -52,28 +52,6 @@ module_exit(ath9k_exit);
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/* Helper Functions */
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/********************/
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static u32 ath9k_hw_mac_usec(struct ath_hw *ah, u32 clks)
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{
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struct ieee80211_conf *conf = &ath9k_hw_common(ah)->hw->conf;
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if (!ah->curchan) /* should really check for CCK instead */
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return clks / ATH9K_CLOCK_RATE_CCK;
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if (conf->channel->band == IEEE80211_BAND_2GHZ)
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return clks / ATH9K_CLOCK_RATE_2GHZ_OFDM;
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return clks / ATH9K_CLOCK_RATE_5GHZ_OFDM;
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}
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static u32 ath9k_hw_mac_to_usec(struct ath_hw *ah, u32 clks)
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{
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struct ieee80211_conf *conf = &ath9k_hw_common(ah)->hw->conf;
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if (conf_is_ht40(conf))
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return ath9k_hw_mac_usec(ah, clks) / 2;
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else
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return ath9k_hw_mac_usec(ah, clks);
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}
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static u32 ath9k_hw_mac_clks(struct ath_hw *ah, u32 usecs)
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{
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struct ieee80211_conf *conf = &ath9k_hw_common(ah)->hw->conf;
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@ -413,8 +391,6 @@ static void ath9k_hw_init_defaults(struct ath_hw *ah)
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ah->beacon_interval = 100;
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ah->enable_32kHz_clock = DONT_USE_32KHZ;
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ah->slottime = (u32) -1;
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ah->acktimeout = (u32) -1;
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ah->ctstimeout = (u32) -1;
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ah->globaltxtimeout = (u32) -1;
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ah->power_mode = ATH9K_PM_UNDEFINED;
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}
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@ -1180,34 +1156,25 @@ static void ath9k_hw_init_interrupt_masks(struct ath_hw *ah,
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}
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}
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static bool ath9k_hw_set_ack_timeout(struct ath_hw *ah, u32 us)
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static void ath9k_hw_setslottime(struct ath_hw *ah, u32 us)
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{
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if (us > ath9k_hw_mac_to_usec(ah, MS(0xffffffff, AR_TIME_OUT_ACK))) {
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ath_print(ath9k_hw_common(ah), ATH_DBG_RESET,
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"bad ack timeout %u\n", us);
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ah->acktimeout = (u32) -1;
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return false;
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} else {
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REG_RMW_FIELD(ah, AR_TIME_OUT,
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AR_TIME_OUT_ACK, ath9k_hw_mac_to_clks(ah, us));
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ah->acktimeout = us;
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return true;
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}
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u32 val = ath9k_hw_mac_to_clks(ah, us);
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val = min(val, (u32) 0xFFFF);
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REG_WRITE(ah, AR_D_GBL_IFS_SLOT, val);
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}
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static bool ath9k_hw_set_cts_timeout(struct ath_hw *ah, u32 us)
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static void ath9k_hw_set_ack_timeout(struct ath_hw *ah, u32 us)
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{
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if (us > ath9k_hw_mac_to_usec(ah, MS(0xffffffff, AR_TIME_OUT_CTS))) {
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ath_print(ath9k_hw_common(ah), ATH_DBG_RESET,
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"bad cts timeout %u\n", us);
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ah->ctstimeout = (u32) -1;
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return false;
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} else {
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REG_RMW_FIELD(ah, AR_TIME_OUT,
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AR_TIME_OUT_CTS, ath9k_hw_mac_to_clks(ah, us));
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ah->ctstimeout = us;
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return true;
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}
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u32 val = ath9k_hw_mac_to_clks(ah, us);
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val = min(val, (u32) MS(0xFFFFFFFF, AR_TIME_OUT_ACK));
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REG_RMW_FIELD(ah, AR_TIME_OUT, AR_TIME_OUT_ACK, val);
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}
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static void ath9k_hw_set_cts_timeout(struct ath_hw *ah, u32 us)
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{
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u32 val = ath9k_hw_mac_to_clks(ah, us);
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val = min(val, (u32) MS(0xFFFFFFFF, AR_TIME_OUT_CTS));
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REG_RMW_FIELD(ah, AR_TIME_OUT, AR_TIME_OUT_CTS, val);
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}
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static bool ath9k_hw_set_global_txtimeout(struct ath_hw *ah, u32 tu)
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@ -1224,23 +1191,32 @@ static bool ath9k_hw_set_global_txtimeout(struct ath_hw *ah, u32 tu)
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}
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}
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static void ath9k_hw_init_user_settings(struct ath_hw *ah)
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void ath9k_hw_init_global_settings(struct ath_hw *ah)
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{
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struct ieee80211_conf *conf = &ath9k_hw_common(ah)->hw->conf;
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int acktimeout;
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int sifstime;
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ath_print(ath9k_hw_common(ah), ATH_DBG_RESET, "ah->misc_mode 0x%x\n",
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ah->misc_mode);
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if (ah->misc_mode != 0)
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REG_WRITE(ah, AR_PCU_MISC,
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REG_READ(ah, AR_PCU_MISC) | ah->misc_mode);
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if (ah->slottime != (u32) -1)
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ath9k_hw_setslottime(ah, ah->slottime);
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if (ah->acktimeout != (u32) -1)
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ath9k_hw_set_ack_timeout(ah, ah->acktimeout);
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if (ah->ctstimeout != (u32) -1)
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ath9k_hw_set_cts_timeout(ah, ah->ctstimeout);
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if (conf->channel && conf->channel->band == IEEE80211_BAND_5GHZ)
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sifstime = 16;
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else
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sifstime = 10;
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acktimeout = ah->slottime + sifstime;
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ath9k_hw_setslottime(ah, ah->slottime);
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ath9k_hw_set_ack_timeout(ah, acktimeout);
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ath9k_hw_set_cts_timeout(ah, acktimeout);
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if (ah->globaltxtimeout != (u32) -1)
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ath9k_hw_set_global_txtimeout(ah, ah->globaltxtimeout);
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}
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EXPORT_SYMBOL(ath9k_hw_init_global_settings);
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void ath9k_hw_deinit(struct ath_hw *ah)
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{
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@ -2061,7 +2037,7 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
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if (ah->caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
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ath9k_enable_rfkill(ah);
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ath9k_hw_init_user_settings(ah);
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ath9k_hw_init_global_settings(ah);
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if (AR_SREV_9287_12_OR_LATER(ah)) {
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REG_WRITE(ah, AR_D_GBL_IFS_SIFS,
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@ -3658,21 +3634,6 @@ u64 ath9k_hw_extend_tsf(struct ath_hw *ah, u32 rstamp)
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}
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EXPORT_SYMBOL(ath9k_hw_extend_tsf);
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bool ath9k_hw_setslottime(struct ath_hw *ah, u32 us)
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{
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if (us < ATH9K_SLOT_TIME_9 || us > ath9k_hw_mac_to_usec(ah, 0xffff)) {
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ath_print(ath9k_hw_common(ah), ATH_DBG_RESET,
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"bad slot time %u\n", us);
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ah->slottime = (u32) -1;
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return false;
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} else {
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REG_WRITE(ah, AR_D_GBL_IFS_SLOT, ath9k_hw_mac_to_clks(ah, us));
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ah->slottime = us;
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return true;
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}
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}
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EXPORT_SYMBOL(ath9k_hw_setslottime);
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void ath9k_hw_set11nmac2040(struct ath_hw *ah)
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{
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struct ieee80211_conf *conf = &ath9k_hw_common(ah)->hw->conf;
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@ -553,8 +553,6 @@ struct ath_hw {
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int16_t txpower_indexoffset;
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u32 beacon_interval;
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u32 slottime;
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u32 acktimeout;
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u32 ctstimeout;
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u32 globaltxtimeout;
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/* ANI */
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@ -668,7 +666,7 @@ void ath9k_hw_settsf64(struct ath_hw *ah, u64 tsf64);
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void ath9k_hw_reset_tsf(struct ath_hw *ah);
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void ath9k_hw_set_tsfadjust(struct ath_hw *ah, u32 setting);
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u64 ath9k_hw_extend_tsf(struct ath_hw *ah, u32 rstamp);
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bool ath9k_hw_setslottime(struct ath_hw *ah, u32 us);
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void ath9k_hw_init_global_settings(struct ath_hw *ah);
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void ath9k_hw_set11nmac2040(struct ath_hw *ah);
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void ath9k_hw_beaconinit(struct ath_hw *ah, u32 next_beacon, u32 beacon_period);
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void ath9k_hw_set_sta_beacon_timers(struct ath_hw *ah,
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@ -1789,6 +1789,7 @@ static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
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struct ath_hw *ah = sc->sc_ah;
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struct ath_common *common = ath9k_hw_common(ah);
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struct ath_vif *avp = (void *)vif->drv_priv;
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int slottime;
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int error;
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mutex_lock(&sc->mutex);
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@ -1824,6 +1825,25 @@ static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
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ath_beacon_config(sc, vif);
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}
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if (changed & BSS_CHANGED_ERP_SLOT) {
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if (bss_conf->use_short_slot)
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slottime = 9;
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else
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slottime = 20;
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if (vif->type == NL80211_IFTYPE_AP) {
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/*
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* Defer update, so that connected stations can adjust
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* their settings at the same time.
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* See beacon.c for more details
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*/
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sc->beacon.slottime = slottime;
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sc->beacon.updateslot = UPDATE;
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} else {
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ah->slottime = slottime;
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ath9k_hw_init_global_settings(ah);
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}
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}
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/* Disable transmission of beacons */
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if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
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ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
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