2006-09-14 01:24:59 +08:00
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/*
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* 7990.c -- LANCE ethernet IC generic routines.
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2005-04-17 06:20:36 +08:00
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* This is an attempt to separate out the bits of various ethernet
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2006-09-14 01:24:59 +08:00
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* drivers that are common because they all use the AMD 7990 LANCE
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2005-04-17 06:20:36 +08:00
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* (Local Area Network Controller for Ethernet) chip.
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*
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* Copyright (C) 05/1998 Peter Maydell <pmaydell@chiark.greenend.org.uk>
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*
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* Most of this stuff was obtained by looking at other LANCE drivers,
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* in particular a2065.[ch]. The AMD C-LANCE datasheet was also helpful.
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* NB: this was made easy by the fact that Jes Sorensen had cleaned up
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2006-09-14 01:24:59 +08:00
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* most of a2025 and sunlance with the aim of merging them, so the
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2005-04-17 06:20:36 +08:00
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* common code was pretty obvious.
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*/
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#include <linux/crc32.h>
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#include <linux/delay.h>
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#include <linux/errno.h>
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#include <linux/netdevice.h>
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#include <linux/etherdevice.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/fcntl.h>
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#include <linux/interrupt.h>
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#include <linux/ioport.h>
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#include <linux/in.h>
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#include <linux/route.h>
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#include <linux/slab.h>
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#include <linux/string.h>
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#include <linux/skbuff.h>
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2005-12-01 19:44:55 +08:00
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#include <asm/irq.h>
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2005-04-17 06:20:36 +08:00
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/* Used for the temporal inet entries and routing */
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#include <linux/socket.h>
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#include <linux/bitops.h>
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#include <asm/system.h>
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#include <asm/io.h>
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#include <asm/dma.h>
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#include <asm/pgtable.h>
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#ifdef CONFIG_HP300
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#include <asm/blinken.h>
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#endif
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#include "7990.h"
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#define WRITERAP(lp,x) out_be16(lp->base + LANCE_RAP, (x))
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#define WRITERDP(lp,x) out_be16(lp->base + LANCE_RDP, (x))
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#define READRDP(lp) in_be16(lp->base + LANCE_RDP)
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#if defined(CONFIG_HPLANCE) || defined(CONFIG_HPLANCE_MODULE)
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#include "hplance.h"
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#undef WRITERAP
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#undef WRITERDP
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#undef READRDP
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#if defined(CONFIG_MVME147_NET) || defined(CONFIG_MVME147_NET_MODULE)
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/* Lossage Factor Nine, Mr Sulu. */
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#define WRITERAP(lp,x) (lp->writerap(lp,x))
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#define WRITERDP(lp,x) (lp->writerdp(lp,x))
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#define READRDP(lp) (lp->readrdp(lp))
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#else
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/* These inlines can be used if only CONFIG_HPLANCE is defined */
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static inline void WRITERAP(struct lance_private *lp, __u16 value)
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{
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do {
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out_be16(lp->base + HPLANCE_REGOFF + LANCE_RAP, value);
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} while ((in_8(lp->base + HPLANCE_STATUS) & LE_ACK) == 0);
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}
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static inline void WRITERDP(struct lance_private *lp, __u16 value)
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{
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do {
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out_be16(lp->base + HPLANCE_REGOFF + LANCE_RDP, value);
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} while ((in_8(lp->base + HPLANCE_STATUS) & LE_ACK) == 0);
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}
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static inline __u16 READRDP(struct lance_private *lp)
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{
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__u16 value;
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do {
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value = in_be16(lp->base + HPLANCE_REGOFF + LANCE_RDP);
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} while ((in_8(lp->base + HPLANCE_STATUS) & LE_ACK) == 0);
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return value;
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}
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#endif
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#endif /* CONFIG_HPLANCE || CONFIG_HPLANCE_MODULE */
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/* debugging output macros, various flavours */
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/* #define TEST_HITS */
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#ifdef UNDEF
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#define PRINT_RINGS() \
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do { \
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int t; \
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for (t=0; t < RX_RING_SIZE; t++) { \
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printk("R%d: @(%02X %04X) len %04X, mblen %04X, bits %02X\n",\
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t, ib->brx_ring[t].rmd1_hadr, ib->brx_ring[t].rmd0,\
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ib->brx_ring[t].length,\
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ib->brx_ring[t].mblength, ib->brx_ring[t].rmd1_bits);\
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}\
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for (t=0; t < TX_RING_SIZE; t++) { \
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printk("T%d: @(%02X %04X) len %04X, misc %04X, bits %02X\n",\
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t, ib->btx_ring[t].tmd1_hadr, ib->btx_ring[t].tmd0,\
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ib->btx_ring[t].length,\
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ib->btx_ring[t].misc, ib->btx_ring[t].tmd1_bits);\
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}\
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2006-09-14 01:24:59 +08:00
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} while (0)
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2005-04-17 06:20:36 +08:00
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#else
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#define PRINT_RINGS()
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2006-09-14 01:24:59 +08:00
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#endif
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2005-04-17 06:20:36 +08:00
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/* Load the CSR registers. The LANCE has to be STOPped when we do this! */
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static void load_csrs (struct lance_private *lp)
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{
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volatile struct lance_init_block *aib = lp->lance_init_block;
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int leptr;
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leptr = LANCE_ADDR (aib);
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WRITERAP(lp, LE_CSR1); /* load address of init block */
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WRITERDP(lp, leptr & 0xFFFF);
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WRITERAP(lp, LE_CSR2);
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WRITERDP(lp, leptr >> 16);
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WRITERAP(lp, LE_CSR3);
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WRITERDP(lp, lp->busmaster_regval); /* set byteswap/ALEctrl/byte ctrl */
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/* Point back to csr0 */
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WRITERAP(lp, LE_CSR0);
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}
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/* #define to 0 or 1 appropriately */
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#define DEBUG_IRING 0
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/* Set up the Lance Rx and Tx rings and the init block */
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static void lance_init_ring (struct net_device *dev)
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{
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struct lance_private *lp = netdev_priv(dev);
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volatile struct lance_init_block *ib = lp->init_block;
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volatile struct lance_init_block *aib; /* for LANCE_ADDR computations */
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int leptr;
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int i;
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aib = lp->lance_init_block;
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lp->rx_new = lp->tx_new = 0;
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lp->rx_old = lp->tx_old = 0;
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ib->mode = LE_MO_PROM; /* normal, enable Tx & Rx */
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/* Copy the ethernet address to the lance init block
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* Notice that we do a byteswap if we're big endian.
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* [I think this is the right criterion; at least, sunlance,
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* a2065 and atarilance do the byteswap and lance.c (PC) doesn't.
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* However, the datasheet says that the BSWAP bit doesn't affect
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* the init block, so surely it should be low byte first for
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2006-09-14 01:24:59 +08:00
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* everybody? Um.]
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2005-04-17 06:20:36 +08:00
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* We could define the ib->physaddr as three 16bit values and
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* use (addr[1] << 8) | addr[0] & co, but this is more efficient.
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*/
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#ifdef __BIG_ENDIAN
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ib->phys_addr [0] = dev->dev_addr [1];
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ib->phys_addr [1] = dev->dev_addr [0];
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ib->phys_addr [2] = dev->dev_addr [3];
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ib->phys_addr [3] = dev->dev_addr [2];
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ib->phys_addr [4] = dev->dev_addr [5];
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ib->phys_addr [5] = dev->dev_addr [4];
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#else
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for (i=0; i<6; i++)
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ib->phys_addr[i] = dev->dev_addr[i];
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2006-09-14 01:24:59 +08:00
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#endif
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2005-04-17 06:20:36 +08:00
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if (DEBUG_IRING)
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printk ("TX rings:\n");
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2006-09-14 01:24:59 +08:00
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2005-04-17 06:20:36 +08:00
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lp->tx_full = 0;
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/* Setup the Tx ring entries */
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for (i = 0; i < (1<<lp->lance_log_tx_bufs); i++) {
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leptr = LANCE_ADDR(&aib->tx_buf[i][0]);
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ib->btx_ring [i].tmd0 = leptr;
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ib->btx_ring [i].tmd1_hadr = leptr >> 16;
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ib->btx_ring [i].tmd1_bits = 0;
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ib->btx_ring [i].length = 0xf000; /* The ones required by tmd2 */
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ib->btx_ring [i].misc = 0;
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2006-09-14 01:24:59 +08:00
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if (DEBUG_IRING)
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2005-04-17 06:20:36 +08:00
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printk ("%d: 0x%8.8x\n", i, leptr);
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}
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/* Setup the Rx ring entries */
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if (DEBUG_IRING)
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printk ("RX rings:\n");
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for (i = 0; i < (1<<lp->lance_log_rx_bufs); i++) {
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leptr = LANCE_ADDR(&aib->rx_buf[i][0]);
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ib->brx_ring [i].rmd0 = leptr;
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ib->brx_ring [i].rmd1_hadr = leptr >> 16;
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ib->brx_ring [i].rmd1_bits = LE_R1_OWN;
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/* 0xf000 == bits that must be one (reserved, presumably) */
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ib->brx_ring [i].length = -RX_BUFF_SIZE | 0xf000;
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ib->brx_ring [i].mblength = 0;
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if (DEBUG_IRING)
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printk ("%d: 0x%8.8x\n", i, leptr);
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}
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/* Setup the initialization block */
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2006-09-14 01:24:59 +08:00
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2005-04-17 06:20:36 +08:00
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/* Setup rx descriptor pointer */
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leptr = LANCE_ADDR(&aib->brx_ring);
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ib->rx_len = (lp->lance_log_rx_bufs << 13) | (leptr >> 16);
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ib->rx_ptr = leptr;
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if (DEBUG_IRING)
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printk ("RX ptr: %8.8x\n", leptr);
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2006-09-14 01:24:59 +08:00
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2005-04-17 06:20:36 +08:00
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/* Setup tx descriptor pointer */
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leptr = LANCE_ADDR(&aib->btx_ring);
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ib->tx_len = (lp->lance_log_tx_bufs << 13) | (leptr >> 16);
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ib->tx_ptr = leptr;
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if (DEBUG_IRING)
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printk ("TX ptr: %8.8x\n", leptr);
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/* Clear the multicast filter */
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ib->filter [0] = 0;
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ib->filter [1] = 0;
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PRINT_RINGS();
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}
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/* LANCE must be STOPped before we do this, too... */
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static int init_restart_lance (struct lance_private *lp)
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{
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int i;
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WRITERAP(lp, LE_CSR0);
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WRITERDP(lp, LE_C0_INIT);
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/* Need a hook here for sunlance ledma stuff */
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/* Wait for the lance to complete initialization */
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for (i = 0; (i < 100) && !(READRDP(lp) & (LE_C0_ERR | LE_C0_IDON)); i++)
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barrier();
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if ((i == 100) || (READRDP(lp) & LE_C0_ERR)) {
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printk ("LANCE unopened after %d ticks, csr0=%4.4x.\n", i, READRDP(lp));
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return -1;
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}
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/* Clear IDON by writing a "1", enable interrupts and start lance */
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WRITERDP(lp, LE_C0_IDON);
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WRITERDP(lp, LE_C0_INEA | LE_C0_STRT);
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return 0;
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}
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static int lance_reset (struct net_device *dev)
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{
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struct lance_private *lp = netdev_priv(dev);
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int status;
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2006-09-14 01:24:59 +08:00
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2005-04-17 06:20:36 +08:00
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/* Stop the lance */
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WRITERAP(lp, LE_CSR0);
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WRITERDP(lp, LE_C0_STOP);
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load_csrs (lp);
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lance_init_ring (dev);
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dev->trans_start = jiffies;
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status = init_restart_lance (lp);
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#ifdef DEBUG_DRIVER
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printk ("Lance restart=%d\n", status);
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#endif
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return status;
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}
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static int lance_rx (struct net_device *dev)
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{
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struct lance_private *lp = netdev_priv(dev);
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volatile struct lance_init_block *ib = lp->init_block;
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volatile struct lance_rx_desc *rd;
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unsigned char bits;
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#ifdef TEST_HITS
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int i;
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#endif
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#ifdef TEST_HITS
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printk ("[");
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for (i = 0; i < RX_RING_SIZE; i++) {
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if (i == lp->rx_new)
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printk ("%s",
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ib->brx_ring [i].rmd1_bits & LE_R1_OWN ? "_" : "X");
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else
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printk ("%s",
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ib->brx_ring [i].rmd1_bits & LE_R1_OWN ? "." : "1");
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}
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printk ("]");
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#endif
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#ifdef CONFIG_HP300
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blinken_leds(0x40, 0);
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2006-09-14 01:24:59 +08:00
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#endif
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2005-04-17 06:20:36 +08:00
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WRITERDP(lp, LE_C0_RINT | LE_C0_INEA); /* ack Rx int, reenable ints */
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for (rd = &ib->brx_ring [lp->rx_new]; /* For each Rx ring we own... */
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!((bits = rd->rmd1_bits) & LE_R1_OWN);
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rd = &ib->brx_ring [lp->rx_new]) {
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/* We got an incomplete frame? */
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if ((bits & LE_R1_POK) != LE_R1_POK) {
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2007-10-04 08:41:50 +08:00
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dev->stats.rx_over_errors++;
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dev->stats.rx_errors++;
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2005-04-17 06:20:36 +08:00
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continue;
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} else if (bits & LE_R1_ERR) {
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/* Count only the end frame as a rx error,
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* not the beginning
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*/
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2007-10-04 08:41:50 +08:00
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if (bits & LE_R1_BUF) dev->stats.rx_fifo_errors++;
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if (bits & LE_R1_CRC) dev->stats.rx_crc_errors++;
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if (bits & LE_R1_OFL) dev->stats.rx_over_errors++;
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if (bits & LE_R1_FRA) dev->stats.rx_frame_errors++;
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if (bits & LE_R1_EOP) dev->stats.rx_errors++;
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2005-04-17 06:20:36 +08:00
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|
|
} else {
|
2008-01-24 18:06:46 +08:00
|
|
|
int len = (rd->mblength & 0xfff) - 4;
|
|
|
|
struct sk_buff *skb = dev_alloc_skb (len+2);
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2008-01-24 18:06:46 +08:00
|
|
|
if (!skb) {
|
2005-04-17 06:20:36 +08:00
|
|
|
printk ("%s: Memory squeeze, deferring packet.\n",
|
|
|
|
dev->name);
|
2007-10-04 08:41:50 +08:00
|
|
|
dev->stats.rx_dropped++;
|
2005-04-17 06:20:36 +08:00
|
|
|
rd->mblength = 0;
|
|
|
|
rd->rmd1_bits = LE_R1_OWN;
|
|
|
|
lp->rx_new = (lp->rx_new + 1) & lp->rx_ring_mod_mask;
|
|
|
|
return 0;
|
|
|
|
}
|
2006-09-14 01:24:59 +08:00
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
skb_reserve (skb, 2); /* 16 byte align */
|
|
|
|
skb_put (skb, len); /* make room */
|
2007-07-11 13:08:12 +08:00
|
|
|
skb_copy_to_linear_data(skb,
|
2005-04-17 06:20:36 +08:00
|
|
|
(unsigned char *)&(ib->rx_buf [lp->rx_new][0]),
|
2007-07-11 13:08:12 +08:00
|
|
|
len);
|
2005-04-17 06:20:36 +08:00
|
|
|
skb->protocol = eth_type_trans (skb, dev);
|
|
|
|
netif_rx (skb);
|
|
|
|
dev->last_rx = jiffies;
|
2007-10-04 08:41:50 +08:00
|
|
|
dev->stats.rx_packets++;
|
|
|
|
dev->stats.rx_bytes += len;
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Return the packet to the pool */
|
|
|
|
rd->mblength = 0;
|
|
|
|
rd->rmd1_bits = LE_R1_OWN;
|
|
|
|
lp->rx_new = (lp->rx_new + 1) & lp->rx_ring_mod_mask;
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int lance_tx (struct net_device *dev)
|
|
|
|
{
|
|
|
|
struct lance_private *lp = netdev_priv(dev);
|
|
|
|
volatile struct lance_init_block *ib = lp->init_block;
|
|
|
|
volatile struct lance_tx_desc *td;
|
|
|
|
int i, j;
|
|
|
|
int status;
|
|
|
|
|
|
|
|
#ifdef CONFIG_HP300
|
|
|
|
blinken_leds(0x80, 0);
|
|
|
|
#endif
|
|
|
|
/* csr0 is 2f3 */
|
|
|
|
WRITERDP(lp, LE_C0_TINT | LE_C0_INEA);
|
|
|
|
/* csr0 is 73 */
|
|
|
|
|
|
|
|
j = lp->tx_old;
|
|
|
|
for (i = j; i != lp->tx_new; i = j) {
|
|
|
|
td = &ib->btx_ring [i];
|
|
|
|
|
|
|
|
/* If we hit a packet not owned by us, stop */
|
|
|
|
if (td->tmd1_bits & LE_T1_OWN)
|
|
|
|
break;
|
2006-09-14 01:24:59 +08:00
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
if (td->tmd1_bits & LE_T1_ERR) {
|
|
|
|
status = td->misc;
|
2006-09-14 01:24:59 +08:00
|
|
|
|
2007-10-04 08:41:50 +08:00
|
|
|
dev->stats.tx_errors++;
|
|
|
|
if (status & LE_T3_RTY) dev->stats.tx_aborted_errors++;
|
|
|
|
if (status & LE_T3_LCOL) dev->stats.tx_window_errors++;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
if (status & LE_T3_CLOS) {
|
2007-10-04 08:41:50 +08:00
|
|
|
dev->stats.tx_carrier_errors++;
|
2005-04-17 06:20:36 +08:00
|
|
|
if (lp->auto_select) {
|
|
|
|
lp->tpe = 1 - lp->tpe;
|
|
|
|
printk("%s: Carrier Lost, trying %s\n",
|
|
|
|
dev->name, lp->tpe?"TPE":"AUI");
|
|
|
|
/* Stop the lance */
|
|
|
|
WRITERAP(lp, LE_CSR0);
|
|
|
|
WRITERDP(lp, LE_C0_STOP);
|
|
|
|
lance_init_ring (dev);
|
|
|
|
load_csrs (lp);
|
|
|
|
init_restart_lance (lp);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* buffer errors and underflows turn off the transmitter */
|
|
|
|
/* Restart the adapter */
|
|
|
|
if (status & (LE_T3_BUF|LE_T3_UFL)) {
|
2007-10-04 08:41:50 +08:00
|
|
|
dev->stats.tx_fifo_errors++;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
printk ("%s: Tx: ERR_BUF|ERR_UFL, restarting\n",
|
|
|
|
dev->name);
|
|
|
|
/* Stop the lance */
|
|
|
|
WRITERAP(lp, LE_CSR0);
|
|
|
|
WRITERDP(lp, LE_C0_STOP);
|
|
|
|
lance_init_ring (dev);
|
|
|
|
load_csrs (lp);
|
|
|
|
init_restart_lance (lp);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
} else if ((td->tmd1_bits & LE_T1_POK) == LE_T1_POK) {
|
|
|
|
/*
|
|
|
|
* So we don't count the packet more than once.
|
|
|
|
*/
|
|
|
|
td->tmd1_bits &= ~(LE_T1_POK);
|
|
|
|
|
|
|
|
/* One collision before packet was sent. */
|
|
|
|
if (td->tmd1_bits & LE_T1_EONE)
|
2007-10-04 08:41:50 +08:00
|
|
|
dev->stats.collisions++;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
/* More than one collision, be optimistic. */
|
|
|
|
if (td->tmd1_bits & LE_T1_EMORE)
|
2007-10-04 08:41:50 +08:00
|
|
|
dev->stats.collisions += 2;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2007-10-04 08:41:50 +08:00
|
|
|
dev->stats.tx_packets++;
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
2006-09-14 01:24:59 +08:00
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
j = (j + 1) & lp->tx_ring_mod_mask;
|
|
|
|
}
|
|
|
|
lp->tx_old = j;
|
|
|
|
WRITERDP(lp, LE_C0_TINT | LE_C0_INEA);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static irqreturn_t
|
IRQ: Maintain regs pointer globally rather than passing to IRQ handlers
Maintain a per-CPU global "struct pt_regs *" variable which can be used instead
of passing regs around manually through all ~1800 interrupt handlers in the
Linux kernel.
The regs pointer is used in few places, but it potentially costs both stack
space and code to pass it around. On the FRV arch, removing the regs parameter
from all the genirq function results in a 20% speed up of the IRQ exit path
(ie: from leaving timer_interrupt() to leaving do_IRQ()).
Where appropriate, an arch may override the generic storage facility and do
something different with the variable. On FRV, for instance, the address is
maintained in GR28 at all times inside the kernel as part of general exception
handling.
Having looked over the code, it appears that the parameter may be handed down
through up to twenty or so layers of functions. Consider a USB character
device attached to a USB hub, attached to a USB controller that posts its
interrupts through a cascaded auxiliary interrupt controller. A character
device driver may want to pass regs to the sysrq handler through the input
layer which adds another few layers of parameter passing.
I've build this code with allyesconfig for x86_64 and i386. I've runtested the
main part of the code on FRV and i386, though I can't test most of the drivers.
I've also done partial conversion for powerpc and MIPS - these at least compile
with minimal configurations.
This will affect all archs. Mostly the changes should be relatively easy.
Take do_IRQ(), store the regs pointer at the beginning, saving the old one:
struct pt_regs *old_regs = set_irq_regs(regs);
And put the old one back at the end:
set_irq_regs(old_regs);
Don't pass regs through to generic_handle_irq() or __do_IRQ().
In timer_interrupt(), this sort of change will be necessary:
- update_process_times(user_mode(regs));
- profile_tick(CPU_PROFILING, regs);
+ update_process_times(user_mode(get_irq_regs()));
+ profile_tick(CPU_PROFILING);
I'd like to move update_process_times()'s use of get_irq_regs() into itself,
except that i386, alone of the archs, uses something other than user_mode().
Some notes on the interrupt handling in the drivers:
(*) input_dev() is now gone entirely. The regs pointer is no longer stored in
the input_dev struct.
(*) finish_unlinks() in drivers/usb/host/ohci-q.c needs checking. It does
something different depending on whether it's been supplied with a regs
pointer or not.
(*) Various IRQ handler function pointers have been moved to type
irq_handler_t.
Signed-Off-By: David Howells <dhowells@redhat.com>
(cherry picked from 1b16e7ac850969f38b375e511e3fa2f474a33867 commit)
2006-10-05 21:55:46 +08:00
|
|
|
lance_interrupt (int irq, void *dev_id)
|
2005-04-17 06:20:36 +08:00
|
|
|
{
|
|
|
|
struct net_device *dev = (struct net_device *)dev_id;
|
|
|
|
struct lance_private *lp = netdev_priv(dev);
|
|
|
|
int csr0;
|
|
|
|
|
|
|
|
spin_lock (&lp->devlock);
|
|
|
|
|
|
|
|
WRITERAP(lp, LE_CSR0); /* LANCE Controller Status */
|
|
|
|
csr0 = READRDP(lp);
|
|
|
|
|
|
|
|
PRINT_RINGS();
|
2006-09-14 01:24:59 +08:00
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
if (!(csr0 & LE_C0_INTR)) { /* Check if any interrupt has */
|
|
|
|
spin_unlock (&lp->devlock);
|
|
|
|
return IRQ_NONE; /* been generated by the Lance. */
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Acknowledge all the interrupt sources ASAP */
|
|
|
|
WRITERDP(lp, csr0 & ~(LE_C0_INEA|LE_C0_TDMD|LE_C0_STOP|LE_C0_STRT|LE_C0_INIT));
|
|
|
|
|
|
|
|
if ((csr0 & LE_C0_ERR)) {
|
|
|
|
/* Clear the error condition */
|
|
|
|
WRITERDP(lp, LE_C0_BABL|LE_C0_ERR|LE_C0_MISS|LE_C0_INEA);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (csr0 & LE_C0_RINT)
|
|
|
|
lance_rx (dev);
|
|
|
|
|
|
|
|
if (csr0 & LE_C0_TINT)
|
|
|
|
lance_tx (dev);
|
|
|
|
|
|
|
|
/* Log misc errors. */
|
|
|
|
if (csr0 & LE_C0_BABL)
|
2007-10-04 08:41:50 +08:00
|
|
|
dev->stats.tx_errors++; /* Tx babble. */
|
2005-04-17 06:20:36 +08:00
|
|
|
if (csr0 & LE_C0_MISS)
|
2007-10-04 08:41:50 +08:00
|
|
|
dev->stats.rx_errors++; /* Missed a Rx frame. */
|
2005-04-17 06:20:36 +08:00
|
|
|
if (csr0 & LE_C0_MERR) {
|
2006-09-14 01:24:59 +08:00
|
|
|
printk("%s: Bus master arbitration failure, status %4.4x.\n",
|
2005-04-17 06:20:36 +08:00
|
|
|
dev->name, csr0);
|
|
|
|
/* Restart the chip. */
|
|
|
|
WRITERDP(lp, LE_C0_STRT);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (lp->tx_full && netif_queue_stopped(dev) && (TX_BUFFS_AVAIL >= 0)) {
|
|
|
|
lp->tx_full = 0;
|
|
|
|
netif_wake_queue (dev);
|
|
|
|
}
|
2006-09-14 01:24:59 +08:00
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
WRITERAP(lp, LE_CSR0);
|
|
|
|
WRITERDP(lp, LE_C0_BABL|LE_C0_CERR|LE_C0_MISS|LE_C0_MERR|LE_C0_IDON|LE_C0_INEA);
|
|
|
|
|
|
|
|
spin_unlock (&lp->devlock);
|
|
|
|
return IRQ_HANDLED;
|
|
|
|
}
|
|
|
|
|
|
|
|
int lance_open (struct net_device *dev)
|
|
|
|
{
|
|
|
|
struct lance_private *lp = netdev_priv(dev);
|
|
|
|
int res;
|
2006-09-14 01:24:59 +08:00
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
/* Install the Interrupt handler. Or we could shunt this out to specific drivers? */
|
2007-02-14 16:33:16 +08:00
|
|
|
if (request_irq(lp->irq, lance_interrupt, IRQF_SHARED, lp->name, dev))
|
2005-04-17 06:20:36 +08:00
|
|
|
return -EAGAIN;
|
|
|
|
|
|
|
|
res = lance_reset(dev);
|
|
|
|
spin_lock_init(&lp->devlock);
|
|
|
|
netif_start_queue (dev);
|
|
|
|
|
|
|
|
return res;
|
|
|
|
}
|
|
|
|
|
|
|
|
int lance_close (struct net_device *dev)
|
|
|
|
{
|
|
|
|
struct lance_private *lp = netdev_priv(dev);
|
2006-09-14 01:24:59 +08:00
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
netif_stop_queue (dev);
|
|
|
|
|
|
|
|
/* Stop the LANCE */
|
|
|
|
WRITERAP(lp, LE_CSR0);
|
|
|
|
WRITERDP(lp, LE_C0_STOP);
|
|
|
|
|
|
|
|
free_irq(lp->irq, dev);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
void lance_tx_timeout(struct net_device *dev)
|
|
|
|
{
|
|
|
|
printk("lance_tx_timeout\n");
|
|
|
|
lance_reset(dev);
|
|
|
|
dev->trans_start = jiffies;
|
|
|
|
netif_wake_queue (dev);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
int lance_start_xmit (struct sk_buff *skb, struct net_device *dev)
|
|
|
|
{
|
|
|
|
struct lance_private *lp = netdev_priv(dev);
|
|
|
|
volatile struct lance_init_block *ib = lp->init_block;
|
|
|
|
int entry, skblen, len;
|
|
|
|
static int outs;
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
if (!TX_BUFFS_AVAIL)
|
|
|
|
return -1;
|
|
|
|
|
|
|
|
netif_stop_queue (dev);
|
|
|
|
|
|
|
|
skblen = skb->len;
|
|
|
|
|
|
|
|
#ifdef DEBUG_DRIVER
|
|
|
|
/* dump the packet */
|
|
|
|
{
|
|
|
|
int i;
|
2006-09-14 01:24:59 +08:00
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
for (i = 0; i < 64; i++) {
|
|
|
|
if ((i % 16) == 0)
|
|
|
|
printk ("\n");
|
|
|
|
printk ("%2.2x ", skb->data [i]);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
len = (skblen <= ETH_ZLEN) ? ETH_ZLEN : skblen;
|
|
|
|
entry = lp->tx_new & lp->tx_ring_mod_mask;
|
|
|
|
ib->btx_ring [entry].length = (-len) | 0xf000;
|
|
|
|
ib->btx_ring [entry].misc = 0;
|
2006-09-14 01:24:59 +08:00
|
|
|
|
2007-05-02 04:33:05 +08:00
|
|
|
if (skb->len < ETH_ZLEN)
|
|
|
|
memset((void *)&ib->tx_buf[entry][0], 0, ETH_ZLEN);
|
|
|
|
skb_copy_from_linear_data(skb, (void *)&ib->tx_buf[entry][0], skblen);
|
2006-09-14 01:24:59 +08:00
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
/* Now, give the packet to the lance */
|
|
|
|
ib->btx_ring [entry].tmd1_bits = (LE_T1_POK|LE_T1_OWN);
|
|
|
|
lp->tx_new = (lp->tx_new+1) & lp->tx_ring_mod_mask;
|
|
|
|
|
|
|
|
outs++;
|
|
|
|
/* Kick the lance: transmit now */
|
|
|
|
WRITERDP(lp, LE_C0_INEA | LE_C0_TDMD);
|
|
|
|
dev->trans_start = jiffies;
|
|
|
|
dev_kfree_skb (skb);
|
2006-09-14 01:24:59 +08:00
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
spin_lock_irqsave (&lp->devlock, flags);
|
|
|
|
if (TX_BUFFS_AVAIL)
|
|
|
|
netif_start_queue (dev);
|
|
|
|
else
|
|
|
|
lp->tx_full = 1;
|
|
|
|
spin_unlock_irqrestore (&lp->devlock, flags);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* taken from the depca driver via a2065.c */
|
|
|
|
static void lance_load_multicast (struct net_device *dev)
|
|
|
|
{
|
|
|
|
struct lance_private *lp = netdev_priv(dev);
|
|
|
|
volatile struct lance_init_block *ib = lp->init_block;
|
|
|
|
volatile u16 *mcast_table = (u16 *)&ib->filter;
|
|
|
|
struct dev_mc_list *dmi=dev->mc_list;
|
|
|
|
char *addrs;
|
|
|
|
int i;
|
|
|
|
u32 crc;
|
2006-09-14 01:24:59 +08:00
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
/* set all multicast bits */
|
2006-09-14 01:24:59 +08:00
|
|
|
if (dev->flags & IFF_ALLMULTI){
|
2005-04-17 06:20:36 +08:00
|
|
|
ib->filter [0] = 0xffffffff;
|
|
|
|
ib->filter [1] = 0xffffffff;
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
/* clear the multicast filter */
|
|
|
|
ib->filter [0] = 0;
|
|
|
|
ib->filter [1] = 0;
|
|
|
|
|
|
|
|
/* Add addresses */
|
|
|
|
for (i = 0; i < dev->mc_count; i++){
|
|
|
|
addrs = dmi->dmi_addr;
|
|
|
|
dmi = dmi->next;
|
|
|
|
|
|
|
|
/* multicast address? */
|
|
|
|
if (!(*addrs & 1))
|
|
|
|
continue;
|
2006-09-14 01:24:59 +08:00
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
crc = ether_crc_le(6, addrs);
|
|
|
|
crc = crc >> 26;
|
|
|
|
mcast_table [crc >> 4] |= 1 << (crc & 0xf);
|
|
|
|
}
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
void lance_set_multicast (struct net_device *dev)
|
|
|
|
{
|
|
|
|
struct lance_private *lp = netdev_priv(dev);
|
|
|
|
volatile struct lance_init_block *ib = lp->init_block;
|
|
|
|
int stopped;
|
|
|
|
|
|
|
|
stopped = netif_queue_stopped(dev);
|
|
|
|
if (!stopped)
|
|
|
|
netif_stop_queue (dev);
|
|
|
|
|
|
|
|
while (lp->tx_old != lp->tx_new)
|
|
|
|
schedule();
|
|
|
|
|
|
|
|
WRITERAP(lp, LE_CSR0);
|
|
|
|
WRITERDP(lp, LE_C0_STOP);
|
|
|
|
lance_init_ring (dev);
|
|
|
|
|
|
|
|
if (dev->flags & IFF_PROMISC) {
|
|
|
|
ib->mode |= LE_MO_PROM;
|
|
|
|
} else {
|
|
|
|
ib->mode &= ~LE_MO_PROM;
|
|
|
|
lance_load_multicast (dev);
|
|
|
|
}
|
|
|
|
load_csrs (lp);
|
|
|
|
init_restart_lance (lp);
|
|
|
|
|
|
|
|
if (!stopped)
|
|
|
|
netif_start_queue (dev);
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef CONFIG_NET_POLL_CONTROLLER
|
|
|
|
void lance_poll(struct net_device *dev)
|
|
|
|
{
|
|
|
|
struct lance_private *lp = netdev_priv(dev);
|
|
|
|
|
|
|
|
spin_lock (&lp->devlock);
|
|
|
|
WRITERAP(lp, LE_CSR0);
|
|
|
|
WRITERDP(lp, LE_C0_STRT);
|
|
|
|
spin_unlock (&lp->devlock);
|
2006-10-07 21:16:45 +08:00
|
|
|
lance_interrupt(dev->irq, dev);
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
MODULE_LICENSE("GPL");
|