License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.
By default all files without license information are under the default
license of the kernel, which is GPL version 2.
Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier. The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.
This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.
How this work was done:
Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
- file had no licensing information it it.
- file was a */uapi/* one with no licensing information in it,
- file was a */uapi/* one with existing licensing information,
Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.
The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne. Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.
The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed. Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.
Criteria used to select files for SPDX license identifier tagging was:
- Files considered eligible had to be source code files.
- Make and config files were included as candidates if they contained >5
lines of source
- File already had some variant of a license header in it (even if <5
lines).
All documentation files were explicitly excluded.
The following heuristics were used to determine which SPDX license
identifiers to apply.
- when both scanners couldn't find any license traces, file was
considered to have no license information in it, and the top level
COPYING file license applied.
For non */uapi/* files that summary was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 11139
and resulted in the first patch in this series.
If that file was a */uapi/* path one, it was "GPL-2.0 WITH
Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 WITH Linux-syscall-note 930
and resulted in the second patch in this series.
- if a file had some form of licensing information in it, and was one
of the */uapi/* ones, it was denoted with the Linux-syscall-note if
any GPL family license was found in the file or had no licensing in
it (per prior point). Results summary:
SPDX license identifier # files
---------------------------------------------------|------
GPL-2.0 WITH Linux-syscall-note 270
GPL-2.0+ WITH Linux-syscall-note 169
((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21
((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17
LGPL-2.1+ WITH Linux-syscall-note 15
GPL-1.0+ WITH Linux-syscall-note 14
((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5
LGPL-2.0+ WITH Linux-syscall-note 4
LGPL-2.1 WITH Linux-syscall-note 3
((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3
((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1
and that resulted in the third patch in this series.
- when the two scanners agreed on the detected license(s), that became
the concluded license(s).
- when there was disagreement between the two scanners (one detected a
license but the other didn't, or they both detected different
licenses) a manual inspection of the file occurred.
- In most cases a manual inspection of the information in the file
resulted in a clear resolution of the license that should apply (and
which scanner probably needed to revisit its heuristics).
- When it was not immediately clear, the license identifier was
confirmed with lawyers working with the Linux Foundation.
- If there was any question as to the appropriate license identifier,
the file was flagged for further research and to be revisited later
in time.
In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.
Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights. The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.
Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.
In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.
Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
- a full scancode scan run, collecting the matched texts, detected
license ids and scores
- reviewing anything where there was a license detected (about 500+
files) to ensure that the applied SPDX license was correct
- reviewing anything where there was no detection but the patch license
was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
SPDX license was correct
This produced a worksheet with 20 files needing minor correction. This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.
These .csv files were then reviewed by Greg. Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected. This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.) Finally Greg ran the script using the .csv files to
generate the patches.
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-01 22:07:57 +08:00
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// SPDX-License-Identifier: GPL-2.0
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2005-04-17 06:20:36 +08:00
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/*
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2013-10-12 07:29:46 +08:00
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* Routines to identify caches on Intel CPU.
|
2005-04-17 06:20:36 +08:00
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*
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2008-07-28 22:20:08 +08:00
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* Changes:
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* Venkatesh Pallipadi : Adding cache identification through cpuid(4)
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2009-07-04 07:35:45 +08:00
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* Ashok Raj <ashok.raj@intel.com>: Work with CPU hotplug infrastructure.
|
2007-07-21 23:10:03 +08:00
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* Andi Kleen / Andreas Herrmann : CPUID4 emulation on AMD.
|
2005-04-17 06:20:36 +08:00
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*/
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#include <linux/slab.h>
|
2015-03-04 20:00:16 +08:00
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#include <linux/cacheinfo.h>
|
2005-04-17 06:20:36 +08:00
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#include <linux/cpu.h>
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2005-10-31 07:03:48 +08:00
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#include <linux/sched.h>
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2017-02-03 00:54:15 +08:00
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#include <linux/capability.h>
|
2015-03-04 20:00:16 +08:00
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#include <linux/sysfs.h>
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2008-07-23 02:06:02 +08:00
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#include <linux/pci.h>
|
2005-04-17 06:20:36 +08:00
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2016-01-27 05:12:04 +08:00
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#include <asm/cpufeature.h>
|
2010-09-18 00:03:43 +08:00
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#include <asm/amd_nb.h>
|
2010-01-22 23:01:05 +08:00
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#include <asm/smp.h>
|
2005-04-17 06:20:36 +08:00
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#define LVL_1_INST 1
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#define LVL_1_DATA 2
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#define LVL_2 3
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#define LVL_3 4
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#define LVL_TRACE 5
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|
2009-07-04 07:35:45 +08:00
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struct _cache_table {
|
2005-04-17 06:20:36 +08:00
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unsigned char descriptor;
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char cache_type;
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short size;
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};
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|
2010-01-04 22:47:35 +08:00
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#define MB(x) ((x) * 1024)
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|
2009-07-04 07:35:45 +08:00
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/* All the cache descriptor types we care about (no TLB or
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trace cache entries) */
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x86: delete __cpuinit usage from all x86 files
The __cpuinit type of throwaway sections might have made sense
some time ago when RAM was more constrained, but now the savings
do not offset the cost and complications. For example, the fix in
commit 5e427ec2d0 ("x86: Fix bit corruption at CPU resume time")
is a good example of the nasty type of bugs that can be created
with improper use of the various __init prefixes.
After a discussion on LKML[1] it was decided that cpuinit should go
the way of devinit and be phased out. Once all the users are gone,
we can then finally remove the macros themselves from linux/init.h.
Note that some harmless section mismatch warnings may result, since
notify_cpu_starting() and cpu_up() are arch independent (kernel/cpu.c)
are flagged as __cpuinit -- so if we remove the __cpuinit from
arch specific callers, we will also get section mismatch warnings.
As an intermediate step, we intend to turn the linux/init.h cpuinit
content into no-ops as early as possible, since that will get rid
of these warnings. In any case, they are temporary and harmless.
This removes all the arch/x86 uses of the __cpuinit macros from
all C files. x86 only had the one __CPUINIT used in assembly files,
and it wasn't paired off with a .previous or a __FINIT, so we can
delete it directly w/o any corresponding additional change there.
[1] https://lkml.org/lkml/2013/5/20/589
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: x86@kernel.org
Acked-by: Ingo Molnar <mingo@kernel.org>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: H. Peter Anvin <hpa@linux.intel.com>
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
2013-06-19 06:23:59 +08:00
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|
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static const struct _cache_table cache_table[] =
|
2005-04-17 06:20:36 +08:00
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{
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{ 0x06, LVL_1_INST, 8 }, /* 4-way set assoc, 32 byte line size */
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{ 0x08, LVL_1_INST, 16 }, /* 4-way set assoc, 32 byte line size */
|
2009-02-01 09:12:14 +08:00
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{ 0x09, LVL_1_INST, 32 }, /* 4-way set assoc, 64 byte line size */
|
2005-04-17 06:20:36 +08:00
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{ 0x0a, LVL_1_DATA, 8 }, /* 2 way set assoc, 32 byte line size */
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{ 0x0c, LVL_1_DATA, 16 }, /* 4-way set assoc, 32 byte line size */
|
2009-02-01 09:12:14 +08:00
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{ 0x0d, LVL_1_DATA, 16 }, /* 4-way set assoc, 64 byte line size */
|
2011-01-20 09:20:56 +08:00
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{ 0x0e, LVL_1_DATA, 24 }, /* 6-way set assoc, 64 byte line size */
|
2009-02-01 09:12:14 +08:00
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{ 0x21, LVL_2, 256 }, /* 8-way set assoc, 64 byte line size */
|
2005-04-17 06:20:36 +08:00
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{ 0x22, LVL_3, 512 }, /* 4-way set assoc, sectored cache, 64 byte line size */
|
2010-01-04 22:47:35 +08:00
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{ 0x23, LVL_3, MB(1) }, /* 8-way set assoc, sectored cache, 64 byte line size */
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{ 0x25, LVL_3, MB(2) }, /* 8-way set assoc, sectored cache, 64 byte line size */
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{ 0x29, LVL_3, MB(4) }, /* 8-way set assoc, sectored cache, 64 byte line size */
|
2005-04-17 06:20:36 +08:00
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{ 0x2c, LVL_1_DATA, 32 }, /* 8-way set assoc, 64 byte line size */
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{ 0x30, LVL_1_INST, 32 }, /* 8-way set assoc, 64 byte line size */
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{ 0x39, LVL_2, 128 }, /* 4-way set assoc, sectored cache, 64 byte line size */
|
2006-01-27 14:40:40 +08:00
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{ 0x3a, LVL_2, 192 }, /* 6-way set assoc, sectored cache, 64 byte line size */
|
2005-04-17 06:20:36 +08:00
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{ 0x3b, LVL_2, 128 }, /* 2-way set assoc, sectored cache, 64 byte line size */
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{ 0x3c, LVL_2, 256 }, /* 4-way set assoc, sectored cache, 64 byte line size */
|
2006-01-27 14:40:40 +08:00
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{ 0x3d, LVL_2, 384 }, /* 6-way set assoc, sectored cache, 64 byte line size */
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{ 0x3e, LVL_2, 512 }, /* 4-way set assoc, sectored cache, 64 byte line size */
|
2007-12-21 08:27:19 +08:00
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{ 0x3f, LVL_2, 256 }, /* 2-way set assoc, 64 byte line size */
|
2005-04-17 06:20:36 +08:00
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{ 0x41, LVL_2, 128 }, /* 4-way set assoc, 32 byte line size */
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{ 0x42, LVL_2, 256 }, /* 4-way set assoc, 32 byte line size */
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{ 0x43, LVL_2, 512 }, /* 4-way set assoc, 32 byte line size */
|
2010-01-04 22:47:35 +08:00
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{ 0x44, LVL_2, MB(1) }, /* 4-way set assoc, 32 byte line size */
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{ 0x45, LVL_2, MB(2) }, /* 4-way set assoc, 32 byte line size */
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{ 0x46, LVL_3, MB(4) }, /* 4-way set assoc, 64 byte line size */
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{ 0x47, LVL_3, MB(8) }, /* 8-way set assoc, 64 byte line size */
|
2011-01-20 09:20:56 +08:00
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{ 0x48, LVL_2, MB(3) }, /* 12-way set assoc, 64 byte line size */
|
2010-01-04 22:47:35 +08:00
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{ 0x49, LVL_3, MB(4) }, /* 16-way set assoc, 64 byte line size */
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{ 0x4a, LVL_3, MB(6) }, /* 12-way set assoc, 64 byte line size */
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{ 0x4b, LVL_3, MB(8) }, /* 16-way set assoc, 64 byte line size */
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{ 0x4c, LVL_3, MB(12) }, /* 12-way set assoc, 64 byte line size */
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{ 0x4d, LVL_3, MB(16) }, /* 16-way set assoc, 64 byte line size */
|
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{ 0x4e, LVL_2, MB(6) }, /* 24-way set assoc, 64 byte line size */
|
2005-04-17 06:20:36 +08:00
|
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{ 0x60, LVL_1_DATA, 16 }, /* 8-way set assoc, sectored cache, 64 byte line size */
|
|
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{ 0x66, LVL_1_DATA, 8 }, /* 4-way set assoc, sectored cache, 64 byte line size */
|
|
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{ 0x67, LVL_1_DATA, 16 }, /* 4-way set assoc, sectored cache, 64 byte line size */
|
|
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{ 0x68, LVL_1_DATA, 32 }, /* 4-way set assoc, sectored cache, 64 byte line size */
|
|
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{ 0x70, LVL_TRACE, 12 }, /* 8-way set assoc */
|
|
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{ 0x71, LVL_TRACE, 16 }, /* 8-way set assoc */
|
|
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|
|
{ 0x72, LVL_TRACE, 32 }, /* 8-way set assoc */
|
2006-01-27 14:40:40 +08:00
|
|
|
{ 0x73, LVL_TRACE, 64 }, /* 8-way set assoc */
|
2010-01-04 22:47:35 +08:00
|
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{ 0x78, LVL_2, MB(1) }, /* 4-way set assoc, 64 byte line size */
|
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{ 0x79, LVL_2, 128 }, /* 8-way set assoc, sectored cache, 64 byte line size */
|
|
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{ 0x7a, LVL_2, 256 }, /* 8-way set assoc, sectored cache, 64 byte line size */
|
|
|
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{ 0x7b, LVL_2, 512 }, /* 8-way set assoc, sectored cache, 64 byte line size */
|
|
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{ 0x7c, LVL_2, MB(1) }, /* 8-way set assoc, sectored cache, 64 byte line size */
|
|
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{ 0x7d, LVL_2, MB(2) }, /* 8-way set assoc, 64 byte line size */
|
|
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{ 0x7f, LVL_2, 512 }, /* 2-way set assoc, 64 byte line size */
|
2011-01-20 09:20:56 +08:00
|
|
|
{ 0x80, LVL_2, 512 }, /* 8-way set assoc, 64 byte line size */
|
2010-01-04 22:47:35 +08:00
|
|
|
{ 0x82, LVL_2, 256 }, /* 8-way set assoc, 32 byte line size */
|
|
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{ 0x83, LVL_2, 512 }, /* 8-way set assoc, 32 byte line size */
|
|
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{ 0x84, LVL_2, MB(1) }, /* 8-way set assoc, 32 byte line size */
|
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{ 0x85, LVL_2, MB(2) }, /* 8-way set assoc, 32 byte line size */
|
|
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{ 0x86, LVL_2, 512 }, /* 4-way set assoc, 64 byte line size */
|
|
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{ 0x87, LVL_2, MB(1) }, /* 8-way set assoc, 64 byte line size */
|
|
|
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{ 0xd0, LVL_3, 512 }, /* 4-way set assoc, 64 byte line size */
|
|
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{ 0xd1, LVL_3, MB(1) }, /* 4-way set assoc, 64 byte line size */
|
|
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{ 0xd2, LVL_3, MB(2) }, /* 4-way set assoc, 64 byte line size */
|
|
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{ 0xd6, LVL_3, MB(1) }, /* 8-way set assoc, 64 byte line size */
|
|
|
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{ 0xd7, LVL_3, MB(2) }, /* 8-way set assoc, 64 byte line size */
|
|
|
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{ 0xd8, LVL_3, MB(4) }, /* 12-way set assoc, 64 byte line size */
|
|
|
|
|
{ 0xdc, LVL_3, MB(2) }, /* 12-way set assoc, 64 byte line size */
|
|
|
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{ 0xdd, LVL_3, MB(4) }, /* 12-way set assoc, 64 byte line size */
|
|
|
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{ 0xde, LVL_3, MB(8) }, /* 12-way set assoc, 64 byte line size */
|
|
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{ 0xe2, LVL_3, MB(2) }, /* 16-way set assoc, 64 byte line size */
|
|
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{ 0xe3, LVL_3, MB(4) }, /* 16-way set assoc, 64 byte line size */
|
|
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{ 0xe4, LVL_3, MB(8) }, /* 16-way set assoc, 64 byte line size */
|
|
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{ 0xea, LVL_3, MB(12) }, /* 24-way set assoc, 64 byte line size */
|
|
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{ 0xeb, LVL_3, MB(18) }, /* 24-way set assoc, 64 byte line size */
|
|
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{ 0xec, LVL_3, MB(24) }, /* 24-way set assoc, 64 byte line size */
|
2005-04-17 06:20:36 +08:00
|
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{ 0x00, 0, 0}
|
|
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};
|
|
|
|
|
|
|
|
|
|
|
2009-07-04 07:35:45 +08:00
|
|
|
enum _cache_type {
|
2015-03-04 20:00:16 +08:00
|
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CTYPE_NULL = 0,
|
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CTYPE_DATA = 1,
|
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CTYPE_INST = 2,
|
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CTYPE_UNIFIED = 3
|
2005-04-17 06:20:36 +08:00
|
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};
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union _cpuid4_leaf_eax {
|
|
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struct {
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enum _cache_type type:5;
|
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unsigned int level:3;
|
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unsigned int is_self_initializing:1;
|
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unsigned int is_fully_associative:1;
|
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unsigned int reserved:4;
|
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unsigned int num_threads_sharing:12;
|
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unsigned int num_cores_on_die:6;
|
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|
|
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} split;
|
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u32 full;
|
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};
|
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union _cpuid4_leaf_ebx {
|
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struct {
|
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unsigned int coherency_line_size:12;
|
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unsigned int physical_line_partition:10;
|
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unsigned int ways_of_associativity:10;
|
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} split;
|
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u32 full;
|
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};
|
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|
|
|
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union _cpuid4_leaf_ecx {
|
|
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struct {
|
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unsigned int number_of_sets:32;
|
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|
|
|
} split;
|
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|
u32 full;
|
|
|
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|
};
|
|
|
|
|
|
2011-07-24 17:46:08 +08:00
|
|
|
struct _cpuid4_info_regs {
|
2005-04-17 06:20:36 +08:00
|
|
|
union _cpuid4_leaf_eax eax;
|
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|
|
union _cpuid4_leaf_ebx ebx;
|
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|
|
union _cpuid4_leaf_ecx ecx;
|
2016-10-22 21:19:50 +08:00
|
|
|
unsigned int id;
|
2005-04-17 06:20:36 +08:00
|
|
|
unsigned long size;
|
2011-07-24 17:46:09 +08:00
|
|
|
struct amd_northbridge *nb;
|
2009-01-11 13:58:10 +08:00
|
|
|
};
|
|
|
|
|
|
2015-09-27 23:25:50 +08:00
|
|
|
static unsigned short num_cache_leaves;
|
2006-06-26 19:56:13 +08:00
|
|
|
|
|
|
|
|
/* AMD doesn't have CPUID4. Emulate it here to report the same
|
|
|
|
|
information to the user. This makes some assumptions about the machine:
|
2007-07-21 23:10:03 +08:00
|
|
|
L2 not shared, no SMT etc. that is currently true on AMD CPUs.
|
2006-06-26 19:56:13 +08:00
|
|
|
|
|
|
|
|
In theory the TLBs could be reported as fake type (they are in "dummy").
|
|
|
|
|
Maybe later */
|
|
|
|
|
union l1_cache {
|
|
|
|
|
struct {
|
2009-07-04 07:35:45 +08:00
|
|
|
unsigned line_size:8;
|
|
|
|
|
unsigned lines_per_tag:8;
|
|
|
|
|
unsigned assoc:8;
|
|
|
|
|
unsigned size_in_kb:8;
|
2006-06-26 19:56:13 +08:00
|
|
|
};
|
|
|
|
|
unsigned val;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
union l2_cache {
|
|
|
|
|
struct {
|
2009-07-04 07:35:45 +08:00
|
|
|
unsigned line_size:8;
|
|
|
|
|
unsigned lines_per_tag:4;
|
|
|
|
|
unsigned assoc:4;
|
|
|
|
|
unsigned size_in_kb:16;
|
2006-06-26 19:56:13 +08:00
|
|
|
};
|
|
|
|
|
unsigned val;
|
|
|
|
|
};
|
|
|
|
|
|
2007-07-21 23:10:03 +08:00
|
|
|
union l3_cache {
|
|
|
|
|
struct {
|
2009-07-04 07:35:45 +08:00
|
|
|
unsigned line_size:8;
|
|
|
|
|
unsigned lines_per_tag:4;
|
|
|
|
|
unsigned assoc:4;
|
|
|
|
|
unsigned res:2;
|
|
|
|
|
unsigned size_encoded:14;
|
2007-07-21 23:10:03 +08:00
|
|
|
};
|
|
|
|
|
unsigned val;
|
|
|
|
|
};
|
|
|
|
|
|
x86: delete __cpuinit usage from all x86 files
The __cpuinit type of throwaway sections might have made sense
some time ago when RAM was more constrained, but now the savings
do not offset the cost and complications. For example, the fix in
commit 5e427ec2d0 ("x86: Fix bit corruption at CPU resume time")
is a good example of the nasty type of bugs that can be created
with improper use of the various __init prefixes.
After a discussion on LKML[1] it was decided that cpuinit should go
the way of devinit and be phased out. Once all the users are gone,
we can then finally remove the macros themselves from linux/init.h.
Note that some harmless section mismatch warnings may result, since
notify_cpu_starting() and cpu_up() are arch independent (kernel/cpu.c)
are flagged as __cpuinit -- so if we remove the __cpuinit from
arch specific callers, we will also get section mismatch warnings.
As an intermediate step, we intend to turn the linux/init.h cpuinit
content into no-ops as early as possible, since that will get rid
of these warnings. In any case, they are temporary and harmless.
This removes all the arch/x86 uses of the __cpuinit macros from
all C files. x86 only had the one __CPUINIT used in assembly files,
and it wasn't paired off with a .previous or a __FINIT, so we can
delete it directly w/o any corresponding additional change there.
[1] https://lkml.org/lkml/2013/5/20/589
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: x86@kernel.org
Acked-by: Ingo Molnar <mingo@kernel.org>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: H. Peter Anvin <hpa@linux.intel.com>
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
2013-06-19 06:23:59 +08:00
|
|
|
static const unsigned short assocs[] = {
|
2009-04-09 21:47:10 +08:00
|
|
|
[1] = 1,
|
|
|
|
|
[2] = 2,
|
|
|
|
|
[4] = 4,
|
|
|
|
|
[6] = 8,
|
|
|
|
|
[8] = 16,
|
|
|
|
|
[0xa] = 32,
|
|
|
|
|
[0xb] = 48,
|
2007-07-21 23:10:03 +08:00
|
|
|
[0xc] = 64,
|
2009-04-09 21:47:10 +08:00
|
|
|
[0xd] = 96,
|
|
|
|
|
[0xe] = 128,
|
|
|
|
|
[0xf] = 0xffff /* fully associative - no way to show this currently */
|
2007-07-21 23:10:03 +08:00
|
|
|
};
|
|
|
|
|
|
x86: delete __cpuinit usage from all x86 files
The __cpuinit type of throwaway sections might have made sense
some time ago when RAM was more constrained, but now the savings
do not offset the cost and complications. For example, the fix in
commit 5e427ec2d0 ("x86: Fix bit corruption at CPU resume time")
is a good example of the nasty type of bugs that can be created
with improper use of the various __init prefixes.
After a discussion on LKML[1] it was decided that cpuinit should go
the way of devinit and be phased out. Once all the users are gone,
we can then finally remove the macros themselves from linux/init.h.
Note that some harmless section mismatch warnings may result, since
notify_cpu_starting() and cpu_up() are arch independent (kernel/cpu.c)
are flagged as __cpuinit -- so if we remove the __cpuinit from
arch specific callers, we will also get section mismatch warnings.
As an intermediate step, we intend to turn the linux/init.h cpuinit
content into no-ops as early as possible, since that will get rid
of these warnings. In any case, they are temporary and harmless.
This removes all the arch/x86 uses of the __cpuinit macros from
all C files. x86 only had the one __CPUINIT used in assembly files,
and it wasn't paired off with a .previous or a __FINIT, so we can
delete it directly w/o any corresponding additional change there.
[1] https://lkml.org/lkml/2013/5/20/589
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: x86@kernel.org
Acked-by: Ingo Molnar <mingo@kernel.org>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: H. Peter Anvin <hpa@linux.intel.com>
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
2013-06-19 06:23:59 +08:00
|
|
|
static const unsigned char levels[] = { 1, 1, 2, 3 };
|
|
|
|
|
static const unsigned char types[] = { 1, 2, 3, 3 };
|
2006-06-26 19:56:13 +08:00
|
|
|
|
2015-03-04 20:00:16 +08:00
|
|
|
static const enum cache_type cache_type_map[] = {
|
|
|
|
|
[CTYPE_NULL] = CACHE_TYPE_NOCACHE,
|
|
|
|
|
[CTYPE_DATA] = CACHE_TYPE_DATA,
|
|
|
|
|
[CTYPE_INST] = CACHE_TYPE_INST,
|
|
|
|
|
[CTYPE_UNIFIED] = CACHE_TYPE_UNIFIED,
|
|
|
|
|
};
|
|
|
|
|
|
x86: delete __cpuinit usage from all x86 files
The __cpuinit type of throwaway sections might have made sense
some time ago when RAM was more constrained, but now the savings
do not offset the cost and complications. For example, the fix in
commit 5e427ec2d0 ("x86: Fix bit corruption at CPU resume time")
is a good example of the nasty type of bugs that can be created
with improper use of the various __init prefixes.
After a discussion on LKML[1] it was decided that cpuinit should go
the way of devinit and be phased out. Once all the users are gone,
we can then finally remove the macros themselves from linux/init.h.
Note that some harmless section mismatch warnings may result, since
notify_cpu_starting() and cpu_up() are arch independent (kernel/cpu.c)
are flagged as __cpuinit -- so if we remove the __cpuinit from
arch specific callers, we will also get section mismatch warnings.
As an intermediate step, we intend to turn the linux/init.h cpuinit
content into no-ops as early as possible, since that will get rid
of these warnings. In any case, they are temporary and harmless.
This removes all the arch/x86 uses of the __cpuinit macros from
all C files. x86 only had the one __CPUINIT used in assembly files,
and it wasn't paired off with a .previous or a __FINIT, so we can
delete it directly w/o any corresponding additional change there.
[1] https://lkml.org/lkml/2013/5/20/589
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: x86@kernel.org
Acked-by: Ingo Molnar <mingo@kernel.org>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: H. Peter Anvin <hpa@linux.intel.com>
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
2013-06-19 06:23:59 +08:00
|
|
|
static void
|
2008-07-28 22:20:08 +08:00
|
|
|
amd_cpuid4(int leaf, union _cpuid4_leaf_eax *eax,
|
|
|
|
|
union _cpuid4_leaf_ebx *ebx,
|
|
|
|
|
union _cpuid4_leaf_ecx *ecx)
|
2006-06-26 19:56:13 +08:00
|
|
|
{
|
|
|
|
|
unsigned dummy;
|
|
|
|
|
unsigned line_size, lines_per_tag, assoc, size_in_kb;
|
|
|
|
|
union l1_cache l1i, l1d;
|
|
|
|
|
union l2_cache l2;
|
2007-07-21 23:10:03 +08:00
|
|
|
union l3_cache l3;
|
|
|
|
|
union l1_cache *l1 = &l1d;
|
2006-06-26 19:56:13 +08:00
|
|
|
|
|
|
|
|
eax->full = 0;
|
|
|
|
|
ebx->full = 0;
|
|
|
|
|
ecx->full = 0;
|
|
|
|
|
|
|
|
|
|
cpuid(0x80000005, &dummy, &dummy, &l1d.val, &l1i.val);
|
2007-07-21 23:10:03 +08:00
|
|
|
cpuid(0x80000006, &dummy, &dummy, &l2.val, &l3.val);
|
2006-06-26 19:56:13 +08:00
|
|
|
|
2007-07-21 23:10:03 +08:00
|
|
|
switch (leaf) {
|
|
|
|
|
case 1:
|
|
|
|
|
l1 = &l1i;
|
|
|
|
|
case 0:
|
|
|
|
|
if (!l1->val)
|
|
|
|
|
return;
|
2009-09-03 15:41:19 +08:00
|
|
|
assoc = assocs[l1->assoc];
|
2006-06-26 19:56:13 +08:00
|
|
|
line_size = l1->line_size;
|
|
|
|
|
lines_per_tag = l1->lines_per_tag;
|
|
|
|
|
size_in_kb = l1->size_in_kb;
|
2007-07-21 23:10:03 +08:00
|
|
|
break;
|
|
|
|
|
case 2:
|
|
|
|
|
if (!l2.val)
|
|
|
|
|
return;
|
2009-09-03 15:41:19 +08:00
|
|
|
assoc = assocs[l2.assoc];
|
2006-06-26 19:56:13 +08:00
|
|
|
line_size = l2.line_size;
|
|
|
|
|
lines_per_tag = l2.lines_per_tag;
|
|
|
|
|
/* cpu_data has errata corrections for K7 applied */
|
2010-12-18 23:30:05 +08:00
|
|
|
size_in_kb = __this_cpu_read(cpu_info.x86_cache_size);
|
2007-07-21 23:10:03 +08:00
|
|
|
break;
|
|
|
|
|
case 3:
|
|
|
|
|
if (!l3.val)
|
|
|
|
|
return;
|
2009-09-03 15:41:19 +08:00
|
|
|
assoc = assocs[l3.assoc];
|
2007-07-21 23:10:03 +08:00
|
|
|
line_size = l3.line_size;
|
|
|
|
|
lines_per_tag = l3.lines_per_tag;
|
|
|
|
|
size_in_kb = l3.size_encoded * 512;
|
2009-09-03 15:41:19 +08:00
|
|
|
if (boot_cpu_has(X86_FEATURE_AMD_DCM)) {
|
|
|
|
|
size_in_kb = size_in_kb >> 1;
|
|
|
|
|
assoc = assoc >> 1;
|
|
|
|
|
}
|
2007-07-21 23:10:03 +08:00
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
return;
|
2006-06-26 19:56:13 +08:00
|
|
|
}
|
|
|
|
|
|
2007-07-21 23:10:03 +08:00
|
|
|
eax->split.is_self_initializing = 1;
|
|
|
|
|
eax->split.type = types[leaf];
|
|
|
|
|
eax->split.level = levels[leaf];
|
2009-09-03 15:41:19 +08:00
|
|
|
eax->split.num_threads_sharing = 0;
|
2010-12-18 23:30:05 +08:00
|
|
|
eax->split.num_cores_on_die = __this_cpu_read(cpu_info.x86_max_cores) - 1;
|
2007-07-21 23:10:03 +08:00
|
|
|
|
|
|
|
|
|
2009-09-03 15:41:19 +08:00
|
|
|
if (assoc == 0xffff)
|
2006-06-26 19:56:13 +08:00
|
|
|
eax->split.is_fully_associative = 1;
|
|
|
|
|
ebx->split.coherency_line_size = line_size - 1;
|
2009-09-03 15:41:19 +08:00
|
|
|
ebx->split.ways_of_associativity = assoc - 1;
|
2006-06-26 19:56:13 +08:00
|
|
|
ebx->split.physical_line_partition = lines_per_tag - 1;
|
|
|
|
|
ecx->split.number_of_sets = (size_in_kb * 1024) / line_size /
|
|
|
|
|
(ebx->split.ways_of_associativity + 1) - 1;
|
|
|
|
|
}
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2013-02-04 17:13:15 +08:00
|
|
|
#if defined(CONFIG_AMD_NB) && defined(CONFIG_SYSFS)
|
2015-03-04 20:00:16 +08:00
|
|
|
|
2010-04-22 22:07:01 +08:00
|
|
|
/*
|
|
|
|
|
* L3 cache descriptors
|
|
|
|
|
*/
|
x86: delete __cpuinit usage from all x86 files
The __cpuinit type of throwaway sections might have made sense
some time ago when RAM was more constrained, but now the savings
do not offset the cost and complications. For example, the fix in
commit 5e427ec2d0 ("x86: Fix bit corruption at CPU resume time")
is a good example of the nasty type of bugs that can be created
with improper use of the various __init prefixes.
After a discussion on LKML[1] it was decided that cpuinit should go
the way of devinit and be phased out. Once all the users are gone,
we can then finally remove the macros themselves from linux/init.h.
Note that some harmless section mismatch warnings may result, since
notify_cpu_starting() and cpu_up() are arch independent (kernel/cpu.c)
are flagged as __cpuinit -- so if we remove the __cpuinit from
arch specific callers, we will also get section mismatch warnings.
As an intermediate step, we intend to turn the linux/init.h cpuinit
content into no-ops as early as possible, since that will get rid
of these warnings. In any case, they are temporary and harmless.
This removes all the arch/x86 uses of the __cpuinit macros from
all C files. x86 only had the one __CPUINIT used in assembly files,
and it wasn't paired off with a .previous or a __FINIT, so we can
delete it directly w/o any corresponding additional change there.
[1] https://lkml.org/lkml/2013/5/20/589
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: x86@kernel.org
Acked-by: Ingo Molnar <mingo@kernel.org>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: H. Peter Anvin <hpa@linux.intel.com>
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
2013-06-19 06:23:59 +08:00
|
|
|
static void amd_calc_l3_indices(struct amd_northbridge *nb)
|
2010-01-22 23:01:07 +08:00
|
|
|
{
|
2011-07-24 17:46:09 +08:00
|
|
|
struct amd_l3_cache *l3 = &nb->l3_cache;
|
2010-01-22 23:01:07 +08:00
|
|
|
unsigned int sc0, sc1, sc2, sc3;
|
2010-02-19 02:37:14 +08:00
|
|
|
u32 val = 0;
|
2010-01-22 23:01:07 +08:00
|
|
|
|
2011-07-24 17:46:09 +08:00
|
|
|
pci_read_config_dword(nb->misc, 0x1C4, &val);
|
2010-01-22 23:01:07 +08:00
|
|
|
|
|
|
|
|
/* calculate subcache sizes */
|
2010-04-22 22:07:00 +08:00
|
|
|
l3->subcaches[0] = sc0 = !(val & BIT(0));
|
|
|
|
|
l3->subcaches[1] = sc1 = !(val & BIT(4));
|
2011-05-18 17:32:10 +08:00
|
|
|
|
|
|
|
|
if (boot_cpu_data.x86 == 0x15) {
|
|
|
|
|
l3->subcaches[0] = sc0 += !(val & BIT(1));
|
|
|
|
|
l3->subcaches[1] = sc1 += !(val & BIT(5));
|
|
|
|
|
}
|
|
|
|
|
|
2010-04-22 22:07:00 +08:00
|
|
|
l3->subcaches[2] = sc2 = !(val & BIT(8)) + !(val & BIT(9));
|
|
|
|
|
l3->subcaches[3] = sc3 = !(val & BIT(12)) + !(val & BIT(13));
|
|
|
|
|
|
2010-10-27 05:22:23 +08:00
|
|
|
l3->indices = (max(max3(sc0, sc1, sc2), sc3) << 10) - 1;
|
2010-04-22 22:07:01 +08:00
|
|
|
}
|
|
|
|
|
|
2010-06-03 00:18:40 +08:00
|
|
|
/*
|
|
|
|
|
* check whether a slot used for disabling an L3 index is occupied.
|
|
|
|
|
* @l3: L3 cache descriptor
|
|
|
|
|
* @slot: slot number (0..1)
|
|
|
|
|
*
|
|
|
|
|
* @returns: the disabled index if used or negative value if slot free.
|
|
|
|
|
*/
|
2015-09-27 23:25:50 +08:00
|
|
|
static int amd_get_l3_disable_slot(struct amd_northbridge *nb, unsigned slot)
|
2010-06-03 00:18:40 +08:00
|
|
|
{
|
|
|
|
|
unsigned int reg = 0;
|
|
|
|
|
|
2011-07-24 17:46:09 +08:00
|
|
|
pci_read_config_dword(nb->misc, 0x1BC + slot * 4, ®);
|
2010-06-03 00:18:40 +08:00
|
|
|
|
|
|
|
|
/* check whether this slot is activated already */
|
|
|
|
|
if (reg & (3UL << 30))
|
|
|
|
|
return reg & 0xfff;
|
|
|
|
|
|
|
|
|
|
return -1;
|
|
|
|
|
}
|
|
|
|
|
|
2015-03-04 20:00:16 +08:00
|
|
|
static ssize_t show_cache_disable(struct cacheinfo *this_leaf, char *buf,
|
2010-04-22 22:07:02 +08:00
|
|
|
unsigned int slot)
|
2010-02-19 02:37:14 +08:00
|
|
|
{
|
2010-06-03 00:18:40 +08:00
|
|
|
int index;
|
2015-03-04 20:00:16 +08:00
|
|
|
struct amd_northbridge *nb = this_leaf->priv;
|
2010-02-19 02:37:14 +08:00
|
|
|
|
2015-03-04 20:00:16 +08:00
|
|
|
index = amd_get_l3_disable_slot(nb, slot);
|
2010-06-03 00:18:40 +08:00
|
|
|
if (index >= 0)
|
|
|
|
|
return sprintf(buf, "%d\n", index);
|
2010-02-19 02:37:14 +08:00
|
|
|
|
2010-06-03 00:18:40 +08:00
|
|
|
return sprintf(buf, "FREE\n");
|
2010-02-19 02:37:14 +08:00
|
|
|
}
|
|
|
|
|
|
2010-04-22 22:07:02 +08:00
|
|
|
#define SHOW_CACHE_DISABLE(slot) \
|
2010-02-19 02:37:14 +08:00
|
|
|
static ssize_t \
|
2015-03-04 20:00:16 +08:00
|
|
|
cache_disable_##slot##_show(struct device *dev, \
|
|
|
|
|
struct device_attribute *attr, char *buf) \
|
2010-02-19 02:37:14 +08:00
|
|
|
{ \
|
2015-03-04 20:00:16 +08:00
|
|
|
struct cacheinfo *this_leaf = dev_get_drvdata(dev); \
|
2010-04-22 22:07:02 +08:00
|
|
|
return show_cache_disable(this_leaf, buf, slot); \
|
2010-02-19 02:37:14 +08:00
|
|
|
}
|
|
|
|
|
SHOW_CACHE_DISABLE(0)
|
|
|
|
|
SHOW_CACHE_DISABLE(1)
|
|
|
|
|
|
2011-07-24 17:46:09 +08:00
|
|
|
static void amd_l3_disable_index(struct amd_northbridge *nb, int cpu,
|
2010-04-22 22:07:02 +08:00
|
|
|
unsigned slot, unsigned long idx)
|
|
|
|
|
{
|
|
|
|
|
int i;
|
|
|
|
|
|
|
|
|
|
idx |= BIT(30);
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* disable index in all 4 subcaches
|
|
|
|
|
*/
|
|
|
|
|
for (i = 0; i < 4; i++) {
|
|
|
|
|
u32 reg = idx | (i << 20);
|
|
|
|
|
|
2011-07-24 17:46:09 +08:00
|
|
|
if (!nb->l3_cache.subcaches[i])
|
2010-04-22 22:07:02 +08:00
|
|
|
continue;
|
|
|
|
|
|
2011-07-24 17:46:09 +08:00
|
|
|
pci_write_config_dword(nb->misc, 0x1BC + slot * 4, reg);
|
2010-04-22 22:07:02 +08:00
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* We need to WBINVD on a core on the node containing the L3
|
|
|
|
|
* cache which indices we disable therefore a simple wbinvd()
|
|
|
|
|
* is not sufficient.
|
|
|
|
|
*/
|
|
|
|
|
wbinvd_on_cpu(cpu);
|
|
|
|
|
|
|
|
|
|
reg |= BIT(31);
|
2011-07-24 17:46:09 +08:00
|
|
|
pci_write_config_dword(nb->misc, 0x1BC + slot * 4, reg);
|
2010-04-22 22:07:02 +08:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2010-06-03 00:18:40 +08:00
|
|
|
/*
|
|
|
|
|
* disable a L3 cache index by using a disable-slot
|
|
|
|
|
*
|
|
|
|
|
* @l3: L3 cache descriptor
|
|
|
|
|
* @cpu: A CPU on the node containing the L3 cache
|
|
|
|
|
* @slot: slot number (0..1)
|
|
|
|
|
* @index: index to disable
|
|
|
|
|
*
|
|
|
|
|
* @return: 0 on success, error status on failure
|
|
|
|
|
*/
|
2015-09-27 23:25:50 +08:00
|
|
|
static int amd_set_l3_disable_slot(struct amd_northbridge *nb, int cpu,
|
|
|
|
|
unsigned slot, unsigned long index)
|
2010-02-19 02:37:14 +08:00
|
|
|
{
|
2010-06-03 00:18:40 +08:00
|
|
|
int ret = 0;
|
2010-02-19 02:37:14 +08:00
|
|
|
|
2011-05-16 21:39:47 +08:00
|
|
|
/* check if @slot is already used or the index is already disabled */
|
2011-07-24 17:46:09 +08:00
|
|
|
ret = amd_get_l3_disable_slot(nb, slot);
|
2010-06-03 00:18:40 +08:00
|
|
|
if (ret >= 0)
|
2012-04-19 18:35:08 +08:00
|
|
|
return -EEXIST;
|
2010-02-19 02:37:14 +08:00
|
|
|
|
2011-07-24 17:46:09 +08:00
|
|
|
if (index > nb->l3_cache.indices)
|
2010-06-03 00:18:40 +08:00
|
|
|
return -EINVAL;
|
|
|
|
|
|
2011-05-16 21:39:47 +08:00
|
|
|
/* check whether the other slot has disabled the same index already */
|
2011-07-24 17:46:09 +08:00
|
|
|
if (index == amd_get_l3_disable_slot(nb, !slot))
|
2012-04-19 18:35:08 +08:00
|
|
|
return -EEXIST;
|
2010-06-03 00:18:40 +08:00
|
|
|
|
2011-07-24 17:46:09 +08:00
|
|
|
amd_l3_disable_index(nb, cpu, slot, index);
|
2010-06-03 00:18:40 +08:00
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
2015-03-04 20:00:16 +08:00
|
|
|
static ssize_t store_cache_disable(struct cacheinfo *this_leaf,
|
|
|
|
|
const char *buf, size_t count,
|
|
|
|
|
unsigned int slot)
|
2010-06-03 00:18:40 +08:00
|
|
|
{
|
|
|
|
|
unsigned long val = 0;
|
|
|
|
|
int cpu, err = 0;
|
2015-03-04 20:00:16 +08:00
|
|
|
struct amd_northbridge *nb = this_leaf->priv;
|
2010-06-03 00:18:40 +08:00
|
|
|
|
2010-02-19 02:37:14 +08:00
|
|
|
if (!capable(CAP_SYS_ADMIN))
|
|
|
|
|
return -EPERM;
|
|
|
|
|
|
2015-03-04 20:00:16 +08:00
|
|
|
cpu = cpumask_first(&this_leaf->shared_cpu_map);
|
2010-02-19 02:37:14 +08:00
|
|
|
|
2014-08-09 05:24:03 +08:00
|
|
|
if (kstrtoul(buf, 10, &val) < 0)
|
2010-02-19 02:37:14 +08:00
|
|
|
return -EINVAL;
|
|
|
|
|
|
2015-03-04 20:00:16 +08:00
|
|
|
err = amd_set_l3_disable_slot(nb, cpu, slot, val);
|
2010-06-03 00:18:40 +08:00
|
|
|
if (err) {
|
|
|
|
|
if (err == -EEXIST)
|
2016-02-02 11:45:02 +08:00
|
|
|
pr_warn("L3 slot %d in use/index already disabled!\n",
|
2012-04-19 18:35:08 +08:00
|
|
|
slot);
|
2010-06-03 00:18:40 +08:00
|
|
|
return err;
|
|
|
|
|
}
|
2010-02-19 02:37:14 +08:00
|
|
|
return count;
|
|
|
|
|
}
|
|
|
|
|
|
2010-04-22 22:07:02 +08:00
|
|
|
#define STORE_CACHE_DISABLE(slot) \
|
2010-02-19 02:37:14 +08:00
|
|
|
static ssize_t \
|
2015-03-04 20:00:16 +08:00
|
|
|
cache_disable_##slot##_store(struct device *dev, \
|
|
|
|
|
struct device_attribute *attr, \
|
|
|
|
|
const char *buf, size_t count) \
|
2010-02-19 02:37:14 +08:00
|
|
|
{ \
|
2015-03-04 20:00:16 +08:00
|
|
|
struct cacheinfo *this_leaf = dev_get_drvdata(dev); \
|
2010-04-22 22:07:02 +08:00
|
|
|
return store_cache_disable(this_leaf, buf, count, slot); \
|
2008-07-19 05:03:52 +08:00
|
|
|
}
|
2010-02-19 02:37:14 +08:00
|
|
|
STORE_CACHE_DISABLE(0)
|
|
|
|
|
STORE_CACHE_DISABLE(1)
|
|
|
|
|
|
2015-03-04 20:00:16 +08:00
|
|
|
static ssize_t subcaches_show(struct device *dev,
|
|
|
|
|
struct device_attribute *attr, char *buf)
|
2011-02-08 01:10:39 +08:00
|
|
|
{
|
2015-03-04 20:00:16 +08:00
|
|
|
struct cacheinfo *this_leaf = dev_get_drvdata(dev);
|
|
|
|
|
int cpu = cpumask_first(&this_leaf->shared_cpu_map);
|
2011-02-08 01:10:39 +08:00
|
|
|
|
|
|
|
|
return sprintf(buf, "%x\n", amd_get_subcaches(cpu));
|
|
|
|
|
}
|
|
|
|
|
|
2015-03-04 20:00:16 +08:00
|
|
|
static ssize_t subcaches_store(struct device *dev,
|
|
|
|
|
struct device_attribute *attr,
|
|
|
|
|
const char *buf, size_t count)
|
2011-02-08 01:10:39 +08:00
|
|
|
{
|
2015-03-04 20:00:16 +08:00
|
|
|
struct cacheinfo *this_leaf = dev_get_drvdata(dev);
|
|
|
|
|
int cpu = cpumask_first(&this_leaf->shared_cpu_map);
|
2011-02-08 01:10:39 +08:00
|
|
|
unsigned long val;
|
|
|
|
|
|
|
|
|
|
if (!capable(CAP_SYS_ADMIN))
|
|
|
|
|
return -EPERM;
|
|
|
|
|
|
2014-08-09 05:24:03 +08:00
|
|
|
if (kstrtoul(buf, 16, &val) < 0)
|
2011-02-08 01:10:39 +08:00
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
|
|
if (amd_set_subcaches(cpu, val))
|
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
|
|
return count;
|
|
|
|
|
}
|
|
|
|
|
|
2015-03-04 20:00:16 +08:00
|
|
|
static DEVICE_ATTR_RW(cache_disable_0);
|
|
|
|
|
static DEVICE_ATTR_RW(cache_disable_1);
|
|
|
|
|
static DEVICE_ATTR_RW(subcaches);
|
|
|
|
|
|
|
|
|
|
static umode_t
|
|
|
|
|
cache_private_attrs_is_visible(struct kobject *kobj,
|
|
|
|
|
struct attribute *attr, int unused)
|
|
|
|
|
{
|
|
|
|
|
struct device *dev = kobj_to_dev(kobj);
|
|
|
|
|
struct cacheinfo *this_leaf = dev_get_drvdata(dev);
|
|
|
|
|
umode_t mode = attr->mode;
|
|
|
|
|
|
|
|
|
|
if (!this_leaf->priv)
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
|
|
if ((attr == &dev_attr_subcaches.attr) &&
|
|
|
|
|
amd_nb_has_feature(AMD_NB_L3_PARTITIONING))
|
|
|
|
|
return mode;
|
|
|
|
|
|
|
|
|
|
if ((attr == &dev_attr_cache_disable_0.attr ||
|
|
|
|
|
attr == &dev_attr_cache_disable_1.attr) &&
|
|
|
|
|
amd_nb_has_feature(AMD_NB_L3_INDEX_DISABLE))
|
|
|
|
|
return mode;
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static struct attribute_group cache_private_group = {
|
|
|
|
|
.is_visible = cache_private_attrs_is_visible,
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static void init_amd_l3_attrs(void)
|
|
|
|
|
{
|
|
|
|
|
int n = 1;
|
|
|
|
|
static struct attribute **amd_l3_attrs;
|
|
|
|
|
|
|
|
|
|
if (amd_l3_attrs) /* already initialized */
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
if (amd_nb_has_feature(AMD_NB_L3_INDEX_DISABLE))
|
|
|
|
|
n += 2;
|
|
|
|
|
if (amd_nb_has_feature(AMD_NB_L3_PARTITIONING))
|
|
|
|
|
n += 1;
|
|
|
|
|
|
|
|
|
|
amd_l3_attrs = kcalloc(n, sizeof(*amd_l3_attrs), GFP_KERNEL);
|
|
|
|
|
if (!amd_l3_attrs)
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
n = 0;
|
|
|
|
|
if (amd_nb_has_feature(AMD_NB_L3_INDEX_DISABLE)) {
|
|
|
|
|
amd_l3_attrs[n++] = &dev_attr_cache_disable_0.attr;
|
|
|
|
|
amd_l3_attrs[n++] = &dev_attr_cache_disable_1.attr;
|
|
|
|
|
}
|
|
|
|
|
if (amd_nb_has_feature(AMD_NB_L3_PARTITIONING))
|
|
|
|
|
amd_l3_attrs[n++] = &dev_attr_subcaches.attr;
|
2011-02-08 01:10:39 +08:00
|
|
|
|
2015-03-04 20:00:16 +08:00
|
|
|
cache_private_group.attrs = amd_l3_attrs;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
const struct attribute_group *
|
|
|
|
|
cache_get_priv_group(struct cacheinfo *this_leaf)
|
|
|
|
|
{
|
|
|
|
|
struct amd_northbridge *nb = this_leaf->priv;
|
|
|
|
|
|
2015-03-11 18:54:29 +08:00
|
|
|
if (this_leaf->level < 3 || !nb)
|
2015-03-04 20:00:16 +08:00
|
|
|
return NULL;
|
|
|
|
|
|
|
|
|
|
if (nb && nb->l3_cache.indices)
|
|
|
|
|
init_amd_l3_attrs();
|
|
|
|
|
|
|
|
|
|
return &cache_private_group;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void amd_init_l3_cache(struct _cpuid4_info_regs *this_leaf, int index)
|
|
|
|
|
{
|
|
|
|
|
int node;
|
|
|
|
|
|
|
|
|
|
/* only for L3, and not in virtualized environments */
|
|
|
|
|
if (index < 3)
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
node = amd_get_nb_id(smp_processor_id());
|
|
|
|
|
this_leaf->nb = node_to_amd_nb(node);
|
|
|
|
|
if (this_leaf->nb && !this_leaf->nb->l3_cache.indices)
|
|
|
|
|
amd_calc_l3_indices(this_leaf->nb);
|
|
|
|
|
}
|
2013-02-04 17:13:15 +08:00
|
|
|
#else
|
2010-10-29 23:14:32 +08:00
|
|
|
#define amd_init_l3_cache(x, y)
|
2013-02-04 17:13:15 +08:00
|
|
|
#endif /* CONFIG_AMD_NB && CONFIG_SYSFS */
|
2008-07-19 05:03:52 +08:00
|
|
|
|
2008-07-21 19:34:21 +08:00
|
|
|
static int
|
x86: delete __cpuinit usage from all x86 files
The __cpuinit type of throwaway sections might have made sense
some time ago when RAM was more constrained, but now the savings
do not offset the cost and complications. For example, the fix in
commit 5e427ec2d0 ("x86: Fix bit corruption at CPU resume time")
is a good example of the nasty type of bugs that can be created
with improper use of the various __init prefixes.
After a discussion on LKML[1] it was decided that cpuinit should go
the way of devinit and be phased out. Once all the users are gone,
we can then finally remove the macros themselves from linux/init.h.
Note that some harmless section mismatch warnings may result, since
notify_cpu_starting() and cpu_up() are arch independent (kernel/cpu.c)
are flagged as __cpuinit -- so if we remove the __cpuinit from
arch specific callers, we will also get section mismatch warnings.
As an intermediate step, we intend to turn the linux/init.h cpuinit
content into no-ops as early as possible, since that will get rid
of these warnings. In any case, they are temporary and harmless.
This removes all the arch/x86 uses of the __cpuinit macros from
all C files. x86 only had the one __CPUINIT used in assembly files,
and it wasn't paired off with a .previous or a __FINIT, so we can
delete it directly w/o any corresponding additional change there.
[1] https://lkml.org/lkml/2013/5/20/589
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: x86@kernel.org
Acked-by: Ingo Molnar <mingo@kernel.org>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: H. Peter Anvin <hpa@linux.intel.com>
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
2013-06-19 06:23:59 +08:00
|
|
|
cpuid4_cache_lookup_regs(int index, struct _cpuid4_info_regs *this_leaf)
|
2005-04-17 06:20:36 +08:00
|
|
|
{
|
2011-02-08 01:10:39 +08:00
|
|
|
union _cpuid4_leaf_eax eax;
|
|
|
|
|
union _cpuid4_leaf_ebx ebx;
|
|
|
|
|
union _cpuid4_leaf_ecx ecx;
|
2006-06-26 19:56:13 +08:00
|
|
|
unsigned edx;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2008-07-19 05:03:52 +08:00
|
|
|
if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) {
|
2015-12-07 17:39:41 +08:00
|
|
|
if (boot_cpu_has(X86_FEATURE_TOPOEXT))
|
2012-10-19 17:00:49 +08:00
|
|
|
cpuid_count(0x8000001d, index, &eax.full,
|
|
|
|
|
&ebx.full, &ecx.full, &edx);
|
|
|
|
|
else
|
|
|
|
|
amd_cpuid4(index, &eax, &ebx, &ecx);
|
2010-10-29 23:14:32 +08:00
|
|
|
amd_init_l3_cache(this_leaf, index);
|
2008-07-21 19:34:21 +08:00
|
|
|
} else {
|
|
|
|
|
cpuid_count(4, index, &eax.full, &ebx.full, &ecx.full, &edx);
|
|
|
|
|
}
|
|
|
|
|
|
2015-03-04 20:00:16 +08:00
|
|
|
if (eax.split.type == CTYPE_NULL)
|
2005-07-29 12:15:46 +08:00
|
|
|
return -EIO; /* better error ? */
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2006-06-26 19:56:13 +08:00
|
|
|
this_leaf->eax = eax;
|
|
|
|
|
this_leaf->ebx = ebx;
|
|
|
|
|
this_leaf->ecx = ecx;
|
2008-07-21 19:34:21 +08:00
|
|
|
this_leaf->size = (ecx.split.number_of_sets + 1) *
|
|
|
|
|
(ebx.split.coherency_line_size + 1) *
|
|
|
|
|
(ebx.split.physical_line_partition + 1) *
|
|
|
|
|
(ebx.split.ways_of_associativity + 1);
|
2005-04-17 06:20:36 +08:00
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
x86: delete __cpuinit usage from all x86 files
The __cpuinit type of throwaway sections might have made sense
some time ago when RAM was more constrained, but now the savings
do not offset the cost and complications. For example, the fix in
commit 5e427ec2d0 ("x86: Fix bit corruption at CPU resume time")
is a good example of the nasty type of bugs that can be created
with improper use of the various __init prefixes.
After a discussion on LKML[1] it was decided that cpuinit should go
the way of devinit and be phased out. Once all the users are gone,
we can then finally remove the macros themselves from linux/init.h.
Note that some harmless section mismatch warnings may result, since
notify_cpu_starting() and cpu_up() are arch independent (kernel/cpu.c)
are flagged as __cpuinit -- so if we remove the __cpuinit from
arch specific callers, we will also get section mismatch warnings.
As an intermediate step, we intend to turn the linux/init.h cpuinit
content into no-ops as early as possible, since that will get rid
of these warnings. In any case, they are temporary and harmless.
This removes all the arch/x86 uses of the __cpuinit macros from
all C files. x86 only had the one __CPUINIT used in assembly files,
and it wasn't paired off with a .previous or a __FINIT, so we can
delete it directly w/o any corresponding additional change there.
[1] https://lkml.org/lkml/2013/5/20/589
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: x86@kernel.org
Acked-by: Ingo Molnar <mingo@kernel.org>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: H. Peter Anvin <hpa@linux.intel.com>
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
2013-06-19 06:23:59 +08:00
|
|
|
static int find_num_cache_leaves(struct cpuinfo_x86 *c)
|
2005-04-17 06:20:36 +08:00
|
|
|
{
|
2012-10-19 16:59:33 +08:00
|
|
|
unsigned int eax, ebx, ecx, edx, op;
|
2005-04-17 06:20:36 +08:00
|
|
|
union _cpuid4_leaf_eax cache_eax;
|
2005-10-31 06:59:30 +08:00
|
|
|
int i = -1;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2012-10-19 16:59:33 +08:00
|
|
|
if (c->x86_vendor == X86_VENDOR_AMD)
|
|
|
|
|
op = 0x8000001d;
|
|
|
|
|
else
|
|
|
|
|
op = 4;
|
|
|
|
|
|
2005-10-31 06:59:30 +08:00
|
|
|
do {
|
|
|
|
|
++i;
|
2012-10-19 16:59:33 +08:00
|
|
|
/* Do cpuid(op) loop to find out num_cache_leaves */
|
|
|
|
|
cpuid_count(op, i, &eax, &ebx, &ecx, &edx);
|
2005-04-17 06:20:36 +08:00
|
|
|
cache_eax.full = eax;
|
2015-03-04 20:00:16 +08:00
|
|
|
} while (cache_eax.split.type != CTYPE_NULL);
|
2005-10-31 06:59:30 +08:00
|
|
|
return i;
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
|
|
x86: delete __cpuinit usage from all x86 files
The __cpuinit type of throwaway sections might have made sense
some time ago when RAM was more constrained, but now the savings
do not offset the cost and complications. For example, the fix in
commit 5e427ec2d0 ("x86: Fix bit corruption at CPU resume time")
is a good example of the nasty type of bugs that can be created
with improper use of the various __init prefixes.
After a discussion on LKML[1] it was decided that cpuinit should go
the way of devinit and be phased out. Once all the users are gone,
we can then finally remove the macros themselves from linux/init.h.
Note that some harmless section mismatch warnings may result, since
notify_cpu_starting() and cpu_up() are arch independent (kernel/cpu.c)
are flagged as __cpuinit -- so if we remove the __cpuinit from
arch specific callers, we will also get section mismatch warnings.
As an intermediate step, we intend to turn the linux/init.h cpuinit
content into no-ops as early as possible, since that will get rid
of these warnings. In any case, they are temporary and harmless.
This removes all the arch/x86 uses of the __cpuinit macros from
all C files. x86 only had the one __CPUINIT used in assembly files,
and it wasn't paired off with a .previous or a __FINIT, so we can
delete it directly w/o any corresponding additional change there.
[1] https://lkml.org/lkml/2013/5/20/589
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: x86@kernel.org
Acked-by: Ingo Molnar <mingo@kernel.org>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: H. Peter Anvin <hpa@linux.intel.com>
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
2013-06-19 06:23:59 +08:00
|
|
|
void init_amd_cacheinfo(struct cpuinfo_x86 *c)
|
2012-10-19 16:59:33 +08:00
|
|
|
{
|
|
|
|
|
|
2015-12-07 17:39:41 +08:00
|
|
|
if (boot_cpu_has(X86_FEATURE_TOPOEXT)) {
|
2012-10-19 16:59:33 +08:00
|
|
|
num_cache_leaves = find_num_cache_leaves(c);
|
|
|
|
|
} else if (c->extended_cpuid_level >= 0x80000006) {
|
|
|
|
|
if (cpuid_edx(0x80000006) & 0xf000)
|
|
|
|
|
num_cache_leaves = 4;
|
|
|
|
|
else
|
|
|
|
|
num_cache_leaves = 3;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
x86: delete __cpuinit usage from all x86 files
The __cpuinit type of throwaway sections might have made sense
some time ago when RAM was more constrained, but now the savings
do not offset the cost and complications. For example, the fix in
commit 5e427ec2d0 ("x86: Fix bit corruption at CPU resume time")
is a good example of the nasty type of bugs that can be created
with improper use of the various __init prefixes.
After a discussion on LKML[1] it was decided that cpuinit should go
the way of devinit and be phased out. Once all the users are gone,
we can then finally remove the macros themselves from linux/init.h.
Note that some harmless section mismatch warnings may result, since
notify_cpu_starting() and cpu_up() are arch independent (kernel/cpu.c)
are flagged as __cpuinit -- so if we remove the __cpuinit from
arch specific callers, we will also get section mismatch warnings.
As an intermediate step, we intend to turn the linux/init.h cpuinit
content into no-ops as early as possible, since that will get rid
of these warnings. In any case, they are temporary and harmless.
This removes all the arch/x86 uses of the __cpuinit macros from
all C files. x86 only had the one __CPUINIT used in assembly files,
and it wasn't paired off with a .previous or a __FINIT, so we can
delete it directly w/o any corresponding additional change there.
[1] https://lkml.org/lkml/2013/5/20/589
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: x86@kernel.org
Acked-by: Ingo Molnar <mingo@kernel.org>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: H. Peter Anvin <hpa@linux.intel.com>
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
2013-06-19 06:23:59 +08:00
|
|
|
unsigned int init_intel_cacheinfo(struct cpuinfo_x86 *c)
|
2005-04-17 06:20:36 +08:00
|
|
|
{
|
2009-07-04 07:35:45 +08:00
|
|
|
/* Cache sizes */
|
|
|
|
|
unsigned int trace = 0, l1i = 0, l1d = 0, l2 = 0, l3 = 0;
|
2005-04-17 06:20:36 +08:00
|
|
|
unsigned int new_l1d = 0, new_l1i = 0; /* Cache sizes from cpuid(4) */
|
|
|
|
|
unsigned int new_l2 = 0, new_l3 = 0, i; /* Cache sizes from cpuid(4) */
|
2006-03-27 17:15:22 +08:00
|
|
|
unsigned int l2_id = 0, l3_id = 0, num_threads_sharing, index_msb;
|
2015-06-05 00:55:25 +08:00
|
|
|
#ifdef CONFIG_SMP
|
2007-10-20 02:35:04 +08:00
|
|
|
unsigned int cpu = c->cpu_index;
|
2006-03-27 17:15:22 +08:00
|
|
|
#endif
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2006-03-23 18:59:52 +08:00
|
|
|
if (c->cpuid_level > 3) {
|
2005-04-17 06:20:36 +08:00
|
|
|
static int is_initialized;
|
|
|
|
|
|
|
|
|
|
if (is_initialized == 0) {
|
|
|
|
|
/* Init num_cache_leaves from boot CPU */
|
2012-10-19 16:59:33 +08:00
|
|
|
num_cache_leaves = find_num_cache_leaves(c);
|
2005-04-17 06:20:36 +08:00
|
|
|
is_initialized++;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Whenever possible use cpuid(4), deterministic cache
|
|
|
|
|
* parameters cpuid leaf to find the cache details
|
|
|
|
|
*/
|
|
|
|
|
for (i = 0; i < num_cache_leaves; i++) {
|
2013-06-09 00:48:15 +08:00
|
|
|
struct _cpuid4_info_regs this_leaf = {};
|
2005-04-17 06:20:36 +08:00
|
|
|
int retval;
|
|
|
|
|
|
2009-01-11 13:58:10 +08:00
|
|
|
retval = cpuid4_cache_lookup_regs(i, &this_leaf);
|
2013-06-09 00:48:15 +08:00
|
|
|
if (retval < 0)
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
switch (this_leaf.eax.split.level) {
|
|
|
|
|
case 1:
|
2015-03-04 20:00:16 +08:00
|
|
|
if (this_leaf.eax.split.type == CTYPE_DATA)
|
2013-06-09 00:48:15 +08:00
|
|
|
new_l1d = this_leaf.size/1024;
|
2015-03-04 20:00:16 +08:00
|
|
|
else if (this_leaf.eax.split.type == CTYPE_INST)
|
2013-06-09 00:48:15 +08:00
|
|
|
new_l1i = this_leaf.size/1024;
|
|
|
|
|
break;
|
|
|
|
|
case 2:
|
|
|
|
|
new_l2 = this_leaf.size/1024;
|
|
|
|
|
num_threads_sharing = 1 + this_leaf.eax.split.num_threads_sharing;
|
|
|
|
|
index_msb = get_count_order(num_threads_sharing);
|
|
|
|
|
l2_id = c->apicid & ~((1 << index_msb) - 1);
|
|
|
|
|
break;
|
|
|
|
|
case 3:
|
|
|
|
|
new_l3 = this_leaf.size/1024;
|
|
|
|
|
num_threads_sharing = 1 + this_leaf.eax.split.num_threads_sharing;
|
|
|
|
|
index_msb = get_count_order(num_threads_sharing);
|
|
|
|
|
l3_id = c->apicid & ~((1 << index_msb) - 1);
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
break;
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
2006-03-27 17:15:24 +08:00
|
|
|
/*
|
|
|
|
|
* Don't use cpuid2 if cpuid4 is supported. For P4, we use cpuid2 for
|
|
|
|
|
* trace cache
|
|
|
|
|
*/
|
|
|
|
|
if ((num_cache_leaves == 0 || c->x86 == 15) && c->cpuid_level > 1) {
|
2005-04-17 06:20:36 +08:00
|
|
|
/* supports eax=2 call */
|
2008-02-01 05:05:43 +08:00
|
|
|
int j, n;
|
|
|
|
|
unsigned int regs[4];
|
2005-04-17 06:20:36 +08:00
|
|
|
unsigned char *dp = (unsigned char *)regs;
|
2006-03-27 17:15:24 +08:00
|
|
|
int only_trace = 0;
|
|
|
|
|
|
|
|
|
|
if (num_cache_leaves != 0 && c->x86 == 15)
|
|
|
|
|
only_trace = 1;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
|
/* Number of times to iterate */
|
|
|
|
|
n = cpuid_eax(2) & 0xFF;
|
|
|
|
|
|
2009-07-04 07:35:45 +08:00
|
|
|
for (i = 0 ; i < n ; i++) {
|
2005-04-17 06:20:36 +08:00
|
|
|
cpuid(2, ®s[0], ®s[1], ®s[2], ®s[3]);
|
|
|
|
|
|
|
|
|
|
/* If bit 31 is set, this is an unknown format */
|
2009-07-04 07:35:45 +08:00
|
|
|
for (j = 0 ; j < 3 ; j++)
|
|
|
|
|
if (regs[j] & (1 << 31))
|
|
|
|
|
regs[j] = 0;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
|
/* Byte 0 is level count, not a descriptor */
|
2009-07-04 07:35:45 +08:00
|
|
|
for (j = 1 ; j < 16 ; j++) {
|
2005-04-17 06:20:36 +08:00
|
|
|
unsigned char des = dp[j];
|
|
|
|
|
unsigned char k = 0;
|
|
|
|
|
|
|
|
|
|
/* look up this descriptor in the table */
|
2009-07-04 07:35:45 +08:00
|
|
|
while (cache_table[k].descriptor != 0) {
|
2005-04-17 06:20:36 +08:00
|
|
|
if (cache_table[k].descriptor == des) {
|
2006-03-27 17:15:24 +08:00
|
|
|
if (only_trace && cache_table[k].cache_type != LVL_TRACE)
|
|
|
|
|
break;
|
2005-04-17 06:20:36 +08:00
|
|
|
switch (cache_table[k].cache_type) {
|
|
|
|
|
case LVL_1_INST:
|
|
|
|
|
l1i += cache_table[k].size;
|
|
|
|
|
break;
|
|
|
|
|
case LVL_1_DATA:
|
|
|
|
|
l1d += cache_table[k].size;
|
|
|
|
|
break;
|
|
|
|
|
case LVL_2:
|
|
|
|
|
l2 += cache_table[k].size;
|
|
|
|
|
break;
|
|
|
|
|
case LVL_3:
|
|
|
|
|
l3 += cache_table[k].size;
|
|
|
|
|
break;
|
|
|
|
|
case LVL_TRACE:
|
|
|
|
|
trace += cache_table[k].size;
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
k++;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
2006-03-27 17:15:24 +08:00
|
|
|
}
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2006-03-27 17:15:24 +08:00
|
|
|
if (new_l1d)
|
|
|
|
|
l1d = new_l1d;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2006-03-27 17:15:24 +08:00
|
|
|
if (new_l1i)
|
|
|
|
|
l1i = new_l1i;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2006-03-27 17:15:24 +08:00
|
|
|
if (new_l2) {
|
|
|
|
|
l2 = new_l2;
|
2015-06-05 00:55:25 +08:00
|
|
|
#ifdef CONFIG_SMP
|
2007-10-20 02:35:03 +08:00
|
|
|
per_cpu(cpu_llc_id, cpu) = l2_id;
|
2006-03-27 17:15:22 +08:00
|
|
|
#endif
|
2006-03-27 17:15:24 +08:00
|
|
|
}
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2006-03-27 17:15:24 +08:00
|
|
|
if (new_l3) {
|
|
|
|
|
l3 = new_l3;
|
2015-06-05 00:55:25 +08:00
|
|
|
#ifdef CONFIG_SMP
|
2007-10-20 02:35:03 +08:00
|
|
|
per_cpu(cpu_llc_id, cpu) = l3_id;
|
2006-03-27 17:15:22 +08:00
|
|
|
#endif
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
|
|
2015-06-05 00:55:25 +08:00
|
|
|
#ifdef CONFIG_SMP
|
2014-07-22 21:35:14 +08:00
|
|
|
/*
|
|
|
|
|
* If cpu_llc_id is not yet set, this means cpuid_level < 4 which in
|
|
|
|
|
* turns means that the only possibility is SMT (as indicated in
|
|
|
|
|
* cpuid1). Since cpuid2 doesn't specify shared caches, and we know
|
|
|
|
|
* that SMT shares all caches, we can unconditionally set cpu_llc_id to
|
|
|
|
|
* c->phys_proc_id.
|
|
|
|
|
*/
|
|
|
|
|
if (per_cpu(cpu_llc_id, cpu) == BAD_APICID)
|
|
|
|
|
per_cpu(cpu_llc_id, cpu) = c->phys_proc_id;
|
|
|
|
|
#endif
|
|
|
|
|
|
2006-03-27 17:15:24 +08:00
|
|
|
c->x86_cache_size = l3 ? l3 : (l2 ? l2 : (l1i+l1d));
|
|
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
return l2;
|
|
|
|
|
}
|
|
|
|
|
|
2015-03-04 20:00:16 +08:00
|
|
|
static int __cache_amd_cpumap_setup(unsigned int cpu, int index,
|
|
|
|
|
struct _cpuid4_info_regs *base)
|
2005-04-17 06:20:36 +08:00
|
|
|
{
|
2015-03-04 20:00:16 +08:00
|
|
|
struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
|
|
|
|
|
struct cacheinfo *this_leaf;
|
2012-10-19 17:02:09 +08:00
|
|
|
int i, sibling;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2017-07-31 16:51:59 +08:00
|
|
|
/*
|
|
|
|
|
* For L3, always use the pre-calculated cpu_llc_shared_mask
|
|
|
|
|
* to derive shared_cpu_map.
|
|
|
|
|
*/
|
|
|
|
|
if (index == 3) {
|
|
|
|
|
for_each_cpu(i, cpu_llc_shared_mask(cpu)) {
|
|
|
|
|
this_cpu_ci = get_cpu_cacheinfo(i);
|
|
|
|
|
if (!this_cpu_ci->info_list)
|
|
|
|
|
continue;
|
|
|
|
|
this_leaf = this_cpu_ci->info_list + index;
|
|
|
|
|
for_each_cpu(sibling, cpu_llc_shared_mask(cpu)) {
|
|
|
|
|
if (!cpu_online(sibling))
|
|
|
|
|
continue;
|
|
|
|
|
cpumask_set_cpu(sibling,
|
|
|
|
|
&this_leaf->shared_cpu_map);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
} else if (boot_cpu_has(X86_FEATURE_TOPOEXT)) {
|
2012-10-19 17:02:09 +08:00
|
|
|
unsigned int apicid, nshared, first, last;
|
|
|
|
|
|
2015-03-04 20:00:16 +08:00
|
|
|
nshared = base->eax.split.num_threads_sharing + 1;
|
2012-10-19 17:02:09 +08:00
|
|
|
apicid = cpu_data(cpu).apicid;
|
|
|
|
|
first = apicid - (apicid % nshared);
|
|
|
|
|
last = first + nshared - 1;
|
|
|
|
|
|
|
|
|
|
for_each_online_cpu(i) {
|
2015-03-04 20:00:16 +08:00
|
|
|
this_cpu_ci = get_cpu_cacheinfo(i);
|
|
|
|
|
if (!this_cpu_ci->info_list)
|
|
|
|
|
continue;
|
|
|
|
|
|
2012-10-19 17:02:09 +08:00
|
|
|
apicid = cpu_data(i).apicid;
|
|
|
|
|
if ((apicid < first) || (apicid > last))
|
|
|
|
|
continue;
|
2015-03-04 20:00:16 +08:00
|
|
|
|
|
|
|
|
this_leaf = this_cpu_ci->info_list + index;
|
2012-10-19 17:02:09 +08:00
|
|
|
|
|
|
|
|
for_each_online_cpu(sibling) {
|
|
|
|
|
apicid = cpu_data(sibling).apicid;
|
|
|
|
|
if ((apicid < first) || (apicid > last))
|
2009-12-10 02:36:45 +08:00
|
|
|
continue;
|
2015-03-04 20:00:16 +08:00
|
|
|
cpumask_set_cpu(sibling,
|
|
|
|
|
&this_leaf->shared_cpu_map);
|
2009-12-10 02:36:45 +08:00
|
|
|
}
|
2009-09-03 15:41:19 +08:00
|
|
|
}
|
2012-10-19 17:02:09 +08:00
|
|
|
} else
|
|
|
|
|
return 0;
|
2012-02-09 03:52:29 +08:00
|
|
|
|
2012-10-19 17:02:09 +08:00
|
|
|
return 1;
|
2012-02-09 03:52:29 +08:00
|
|
|
}
|
|
|
|
|
|
2015-03-04 20:00:16 +08:00
|
|
|
static void __cache_cpumap_setup(unsigned int cpu, int index,
|
|
|
|
|
struct _cpuid4_info_regs *base)
|
2012-02-09 03:52:29 +08:00
|
|
|
{
|
2015-03-04 20:00:16 +08:00
|
|
|
struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
|
|
|
|
|
struct cacheinfo *this_leaf, *sibling_leaf;
|
2012-02-09 03:52:29 +08:00
|
|
|
unsigned long num_threads_sharing;
|
|
|
|
|
int index_msb, i;
|
|
|
|
|
struct cpuinfo_x86 *c = &cpu_data(cpu);
|
|
|
|
|
|
|
|
|
|
if (c->x86_vendor == X86_VENDOR_AMD) {
|
2015-03-04 20:00:16 +08:00
|
|
|
if (__cache_amd_cpumap_setup(cpu, index, base))
|
2012-02-09 03:52:29 +08:00
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
2015-03-04 20:00:16 +08:00
|
|
|
this_leaf = this_cpu_ci->info_list + index;
|
|
|
|
|
num_threads_sharing = 1 + base->eax.split.num_threads_sharing;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2015-03-04 20:00:16 +08:00
|
|
|
cpumask_set_cpu(cpu, &this_leaf->shared_cpu_map);
|
2005-04-17 06:20:36 +08:00
|
|
|
if (num_threads_sharing == 1)
|
2015-03-04 20:00:16 +08:00
|
|
|
return;
|
2005-07-29 12:15:46 +08:00
|
|
|
|
2015-03-04 20:00:16 +08:00
|
|
|
index_msb = get_count_order(num_threads_sharing);
|
2011-07-24 17:46:08 +08:00
|
|
|
|
2015-03-04 20:00:16 +08:00
|
|
|
for_each_online_cpu(i)
|
|
|
|
|
if (cpu_data(i).apicid >> index_msb == c->apicid >> index_msb) {
|
|
|
|
|
struct cpu_cacheinfo *sib_cpu_ci = get_cpu_cacheinfo(i);
|
2007-10-18 18:05:16 +08:00
|
|
|
|
2015-03-04 20:00:16 +08:00
|
|
|
if (i == cpu || !sib_cpu_ci->info_list)
|
|
|
|
|
continue;/* skip if itself or no cacheinfo */
|
|
|
|
|
sibling_leaf = sib_cpu_ci->info_list + index;
|
|
|
|
|
cpumask_set_cpu(i, &this_leaf->shared_cpu_map);
|
|
|
|
|
cpumask_set_cpu(cpu, &sibling_leaf->shared_cpu_map);
|
2007-10-18 18:05:16 +08:00
|
|
|
}
|
2008-12-17 09:34:03 +08:00
|
|
|
}
|
|
|
|
|
|
2015-03-04 20:00:16 +08:00
|
|
|
static void ci_leaf_init(struct cacheinfo *this_leaf,
|
|
|
|
|
struct _cpuid4_info_regs *base)
|
2008-12-17 09:34:03 +08:00
|
|
|
{
|
2016-10-22 21:19:50 +08:00
|
|
|
this_leaf->id = base->id;
|
|
|
|
|
this_leaf->attributes = CACHE_ID;
|
2015-03-04 20:00:16 +08:00
|
|
|
this_leaf->level = base->eax.split.level;
|
|
|
|
|
this_leaf->type = cache_type_map[base->eax.split.type];
|
|
|
|
|
this_leaf->coherency_line_size =
|
|
|
|
|
base->ebx.split.coherency_line_size + 1;
|
|
|
|
|
this_leaf->ways_of_associativity =
|
|
|
|
|
base->ebx.split.ways_of_associativity + 1;
|
|
|
|
|
this_leaf->size = base->size;
|
|
|
|
|
this_leaf->number_of_sets = base->ecx.split.number_of_sets + 1;
|
|
|
|
|
this_leaf->physical_line_partition =
|
|
|
|
|
base->ebx.split.physical_line_partition + 1;
|
|
|
|
|
this_leaf->priv = base->nb;
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
|
|
2015-03-04 20:00:16 +08:00
|
|
|
static int __init_cache_level(unsigned int cpu)
|
2008-04-09 02:43:02 +08:00
|
|
|
{
|
2015-03-04 20:00:16 +08:00
|
|
|
struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
|
2008-04-09 02:43:02 +08:00
|
|
|
|
2015-03-04 20:00:16 +08:00
|
|
|
if (!num_cache_leaves)
|
2005-04-17 06:20:36 +08:00
|
|
|
return -ENOENT;
|
2015-03-04 20:00:16 +08:00
|
|
|
if (!this_cpu_ci)
|
|
|
|
|
return -EINVAL;
|
|
|
|
|
this_cpu_ci->num_levels = 3;
|
|
|
|
|
this_cpu_ci->num_leaves = num_cache_leaves;
|
2005-04-17 06:20:36 +08:00
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
2016-10-22 21:19:50 +08:00
|
|
|
/*
|
|
|
|
|
* The max shared threads number comes from CPUID.4:EAX[25-14] with input
|
|
|
|
|
* ECX as cache index. Then right shift apicid by the number's order to get
|
|
|
|
|
* cache id for this cache node.
|
|
|
|
|
*/
|
|
|
|
|
static void get_cache_id(int cpu, struct _cpuid4_info_regs *id4_regs)
|
|
|
|
|
{
|
|
|
|
|
struct cpuinfo_x86 *c = &cpu_data(cpu);
|
|
|
|
|
unsigned long num_threads_sharing;
|
|
|
|
|
int index_msb;
|
|
|
|
|
|
|
|
|
|
num_threads_sharing = 1 + id4_regs->eax.split.num_threads_sharing;
|
|
|
|
|
index_msb = get_count_order(num_threads_sharing);
|
|
|
|
|
id4_regs->id = c->apicid >> index_msb;
|
|
|
|
|
}
|
|
|
|
|
|
2015-03-04 20:00:16 +08:00
|
|
|
static int __populate_cache_leaves(unsigned int cpu)
|
2005-04-17 06:20:36 +08:00
|
|
|
{
|
2015-03-04 20:00:16 +08:00
|
|
|
unsigned int idx, ret;
|
|
|
|
|
struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
|
|
|
|
|
struct cacheinfo *this_leaf = this_cpu_ci->info_list;
|
|
|
|
|
struct _cpuid4_info_regs id4_regs = {};
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2015-03-04 20:00:16 +08:00
|
|
|
for (idx = 0; idx < this_cpu_ci->num_leaves; idx++) {
|
|
|
|
|
ret = cpuid4_cache_lookup_regs(idx, &id4_regs);
|
|
|
|
|
if (ret)
|
|
|
|
|
return ret;
|
2016-10-22 21:19:50 +08:00
|
|
|
get_cache_id(cpu, &id4_regs);
|
2015-03-04 20:00:16 +08:00
|
|
|
ci_leaf_init(this_leaf++, &id4_regs);
|
|
|
|
|
__cache_cpumap_setup(cpu, idx, &id4_regs);
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
2016-10-28 16:45:28 +08:00
|
|
|
this_cpu_ci->cpu_map_populated = true;
|
|
|
|
|
|
2008-07-15 16:09:03 +08:00
|
|
|
return 0;
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
|
|
2015-03-04 20:00:16 +08:00
|
|
|
DEFINE_SMP_CALL_CACHE_FUNCTION(init_cache_level)
|
|
|
|
|
DEFINE_SMP_CALL_CACHE_FUNCTION(populate_cache_leaves)
|