2013-06-05 20:26:44 +08:00
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#
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# DMA engine configuration for dw
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#
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2013-06-05 20:26:45 +08:00
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config DW_DMAC_CORE
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2013-06-05 20:26:44 +08:00
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tristate "Synopsys DesignWare AHB DMA support"
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depends on GENERIC_HARDIRQS
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select DMA_ENGINE
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2013-06-05 20:26:45 +08:00
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config DW_DMAC
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tristate "Synopsys DesignWare AHB DMA platform driver"
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select DW_DMAC_CORE
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2013-06-05 20:26:44 +08:00
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default y if CPU_AT32AP7000
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help
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Support the Synopsys DesignWare AHB DMA controller. This
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can be integrated in chips such as the Atmel AT32ap7000.
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2013-06-05 20:26:46 +08:00
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config DW_DMAC_PCI
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tristate "Synopsys DesignWare AHB DMA PCI driver"
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depends on PCI
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select DW_DMAC_CORE
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help
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Support the Synopsys DesignWare AHB DMA controller on the
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platfroms that enumerate it as a PCI device. For example,
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Intel Medfield has integrated this GPDMA controller.
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2013-06-05 20:26:44 +08:00
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config DW_DMAC_BIG_ENDIAN_IO
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bool "Use big endian I/O register access"
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default y if AVR32
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2013-06-05 20:26:45 +08:00
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depends on DW_DMAC_CORE
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2013-06-05 20:26:44 +08:00
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help
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Say yes here to use big endian I/O access when reading and writing
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to the DMA controller registers. This is needed on some platforms,
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like the Atmel AVR32 architecture.
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If unsure, use the default setting.
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