2010-11-22 21:35:32 +08:00
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/*
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* AD7887 SPI ADC driver
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*
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2011-05-18 21:41:50 +08:00
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* Copyright 2010-2011 Analog Devices Inc.
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2010-11-22 21:35:32 +08:00
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*
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2011-05-18 21:41:50 +08:00
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* Licensed under the GPL-2.
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2010-11-22 21:35:32 +08:00
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*/
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#include <linux/device.h>
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#include <linux/kernel.h>
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#include <linux/slab.h>
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#include <linux/sysfs.h>
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#include <linux/spi/spi.h>
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#include <linux/regulator/consumer.h>
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#include <linux/err.h>
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2011-07-04 03:49:50 +08:00
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#include <linux/module.h>
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2012-11-05 17:56:00 +08:00
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#include <linux/interrupt.h>
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2010-11-22 21:35:32 +08:00
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2012-04-25 22:54:58 +08:00
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#include <linux/iio/iio.h>
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#include <linux/iio/sysfs.h>
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#include <linux/iio/buffer.h>
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2011-08-13 00:08:43 +08:00
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2012-11-05 17:56:00 +08:00
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#include <linux/iio/trigger_consumer.h>
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#include <linux/iio/triggered_buffer.h>
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2010-11-22 21:35:32 +08:00
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2012-11-05 17:56:00 +08:00
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#include <linux/platform_data/ad7887.h>
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2010-11-22 21:35:32 +08:00
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2012-11-05 17:56:00 +08:00
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#define AD7887_REF_DIS (1 << 5) /* on-chip reference disable */
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#define AD7887_DUAL (1 << 4) /* dual-channel mode */
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#define AD7887_CH_AIN1 (1 << 3) /* convert on channel 1, DUAL=1 */
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#define AD7887_CH_AIN0 (0 << 3) /* convert on channel 0, DUAL=0,1 */
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#define AD7887_PM_MODE1 (0) /* CS based shutdown */
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#define AD7887_PM_MODE2 (1) /* full on */
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#define AD7887_PM_MODE3 (2) /* auto shutdown after conversion */
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#define AD7887_PM_MODE4 (3) /* standby mode */
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enum ad7887_channels {
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AD7887_CH0,
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AD7887_CH0_CH1,
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AD7887_CH1,
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};
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#define RES_MASK(bits) ((1 << (bits)) - 1)
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/**
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* struct ad7887_chip_info - chip specifc information
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* @int_vref_mv: the internal reference voltage
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* @channel: channel specification
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*/
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struct ad7887_chip_info {
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u16 int_vref_mv;
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struct iio_chan_spec channel[3];
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};
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struct ad7887_state {
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struct spi_device *spi;
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const struct ad7887_chip_info *chip_info;
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struct regulator *reg;
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struct spi_transfer xfer[4];
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struct spi_message msg[3];
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struct spi_message *ring_msg;
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2012-11-05 17:56:00 +08:00
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unsigned char tx_cmd_buf[4];
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2012-11-05 17:56:00 +08:00
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/*
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* DMA (thus cache coherency maintenance) requires the
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* transfer buffers to live in their own cache lines.
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* Buffer needs to be large enough to hold two 16 bit samples and a
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* 64 bit aligned 64 bit timestamp.
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*/
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unsigned char data[ALIGN(4, sizeof(s64)) + sizeof(s64)]
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____cacheline_aligned;
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};
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enum ad7887_supported_device_ids {
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ID_AD7887
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};
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static int ad7887_ring_preenable(struct iio_dev *indio_dev)
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{
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struct ad7887_state *st = iio_priv(indio_dev);
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int ret;
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ret = iio_sw_buffer_preenable(indio_dev);
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if (ret < 0)
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return ret;
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/* We know this is a single long so can 'cheat' */
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switch (*indio_dev->active_scan_mask) {
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case (1 << 0):
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st->ring_msg = &st->msg[AD7887_CH0];
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break;
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case (1 << 1):
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st->ring_msg = &st->msg[AD7887_CH1];
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/* Dummy read: push CH1 setting down to hardware */
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spi_sync(st->spi, st->ring_msg);
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break;
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case ((1 << 1) | (1 << 0)):
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st->ring_msg = &st->msg[AD7887_CH0_CH1];
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break;
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}
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return 0;
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}
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static int ad7887_ring_postdisable(struct iio_dev *indio_dev)
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{
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struct ad7887_state *st = iio_priv(indio_dev);
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/* dummy read: restore default CH0 settin */
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return spi_sync(st->spi, &st->msg[AD7887_CH0]);
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}
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/**
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* ad7887_trigger_handler() bh of trigger launched polling to ring buffer
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*
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* Currently there is no option in this driver to disable the saving of
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* timestamps within the ring.
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**/
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static irqreturn_t ad7887_trigger_handler(int irq, void *p)
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{
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struct iio_poll_func *pf = p;
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struct iio_dev *indio_dev = pf->indio_dev;
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struct ad7887_state *st = iio_priv(indio_dev);
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s64 time_ns;
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int b_sent;
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b_sent = spi_sync(st->spi, st->ring_msg);
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if (b_sent)
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goto done;
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time_ns = iio_get_time_ns();
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if (indio_dev->scan_timestamp)
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memcpy(st->data + indio_dev->scan_bytes - sizeof(s64),
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&time_ns, sizeof(time_ns));
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2012-07-01 03:06:00 +08:00
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iio_push_to_buffers(indio_dev, st->data);
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2012-11-05 17:56:00 +08:00
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done:
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iio_trigger_notify_done(indio_dev->trig);
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return IRQ_HANDLED;
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}
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static const struct iio_buffer_setup_ops ad7887_ring_setup_ops = {
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.preenable = &ad7887_ring_preenable,
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.postenable = &iio_triggered_buffer_postenable,
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.predisable = &iio_triggered_buffer_predisable,
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.postdisable = &ad7887_ring_postdisable,
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};
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2010-11-22 21:35:32 +08:00
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static int ad7887_scan_direct(struct ad7887_state *st, unsigned ch)
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{
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int ret = spi_sync(st->spi, &st->msg[ch]);
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if (ret)
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return ret;
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return (st->data[(ch * 2)] << 8) | st->data[(ch * 2) + 1];
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}
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2011-10-07 00:14:37 +08:00
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static int ad7887_read_raw(struct iio_dev *indio_dev,
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2011-05-18 21:41:50 +08:00
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struct iio_chan_spec const *chan,
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int *val,
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int *val2,
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long m)
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2010-11-22 21:35:32 +08:00
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{
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int ret;
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2011-10-07 00:14:37 +08:00
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struct ad7887_state *st = iio_priv(indio_dev);
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2010-11-22 21:35:32 +08:00
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2011-05-18 21:41:50 +08:00
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switch (m) {
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2012-04-16 00:41:18 +08:00
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case IIO_CHAN_INFO_RAW:
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2011-10-07 00:14:37 +08:00
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mutex_lock(&indio_dev->mlock);
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if (iio_buffer_enabled(indio_dev))
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2011-12-06 06:18:23 +08:00
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ret = -EBUSY;
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2011-05-18 21:41:50 +08:00
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else
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ret = ad7887_scan_direct(st, chan->address);
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2011-10-07 00:14:37 +08:00
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mutex_unlock(&indio_dev->mlock);
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2011-05-18 21:41:50 +08:00
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if (ret < 0)
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return ret;
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2012-11-05 17:56:00 +08:00
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*val = ret >> chan->scan_type.shift;
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*val &= RES_MASK(chan->scan_type.realbits);
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2011-05-18 21:41:50 +08:00
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return IIO_VAL_INT;
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2011-10-27 00:41:36 +08:00
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case IIO_CHAN_INFO_SCALE:
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2012-11-05 17:56:00 +08:00
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if (st->reg) {
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*val = regulator_get_voltage(st->reg);
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if (*val < 0)
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return *val;
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*val /= 1000;
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} else {
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*val = st->chip_info->int_vref_mv;
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}
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2012-11-05 17:56:00 +08:00
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*val2 = chan->scan_type.realbits;
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2012-11-05 17:56:00 +08:00
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return IIO_VAL_FRACTIONAL_LOG2;
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2011-05-18 21:41:50 +08:00
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}
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return -EINVAL;
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2010-11-22 21:35:32 +08:00
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}
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static const struct ad7887_chip_info ad7887_chip_info_tbl[] = {
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/*
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* More devices added in future
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*/
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[ID_AD7887] = {
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2011-09-30 17:05:44 +08:00
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.channel[0] = {
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.type = IIO_VOLTAGE,
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.indexed = 1,
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.channel = 1,
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2012-04-16 00:41:18 +08:00
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.info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
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IIO_CHAN_INFO_SCALE_SHARED_BIT,
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2011-09-30 17:05:44 +08:00
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.address = 1,
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.scan_index = 1,
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.scan_type = IIO_ST('u', 12, 16, 0),
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},
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.channel[1] = {
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.type = IIO_VOLTAGE,
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.indexed = 1,
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.channel = 0,
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2012-04-16 00:41:18 +08:00
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.info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
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IIO_CHAN_INFO_SCALE_SHARED_BIT,
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2011-09-30 17:05:44 +08:00
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.address = 0,
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.scan_index = 0,
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.scan_type = IIO_ST('u', 12, 16, 0),
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},
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2011-05-18 21:41:50 +08:00
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.channel[2] = IIO_CHAN_SOFT_TIMESTAMP(2),
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2010-11-22 21:35:32 +08:00
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.int_vref_mv = 2500,
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},
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};
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2011-05-18 21:42:37 +08:00
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static const struct iio_info ad7887_info = {
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.read_raw = &ad7887_read_raw,
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.driver_module = THIS_MODULE,
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};
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2010-11-22 21:35:32 +08:00
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static int __devinit ad7887_probe(struct spi_device *spi)
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{
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struct ad7887_platform_data *pdata = spi->dev.platform_data;
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struct ad7887_state *st;
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2012-04-26 19:35:01 +08:00
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struct iio_dev *indio_dev = iio_device_alloc(sizeof(*st));
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2012-11-05 17:56:00 +08:00
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uint8_t mode;
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2012-11-05 17:56:00 +08:00
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int ret;
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2010-11-22 21:35:32 +08:00
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2011-05-18 21:41:51 +08:00
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if (indio_dev == NULL)
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return -ENOMEM;
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st = iio_priv(indio_dev);
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2010-11-22 21:35:32 +08:00
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2012-11-05 17:56:00 +08:00
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if (!pdata || !pdata->use_onchip_ref) {
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st->reg = regulator_get(&spi->dev, "vref");
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if (IS_ERR(st->reg)) {
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ret = PTR_ERR(st->reg);
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goto error_free;
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}
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2010-11-22 21:35:32 +08:00
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ret = regulator_enable(st->reg);
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if (ret)
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goto error_put_reg;
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}
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st->chip_info =
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&ad7887_chip_info_tbl[spi_get_device_id(spi)->driver_data];
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2011-05-18 21:41:51 +08:00
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spi_set_drvdata(spi, indio_dev);
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2010-11-22 21:35:32 +08:00
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st->spi = spi;
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/* Estabilish that the iio_dev is a child of the spi device */
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2011-05-18 21:41:51 +08:00
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indio_dev->dev.parent = &spi->dev;
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indio_dev->name = spi_get_device_id(spi)->name;
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2011-05-18 21:42:37 +08:00
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indio_dev->info = &ad7887_info;
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2011-05-18 21:41:51 +08:00
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indio_dev->modes = INDIO_DIRECT_MODE;
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2010-11-22 21:35:32 +08:00
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/* Setup default message */
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2012-11-05 17:56:00 +08:00
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mode = AD7887_PM_MODE4;
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if (!pdata || !pdata->use_onchip_ref)
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mode |= AD7887_REF_DIS;
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if (pdata && pdata->en_dual)
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mode |= AD7887_DUAL;
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st->tx_cmd_buf[0] = AD7887_CH_AIN0 | mode;
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2010-11-22 21:35:32 +08:00
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st->xfer[0].rx_buf = &st->data[0];
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st->xfer[0].tx_buf = &st->tx_cmd_buf[0];
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st->xfer[0].len = 2;
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spi_message_init(&st->msg[AD7887_CH0]);
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spi_message_add_tail(&st->xfer[0], &st->msg[AD7887_CH0]);
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if (pdata && pdata->en_dual) {
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2012-11-05 17:56:00 +08:00
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st->tx_cmd_buf[2] = AD7887_CH_AIN1 | mode;
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2010-11-22 21:35:32 +08:00
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st->xfer[1].rx_buf = &st->data[0];
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st->xfer[1].tx_buf = &st->tx_cmd_buf[2];
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st->xfer[1].len = 2;
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st->xfer[2].rx_buf = &st->data[2];
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2012-11-05 17:56:00 +08:00
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st->xfer[2].tx_buf = &st->tx_cmd_buf[0];
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2010-11-22 21:35:32 +08:00
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st->xfer[2].len = 2;
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spi_message_init(&st->msg[AD7887_CH0_CH1]);
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spi_message_add_tail(&st->xfer[1], &st->msg[AD7887_CH0_CH1]);
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spi_message_add_tail(&st->xfer[2], &st->msg[AD7887_CH0_CH1]);
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2012-11-05 17:56:00 +08:00
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st->xfer[3].rx_buf = &st->data[2];
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st->xfer[3].tx_buf = &st->tx_cmd_buf[2];
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2010-11-22 21:35:32 +08:00
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st->xfer[3].len = 2;
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spi_message_init(&st->msg[AD7887_CH1]);
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spi_message_add_tail(&st->xfer[3], &st->msg[AD7887_CH1]);
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2011-05-18 21:41:51 +08:00
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|
indio_dev->channels = st->chip_info->channel;
|
|
|
|
indio_dev->num_channels = 3;
|
2010-11-22 21:35:32 +08:00
|
|
|
} else {
|
2011-05-18 21:41:51 +08:00
|
|
|
indio_dev->channels = &st->chip_info->channel[1];
|
|
|
|
indio_dev->num_channels = 2;
|
2011-05-18 21:41:50 +08:00
|
|
|
}
|
2010-11-22 21:35:32 +08:00
|
|
|
|
2012-11-05 17:56:00 +08:00
|
|
|
ret = iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time,
|
|
|
|
&ad7887_trigger_handler, &ad7887_ring_setup_ops);
|
2010-11-22 21:35:32 +08:00
|
|
|
if (ret)
|
2011-05-18 21:41:51 +08:00
|
|
|
goto error_disable_reg;
|
2010-11-22 21:35:32 +08:00
|
|
|
|
2011-09-03 00:14:40 +08:00
|
|
|
ret = iio_device_register(indio_dev);
|
|
|
|
if (ret)
|
|
|
|
goto error_unregister_ring;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
error_unregister_ring:
|
2012-11-05 17:56:00 +08:00
|
|
|
iio_triggered_buffer_cleanup(indio_dev);
|
2010-11-22 21:35:32 +08:00
|
|
|
error_disable_reg:
|
2012-11-05 17:56:00 +08:00
|
|
|
if (st->reg)
|
2010-11-22 21:35:32 +08:00
|
|
|
regulator_disable(st->reg);
|
|
|
|
error_put_reg:
|
2012-11-05 17:56:00 +08:00
|
|
|
if (st->reg)
|
2010-11-22 21:35:32 +08:00
|
|
|
regulator_put(st->reg);
|
2012-11-05 17:56:00 +08:00
|
|
|
error_free:
|
2012-04-26 19:35:01 +08:00
|
|
|
iio_device_free(indio_dev);
|
2011-05-18 21:41:51 +08:00
|
|
|
|
2010-11-22 21:35:32 +08:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2012-08-18 01:29:00 +08:00
|
|
|
static int __devexit ad7887_remove(struct spi_device *spi)
|
2010-11-22 21:35:32 +08:00
|
|
|
{
|
2011-05-18 21:41:51 +08:00
|
|
|
struct iio_dev *indio_dev = spi_get_drvdata(spi);
|
|
|
|
struct ad7887_state *st = iio_priv(indio_dev);
|
|
|
|
|
2011-10-14 21:46:58 +08:00
|
|
|
iio_device_unregister(indio_dev);
|
2012-11-05 17:56:00 +08:00
|
|
|
iio_triggered_buffer_cleanup(indio_dev);
|
2012-11-05 17:56:00 +08:00
|
|
|
if (st->reg) {
|
2010-11-22 21:35:32 +08:00
|
|
|
regulator_disable(st->reg);
|
|
|
|
regulator_put(st->reg);
|
|
|
|
}
|
2012-04-26 19:35:01 +08:00
|
|
|
iio_device_free(indio_dev);
|
2011-05-18 21:41:51 +08:00
|
|
|
|
2010-11-22 21:35:32 +08:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static const struct spi_device_id ad7887_id[] = {
|
|
|
|
{"ad7887", ID_AD7887},
|
|
|
|
{}
|
|
|
|
};
|
2011-11-16 15:53:31 +08:00
|
|
|
MODULE_DEVICE_TABLE(spi, ad7887_id);
|
2010-11-22 21:35:32 +08:00
|
|
|
|
|
|
|
static struct spi_driver ad7887_driver = {
|
|
|
|
.driver = {
|
|
|
|
.name = "ad7887",
|
|
|
|
.owner = THIS_MODULE,
|
|
|
|
},
|
|
|
|
.probe = ad7887_probe,
|
|
|
|
.remove = __devexit_p(ad7887_remove),
|
|
|
|
.id_table = ad7887_id,
|
|
|
|
};
|
2011-11-16 17:13:39 +08:00
|
|
|
module_spi_driver(ad7887_driver);
|
2010-11-22 21:35:32 +08:00
|
|
|
|
|
|
|
MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
|
|
|
|
MODULE_DESCRIPTION("Analog Devices AD7887 ADC");
|
|
|
|
MODULE_LICENSE("GPL v2");
|