2021-06-03 04:51:34 +08:00
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/* SPDX-License-Identifier: GPL-2.0 or Linux-OpenIB */
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/* Copyright (c) 2016 - 2021 Intel Corporation */
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#ifndef IRDMA_PROTOS_H
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#define IRDMA_PROTOS_H
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#define PAUSE_TIMER_VAL 0xffff
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#define REFRESH_THRESHOLD 0x7fff
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#define HIGH_THRESHOLD 0x800
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#define LOW_THRESHOLD 0x200
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#define ALL_TC2PFC 0xff
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#define CQP_COMPL_WAIT_TIME_MS 10
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#define CQP_TIMEOUT_THRESHOLD 500
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/* init operations */
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2022-02-17 23:18:49 +08:00
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int irdma_sc_dev_init(enum irdma_vers ver, struct irdma_sc_dev *dev,
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struct irdma_device_init_info *info);
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2021-06-03 04:51:34 +08:00
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void irdma_sc_rt_init(struct irdma_sc_dev *dev);
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void irdma_sc_cqp_post_sq(struct irdma_sc_cqp *cqp);
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__le64 *irdma_sc_cqp_get_next_send_wqe(struct irdma_sc_cqp *cqp, u64 scratch);
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2022-02-17 23:18:49 +08:00
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int irdma_sc_mr_fast_register(struct irdma_sc_qp *qp,
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struct irdma_fast_reg_stag_info *info,
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bool post_sq);
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2021-06-03 04:51:34 +08:00
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/* HMC/FPM functions */
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2022-02-17 23:18:49 +08:00
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int irdma_sc_init_iw_hmc(struct irdma_sc_dev *dev, u8 hmc_fn_id);
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2021-06-03 04:51:34 +08:00
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/* stats misc */
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2022-02-17 23:18:49 +08:00
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int irdma_cqp_gather_stats_cmd(struct irdma_sc_dev *dev,
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struct irdma_vsi_pestat *pestat, bool wait);
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2021-06-03 04:51:34 +08:00
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void irdma_cqp_gather_stats_gen1(struct irdma_sc_dev *dev,
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struct irdma_vsi_pestat *pestat);
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void irdma_hw_stats_read_all(struct irdma_vsi_pestat *stats,
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RDMA/irdma: Refactor HW statistics
Refactor HW statistics which,
- Unifies HW statistics support for all HW generations.
- Unifies support of 32- and 64-bit counters.
- Removes duplicated code and simplifies implementation.
- Fixes roll-over handling.
- Removes unneeded last_hw_stats.
With new implementation, there is no separate handling and no separate
arrays for 32- and 64-bit counters (offsets, regs, values). Instead,
there is a HW stats map array for each HW revision, which defines
HW-specific width and location of each counter in the statistics buffer.
Once the statistics are gathered (either via CQP op, or by reading HW
registers), counter values are extracted from the statistics buffer using
the stats map and the delta between the last and new values is computed.
Finally, the counter values in rdma_hw_stats are incremented by those
deltas.
From the OS perspective, all the counters are 64-bit and their order in
rdma_hw_stats->value[] array, as well as in irdma_hw_stat_names[], is the
same for all HW gens. New statistics should always be added at the end.
Signed-off-by: Krzysztof Czurylo <krzysztof.czurylo@intel.com>
Signed-off-by: Youvaraj Sagar <youvaraj.sagar@intel.com>
Signed-off-by: Shiraz Saleem <shiraz.saleem@intel.com>
Link: https://lore.kernel.org/r/20230315145305.955-2-shiraz.saleem@intel.com
Signed-off-by: Leon Romanovsky <leon@kernel.org>
2023-03-15 22:53:02 +08:00
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const u64 *hw_stats_regs);
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2022-02-17 23:18:49 +08:00
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int irdma_cqp_ws_node_cmd(struct irdma_sc_dev *dev, u8 cmd,
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struct irdma_ws_node_info *node_info);
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int irdma_cqp_ceq_cmd(struct irdma_sc_dev *dev, struct irdma_sc_ceq *sc_ceq,
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u8 op);
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int irdma_cqp_aeq_cmd(struct irdma_sc_dev *dev, struct irdma_sc_aeq *sc_aeq,
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u8 op);
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int irdma_cqp_stats_inst_cmd(struct irdma_sc_vsi *vsi, u8 cmd,
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struct irdma_stats_inst_info *stats_info);
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2021-06-03 04:51:34 +08:00
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u16 irdma_alloc_ws_node_id(struct irdma_sc_dev *dev);
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void irdma_free_ws_node_id(struct irdma_sc_dev *dev, u16 node_id);
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void irdma_update_stats(struct irdma_dev_hw_stats *hw_stats,
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struct irdma_gather_stats *gather_stats,
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RDMA/irdma: Refactor HW statistics
Refactor HW statistics which,
- Unifies HW statistics support for all HW generations.
- Unifies support of 32- and 64-bit counters.
- Removes duplicated code and simplifies implementation.
- Fixes roll-over handling.
- Removes unneeded last_hw_stats.
With new implementation, there is no separate handling and no separate
arrays for 32- and 64-bit counters (offsets, regs, values). Instead,
there is a HW stats map array for each HW revision, which defines
HW-specific width and location of each counter in the statistics buffer.
Once the statistics are gathered (either via CQP op, or by reading HW
registers), counter values are extracted from the statistics buffer using
the stats map and the delta between the last and new values is computed.
Finally, the counter values in rdma_hw_stats are incremented by those
deltas.
From the OS perspective, all the counters are 64-bit and their order in
rdma_hw_stats->value[] array, as well as in irdma_hw_stat_names[], is the
same for all HW gens. New statistics should always be added at the end.
Signed-off-by: Krzysztof Czurylo <krzysztof.czurylo@intel.com>
Signed-off-by: Youvaraj Sagar <youvaraj.sagar@intel.com>
Signed-off-by: Shiraz Saleem <shiraz.saleem@intel.com>
Link: https://lore.kernel.org/r/20230315145305.955-2-shiraz.saleem@intel.com
Signed-off-by: Leon Romanovsky <leon@kernel.org>
2023-03-15 22:53:02 +08:00
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struct irdma_gather_stats *last_gather_stats,
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const struct irdma_hw_stat_map *map, u16 max_stat_idx);
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2021-06-03 04:51:34 +08:00
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/* vsi functions */
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2022-02-17 23:18:49 +08:00
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int irdma_vsi_stats_init(struct irdma_sc_vsi *vsi,
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struct irdma_vsi_stats_info *info);
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2021-06-03 04:51:34 +08:00
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void irdma_vsi_stats_free(struct irdma_sc_vsi *vsi);
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void irdma_sc_vsi_init(struct irdma_sc_vsi *vsi,
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struct irdma_vsi_init_info *info);
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2022-02-17 23:18:49 +08:00
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int irdma_sc_add_cq_ctx(struct irdma_sc_ceq *ceq, struct irdma_sc_cq *cq);
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2021-06-03 04:51:34 +08:00
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void irdma_sc_remove_cq_ctx(struct irdma_sc_ceq *ceq, struct irdma_sc_cq *cq);
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/* misc L2 param change functions */
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void irdma_change_l2params(struct irdma_sc_vsi *vsi,
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struct irdma_l2params *l2params);
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void irdma_sc_suspend_resume_qps(struct irdma_sc_vsi *vsi, u8 suspend);
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2022-02-17 23:18:49 +08:00
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int irdma_cqp_qp_suspend_resume(struct irdma_sc_qp *qp, u8 cmd);
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2021-06-03 04:51:34 +08:00
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void irdma_qp_add_qos(struct irdma_sc_qp *qp);
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void irdma_qp_rem_qos(struct irdma_sc_qp *qp);
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struct irdma_sc_qp *irdma_get_qp_from_list(struct list_head *head,
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struct irdma_sc_qp *qp);
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void irdma_reinitialize_ieq(struct irdma_sc_vsi *vsi);
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/* terminate functions*/
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void irdma_terminate_send_fin(struct irdma_sc_qp *qp);
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void irdma_terminate_connection(struct irdma_sc_qp *qp,
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struct irdma_aeqe_info *info);
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void irdma_terminate_received(struct irdma_sc_qp *qp,
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struct irdma_aeqe_info *info);
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/* dynamic memory allocation */
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/* misc */
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u8 irdma_get_encoded_wqe_size(u32 wqsize, enum irdma_queue_type queue_type);
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void irdma_modify_qp_to_err(struct irdma_sc_qp *sc_qp);
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2022-02-17 23:18:49 +08:00
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int irdma_sc_static_hmc_pages_allocated(struct irdma_sc_cqp *cqp, u64 scratch,
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u8 hmc_fn_id, bool post_sq,
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bool poll_registers);
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int irdma_cfg_fpm_val(struct irdma_sc_dev *dev, u32 qp_count);
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int irdma_get_rdma_features(struct irdma_sc_dev *dev);
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2021-06-03 04:51:34 +08:00
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void free_sd_mem(struct irdma_sc_dev *dev);
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2022-02-17 23:18:49 +08:00
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int irdma_process_cqp_cmd(struct irdma_sc_dev *dev,
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struct cqp_cmds_info *pcmdinfo);
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int irdma_process_bh(struct irdma_sc_dev *dev);
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int irdma_cqp_sds_cmd(struct irdma_sc_dev *dev,
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struct irdma_update_sds_info *info);
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int irdma_cqp_query_fpm_val_cmd(struct irdma_sc_dev *dev,
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struct irdma_dma_mem *val_mem, u8 hmc_fn_id);
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int irdma_cqp_commit_fpm_val_cmd(struct irdma_sc_dev *dev,
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struct irdma_dma_mem *val_mem, u8 hmc_fn_id);
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int irdma_alloc_query_fpm_buf(struct irdma_sc_dev *dev,
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struct irdma_dma_mem *mem);
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int irdma_cqp_manage_hmc_fcn_cmd(struct irdma_sc_dev *dev,
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struct irdma_hmc_fcn_info *hmcfcninfo,
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u16 *pmf_idx);
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2021-06-03 04:51:34 +08:00
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void irdma_add_dev_ref(struct irdma_sc_dev *dev);
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void irdma_put_dev_ref(struct irdma_sc_dev *dev);
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void *irdma_remove_cqp_head(struct irdma_sc_dev *dev);
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#endif /* IRDMA_PROTOS_H */
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